clk: gxbb: expose MPLL2 clock for use by DT

This exposes the MPLL2 clock as this is one of the input clocks of the
ethernet controller's internal mux.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h
index ce4ad637083d..ccef0283173b 100644
--- a/include/dt-bindings/clock/gxbb-clkc.h
+++ b/include/dt-bindings/clock/gxbb-clkc.h
@@ -11,6 +11,7 @@
 #define CLKID_FCLK_DIV3         5
 #define CLKID_FCLK_DIV4         6
 #define CLKID_CLK81             12
+#define CLKID_MPLL2             15
 #define CLKID_ETH               36
 #define CLKID_SD_EMMC_A         94
 #define CLKID_SD_EMMC_B         95