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author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-10 17:48:43 -0400 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-10 17:48:43 -0400 |
commit | 0f166396e7e8931bb4acfd1a6ea1bd4f0b43f1dd (patch) | |
tree | 6279fa70695a4c56b7e935018a4c0fc1dfa82e68 /include/asm-mips/processor.h | |
parent | 5f60cfd932b42c69ed3226400cb5eab152576c3a (diff) | |
parent | 105b1bca4d7bed85bb296f7e7caec2fc643e9fbf (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (62 commits)
[MIPS] PNX8550: Cleanup proc code.
[MIPS] WRPPMC: Fix build.
[MIPS] Yosemite: Fix modpost warnings.
[MIPS] Change names of local variables to silence sparse
[MIPS] SB1: Fix modpost warning.
[MIPS] PNX: Fix modpost warnings.
[MIPS] Alchemy: Fix modpost warnings.
[MIPS] Non-FPAFF: Fix warning.
[MIPS] DEC: Fix modpost warning.
[MIPS] MIPSsim: Enable MIPSsim virtual network driver.
[MIPS] Delete Ocelot 3 support.
[MIPS] remove LASAT Networks platforms support
[MIPS] Early check for SMTC kernel on non-MT processor
[MIPS] Add debugfs files to show fpuemu statistics
[MIPS] Add some debugfs files to debug unaligned accesses
[MIPS] rbtx4938: Fix secondary PCIC and glue internal NICs
[MIPS] tc35815: Load MAC address via platform_device
[MIPS] Move FPU affinity code into separate file.
[MIPS] Make ioremap() work on TX39/49 special unmapped segment
[MIPS] rbtx4938: Update and minimize defconfig
...
Diffstat (limited to 'include/asm-mips/processor.h')
-rw-r--r-- | include/asm-mips/processor.h | 92 |
1 files changed, 54 insertions, 38 deletions
diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h index 5f80ba71ab92..1d8b9a8ae324 100644 --- a/include/asm-mips/processor.h +++ b/include/asm-mips/processor.h | |||
@@ -82,10 +82,6 @@ struct mips_fpu_struct { | |||
82 | unsigned int fcr31; | 82 | unsigned int fcr31; |
83 | }; | 83 | }; |
84 | 84 | ||
85 | #define INIT_FPU { \ | ||
86 | {0,} \ | ||
87 | } | ||
88 | |||
89 | #define NUM_DSP_REGS 6 | 85 | #define NUM_DSP_REGS 6 |
90 | 86 | ||
91 | typedef __u32 dspreg_t; | 87 | typedef __u32 dspreg_t; |
@@ -95,8 +91,6 @@ struct mips_dsp_state { | |||
95 | unsigned int dspcontrol; | 91 | unsigned int dspcontrol; |
96 | }; | 92 | }; |
97 | 93 | ||
98 | #define INIT_DSP {{0,},} | ||
99 | |||
100 | #define INIT_CPUMASK { \ | 94 | #define INIT_CPUMASK { \ |
101 | {0,} \ | 95 | {0,} \ |
102 | } | 96 | } |
@@ -155,41 +149,63 @@ struct thread_struct { | |||
155 | #define MF_N64 0 | 149 | #define MF_N64 0 |
156 | 150 | ||
157 | #ifdef CONFIG_MIPS_MT_FPAFF | 151 | #ifdef CONFIG_MIPS_MT_FPAFF |
158 | #define FPAFF_INIT 0, INIT_CPUMASK, | 152 | #define FPAFF_INIT \ |
153 | .emulated_fp = 0, \ | ||
154 | .user_cpus_allowed = INIT_CPUMASK, | ||
159 | #else | 155 | #else |
160 | #define FPAFF_INIT | 156 | #define FPAFF_INIT |
161 | #endif /* CONFIG_MIPS_MT_FPAFF */ | 157 | #endif /* CONFIG_MIPS_MT_FPAFF */ |
162 | 158 | ||
163 | #define INIT_THREAD { \ | 159 | #define INIT_THREAD { \ |
164 | /* \ | 160 | /* \ |
165 | * saved main processor registers \ | 161 | * Saved main processor registers \ |
166 | */ \ | 162 | */ \ |
167 | 0, 0, 0, 0, 0, 0, 0, 0, \ | 163 | .reg16 = 0, \ |
168 | 0, 0, 0, \ | 164 | .reg17 = 0, \ |
169 | /* \ | 165 | .reg18 = 0, \ |
170 | * saved cp0 stuff \ | 166 | .reg19 = 0, \ |
171 | */ \ | 167 | .reg20 = 0, \ |
172 | 0, \ | 168 | .reg21 = 0, \ |
173 | /* \ | 169 | .reg22 = 0, \ |
174 | * saved fpu/fpu emulator stuff \ | 170 | .reg23 = 0, \ |
175 | */ \ | 171 | .reg29 = 0, \ |
176 | INIT_FPU, \ | 172 | .reg30 = 0, \ |
177 | /* \ | 173 | .reg31 = 0, \ |
178 | * fpu affinity state (null if not FPAFF) \ | 174 | /* \ |
179 | */ \ | 175 | * Saved cp0 stuff \ |
180 | FPAFF_INIT \ | 176 | */ \ |
181 | /* \ | 177 | .cp0_status = 0, \ |
182 | * saved dsp/dsp emulator stuff \ | 178 | /* \ |
183 | */ \ | 179 | * Saved FPU/FPU emulator stuff \ |
184 | INIT_DSP, \ | 180 | */ \ |
185 | /* \ | 181 | .fpu = { \ |
186 | * Other stuff associated with the process \ | 182 | .fpr = {0,}, \ |
187 | */ \ | 183 | .fcr31 = 0, \ |
188 | 0, 0, 0, 0, \ | 184 | }, \ |
189 | /* \ | 185 | /* \ |
190 | * For now the default is to fix address errors \ | 186 | * FPU affinity state (null if not FPAFF) \ |
191 | */ \ | 187 | */ \ |
192 | MF_FIXADE, 0, 0 \ | 188 | FPAFF_INIT \ |
189 | /* \ | ||
190 | * Saved DSP stuff \ | ||
191 | */ \ | ||
192 | .dsp = { \ | ||
193 | .dspr = {0, }, \ | ||
194 | .dspcontrol = 0, \ | ||
195 | }, \ | ||
196 | /* \ | ||
197 | * Other stuff associated with the process \ | ||
198 | */ \ | ||
199 | .cp0_badvaddr = 0, \ | ||
200 | .cp0_baduaddr = 0, \ | ||
201 | .error_code = 0, \ | ||
202 | .trap_no = 0, \ | ||
203 | /* \ | ||
204 | * For now the default is to fix address errors \ | ||
205 | */ \ | ||
206 | .mflags = MF_FIXADE, \ | ||
207 | .irix_trampoline = 0, \ | ||
208 | .irix_oldctx = 0, \ | ||
193 | } | 209 | } |
194 | 210 | ||
195 | struct task_struct; | 211 | struct task_struct; |
@@ -237,7 +253,7 @@ unsigned long get_wchan(struct task_struct *p); | |||
237 | 253 | ||
238 | #define ARCH_HAS_PREFETCH | 254 | #define ARCH_HAS_PREFETCH |
239 | 255 | ||
240 | extern inline void prefetch(const void *addr) | 256 | static inline void prefetch(const void *addr) |
241 | { | 257 | { |
242 | __asm__ __volatile__( | 258 | __asm__ __volatile__( |
243 | " .set mips4 \n" | 259 | " .set mips4 \n" |