aboutsummaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
authorPeter Ujfalusi <peter.ujfalusi@ti.com>2017-05-17 12:23:11 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-05-25 09:44:40 -0400
commit08c735a15d5b420879cd096b6c417837e1dbe8fa (patch)
tree2a83f8323e1806e5cbb7cad06accf7e2628ecb59 /drivers
parentff9177b158c3cf1420846d1114aec4e2b1cb76e5 (diff)
usb: musb: tusb6010_omap: Do not reset the other direction's packet size
commit 6df2b42f7c040d57d9ecb67244e04e905ab87ac6 upstream. We have one register for each EP to set the maximum packet size for both TX and RX. If for example an RX programming would happen before the previous TX transfer finishes we would reset the TX packet side. To fix this issue, only modify the TX or RX part of the register. Fixes: 550a7375fe72 ("USB: Add MUSB and TUSB support") Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Bin Liu <b-liu@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/usb/musb/tusb6010_omap.c13
1 files changed, 9 insertions, 4 deletions
diff --git a/drivers/usb/musb/tusb6010_omap.c b/drivers/usb/musb/tusb6010_omap.c
index e6959ccb4453..404742672658 100644
--- a/drivers/usb/musb/tusb6010_omap.c
+++ b/drivers/usb/musb/tusb6010_omap.c
@@ -220,6 +220,7 @@ static int tusb_omap_dma_program(struct dma_channel *channel, u16 packet_sz,
220 u32 dma_remaining; 220 u32 dma_remaining;
221 int src_burst, dst_burst; 221 int src_burst, dst_burst;
222 u16 csr; 222 u16 csr;
223 u32 psize;
223 int ch; 224 int ch;
224 s8 dmareq; 225 s8 dmareq;
225 s8 sync_dev; 226 s8 sync_dev;
@@ -391,15 +392,19 @@ static int tusb_omap_dma_program(struct dma_channel *channel, u16 packet_sz,
391 392
392 if (chdat->tx) { 393 if (chdat->tx) {
393 /* Send transfer_packet_sz packets at a time */ 394 /* Send transfer_packet_sz packets at a time */
394 musb_writel(ep_conf, TUSB_EP_MAX_PACKET_SIZE_OFFSET, 395 psize = musb_readl(ep_conf, TUSB_EP_MAX_PACKET_SIZE_OFFSET);
395 chdat->transfer_packet_sz); 396 psize &= ~0x7ff;
397 psize |= chdat->transfer_packet_sz;
398 musb_writel(ep_conf, TUSB_EP_MAX_PACKET_SIZE_OFFSET, psize);
396 399
397 musb_writel(ep_conf, TUSB_EP_TX_OFFSET, 400 musb_writel(ep_conf, TUSB_EP_TX_OFFSET,
398 TUSB_EP_CONFIG_XFR_SIZE(chdat->transfer_len)); 401 TUSB_EP_CONFIG_XFR_SIZE(chdat->transfer_len));
399 } else { 402 } else {
400 /* Receive transfer_packet_sz packets at a time */ 403 /* Receive transfer_packet_sz packets at a time */
401 musb_writel(ep_conf, TUSB_EP_MAX_PACKET_SIZE_OFFSET, 404 psize = musb_readl(ep_conf, TUSB_EP_MAX_PACKET_SIZE_OFFSET);
402 chdat->transfer_packet_sz << 16); 405 psize &= ~(0x7ff << 16);
406 psize |= (chdat->transfer_packet_sz << 16);
407 musb_writel(ep_conf, TUSB_EP_MAX_PACKET_SIZE_OFFSET, psize);
403 408
404 musb_writel(ep_conf, TUSB_EP_RX_OFFSET, 409 musb_writel(ep_conf, TUSB_EP_RX_OFFSET,
405 TUSB_EP_CONFIG_XFR_SIZE(chdat->transfer_len)); 410 TUSB_EP_CONFIG_XFR_SIZE(chdat->transfer_len));