Merge branch 'tty-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty-2.6

* 'tty-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty-2.6: (48 commits)
  serial: 8250_pci: add support for Cronyx Omega PCI multiserial board.
  tty/serial: Fix break handling for PORT_TEGRA
  tty/serial: Add explicit PORT_TEGRA type
  n_tracerouter and n_tracesink ldisc additions.
  Intel PTI implementaiton of MIPI 1149.7.
  Kernel documentation for the PTI feature.
  export kernel call get_task_comm().
  tty: Remove to support serial for S5P6442
  pch_phub: Support new device ML7223
  8250_pci: Add support for the Digi/IBM PCIe 2-port Adapter
  ASoC: Update cx20442 for TTY API change
  pch_uart: Support new device ML7223 IOH
  parport: Use request_muxed_region for IT87 probe and lock
  tty/serial: add support for Xilinx PS UART
  n_gsm: Use print_hex_dump_bytes
  drivers/tty/moxa.c: Put correct tty value
  TTY: tty_io, annotate locking functions
  TTY: serial_core, remove superfluous set_task_state
  TTY: serial_core, remove invalid test
  Char: moxa, fix locking in moxa_write
  ...

Fix up trivial conflicts in drivers/bluetooth/hci_ldisc.c and
drivers/tty/serial/Makefile.

I did the hci_ldisc thing as an evil merge, cleaning things up.

50 files changed, 1270 insertions, 187 deletions

diff --git a/drivers/tty/serial/21285.c b/drivers/tty/serial/21285.c
index d89aa38c5cf0..1b37626e8f13 100644
--- a/drivers/tty/serial/21285.c
+++ b/drivers/tty/serial/21285.c
@@ -1,6 +1,4 @@
 /*
- * linux/drivers/serial/21285.c
- *
  * Driver for the serial port on the 21285 StrongArm-110 core logic chip.
  *
  * Based on drivers/char/serial.c
diff --git a/drivers/tty/serial/8250.c b/drivers/tty/serial/8250.c
index 6611535f4440..b40f7b90c81d 100644
--- a/drivers/tty/serial/8250.c
+++ b/drivers/tty/serial/8250.c
@@ -1,6 +1,4 @@
 /*
- *  linux/drivers/char/8250.c
- *
  *  Driver for 8250/16550-type serial ports
  *
  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
@@ -273,7 +271,7 @@ static const struct serial8250_config uart_config[] = {
                 .fifo_size      = 32,
                 .tx_loadsz      = 32,
                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
-                .flags          = UART_CAP_FIFO | UART_CAP_UUE,
+                .flags          = UART_CAP_FIFO | UART_CAP_UUE | UART_CAP_RTOIE,
         },
         [PORT_RM9000] = {
                 .name           = "RM9000",
@@ -303,6 +301,14 @@ static const struct serial8250_config uart_config[] = {
                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
                 .flags          = UART_CAP_FIFO | UART_CAP_AFE,
         },
+        [PORT_TEGRA] = {
+                .name           = "Tegra",
+                .fifo_size      = 32,
+                .tx_loadsz      = 8,
+                .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
+                                  UART_FCR_T_TRIG_01,
+                .flags          = UART_CAP_FIFO | UART_CAP_RTOIE,
+        },
 };
 
 #if defined(CONFIG_MIPS_ALCHEMY)
@@ -1427,6 +1433,27 @@ static void serial8250_enable_ms(struct uart_port *port)
         serial_out(up, UART_IER, up->ier);
 }
 
+/*
+ * Clear the Tegra rx fifo after a break
+ *
+ * FIXME: This needs to become a port specific callback once we have a
+ * framework for this
+ */
+static void clear_rx_fifo(struct uart_8250_port *up)
+{
+        unsigned int status, tmout = 10000;
+        do {
+                status = serial_in(up, UART_LSR);
+                if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
+                        status = serial_in(up, UART_RX);
+                else
+                        break;
+                if (--tmout == 0)
+                        break;
+                udelay(1);
+        } while (1);
+}
+
 static void
 receive_chars(struct uart_8250_port *up, unsigned int *status)
 {
@@ -1462,6 +1489,13 @@ receive_chars(struct uart_8250_port *up, unsigned int *status)
                                 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
                                 up->port.icount.brk++;
                                 /*
+                                 * If tegra port then clear the rx fifo to
+                                 * accept another break/character.
+                                 */
+                                if (up->port.type == PORT_TEGRA)
+                                        clear_rx_fifo(up);
+
+                                /*
                                  * We do the SysRQ and SAK checking
                                  * here because otherwise the break
                                  * may get masked by ignore_status_mask
@@ -2405,7 +2439,9 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
                         UART_ENABLE_MS(&up->port, termios->c_cflag))
                 up->ier |= UART_IER_MSI;
         if (up->capabilities & UART_CAP_UUE)
-                up->ier |= UART_IER_UUE | UART_IER_RTOIE;
+                up->ier |= UART_IER_UUE;
+        if (up->capabilities & UART_CAP_RTOIE)
+                up->ier |= UART_IER_RTOIE;
 
         serial_out(up, UART_IER, up->ier);
 
diff --git a/drivers/tty/serial/8250.h b/drivers/tty/serial/8250.h
index 6e19ea3e48d5..6edf4a6a22d4 100644
--- a/drivers/tty/serial/8250.h
+++ b/drivers/tty/serial/8250.h
@@ -1,6 +1,4 @@
 /*
- *  linux/drivers/char/8250.h
- *
  *  Driver for 8250/16550-type serial ports
  *
  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
@@ -44,6 +42,7 @@ struct serial8250_config {
 #define UART_CAP_SLEEP  (1 << 10)       /* UART has IER sleep */
 #define UART_CAP_AFE    (1 << 11)       /* MCR-based hw flow control */
 #define UART_CAP_UUE    (1 << 12)       /* UART needs IER bit 6 set (Xscale) */
+#define UART_CAP_RTOIE  (1 << 13)       /* UART needs IER bit 4 set (Xscale, Tegra) */
 
 #define UART_BUG_QUOT   (1 << 0)        /* UART has buggy quot LSB */
 #define UART_BUG_TXEN   (1 << 1)        /* UART has buggy TX IIR status */
diff --git a/drivers/tty/serial/8250_accent.c b/drivers/tty/serial/8250_accent.c
index 9c10262f2469..34b51c651192 100644
--- a/drivers/tty/serial/8250_accent.c
+++ b/drivers/tty/serial/8250_accent.c
@@ -1,6 +1,4 @@
 /*
- *  linux/drivers/serial/8250_accent.c
- *
  *  Copyright (C) 2005 Russell King.
  *  Data taken from include/asm-i386/serial.h
  *
diff --git a/drivers/tty/serial/8250_boca.c b/drivers/tty/serial/8250_boca.c
index 3bfe0f7b26fb..d125dc107985 100644
--- a/drivers/tty/serial/8250_boca.c
+++ b/drivers/tty/serial/8250_boca.c
@@ -1,6 +1,4 @@
 /*
- *  linux/drivers/serial/8250_boca.c
- *
  *  Copyright (C) 2005 Russell King.
  *  Data taken from include/asm-i386/serial.h
  *
diff --git a/drivers/tty/serial/8250_exar_st16c554.c b/drivers/tty/serial/8250_exar_st16c554.c
index 567143ace159..bf53aabf9b5e 100644
--- a/drivers/tty/serial/8250_exar_st16c554.c
+++ b/drivers/tty/serial/8250_exar_st16c554.c
@@ -1,6 +1,4 @@
 /*
- *  linux/drivers/serial/8250_exar.c
- *
  *  Written by Paul B Schroeder < pschroeder "at" uplogix "dot" com >
  *  Based on 8250_boca.
  *
diff --git a/drivers/tty/serial/8250_fourport.c b/drivers/tty/serial/8250_fourport.c
index 6375d68b7913..be1582609626 100644
--- a/drivers/tty/serial/8250_fourport.c
+++ b/drivers/tty/serial/8250_fourport.c
@@ -1,6 +1,4 @@
 /*
- *  linux/drivers/serial/8250_fourport.c
- *
  *  Copyright (C) 2005 Russell King.
  *  Data taken from include/asm-i386/serial.h
  *
diff --git a/drivers/tty/serial/8250_hub6.c b/drivers/tty/serial/8250_hub6.c
index 7609150e7d5e..a5c778e83de0 100644
--- a/drivers/tty/serial/8250_hub6.c
+++ b/drivers/tty/serial/8250_hub6.c
@@ -1,6 +1,4 @@
 /*
- *  linux/drivers/serial/8250_hub6.c
- *
  *  Copyright (C) 2005 Russell King.
  *  Data taken from include/asm-i386/serial.h
  *
diff --git a/drivers/tty/serial/8250_mca.c b/drivers/tty/serial/8250_mca.c
index d10be944ad44..d20abf04541e 100644
--- a/drivers/tty/serial/8250_mca.c
+++ b/drivers/tty/serial/8250_mca.c
@@ -1,6 +1,4 @@
 /*
- *  linux/drivers/serial/8250_mca.c
- *
  *  Copyright (C) 2005 Russell King.
  *  Data taken from include/asm-i386/serial.h
  *
diff --git a/drivers/tty/serial/8250_pci.c b/drivers/tty/serial/8250_pci.c
index 738cec9807d3..4b4968a294b2 100644
--- a/drivers/tty/serial/8250_pci.c
+++ b/drivers/tty/serial/8250_pci.c
@@ -1,6 +1,4 @@
 /*
- *  linux/drivers/char/8250_pci.c
- *
  *  Probe module for 8250/16550-type PCI serial ports.
  *
  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
@@ -973,6 +971,14 @@ ce4100_serial_setup(struct serial_private *priv,
         return ret;
 }
 
+static int
+pci_omegapci_setup(struct serial_private *priv,
+                      struct pciserial_board *board,
+                      struct uart_port *port, int idx)
+{
+        return setup_port(priv, port, 2, idx * 8, 0);
+}
+
 static int skip_tx_en_setup(struct serial_private *priv,
                         const struct pciserial_board *board,
                         struct uart_port *port, int idx)
@@ -1012,6 +1018,8 @@ static int skip_tx_en_setup(struct serial_private *priv,
 #define PCI_DEVICE_ID_TITAN_200EI       0xA016
 #define PCI_DEVICE_ID_TITAN_200EISI     0xA017
 #define PCI_DEVICE_ID_OXSEMI_16PCI958   0x9538
+#define PCIE_DEVICE_ID_NEO_2_OX_IBM     0x00F6
+#define PCI_DEVICE_ID_PLX_CRONYX_OMEGA  0xc001
 
 /* Unknown vendors/cards - this should not be in linux/pci_ids.h */
 #define PCI_SUBDEVICE_ID_UNKNOWN_0x1584 0x1584
@@ -1412,7 +1420,7 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
                 .setup          = pci_default_setup,
         },
         /*
-         * For Oxford Semiconductor and Mainpine
+         * For Oxford Semiconductor Tornado based devices
          */
         {
                 .vendor         = PCI_VENDOR_ID_OXSEMI,
@@ -1430,6 +1438,24 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
                 .init           = pci_oxsemi_tornado_init,
                 .setup          = pci_default_setup,
         },
+        {
+                .vendor         = PCI_VENDOR_ID_DIGI,
+                .device         = PCIE_DEVICE_ID_NEO_2_OX_IBM,
+                .subvendor              = PCI_SUBVENDOR_ID_IBM,
+                .subdevice              = PCI_ANY_ID,
+                .init                   = pci_oxsemi_tornado_init,
+                .setup          = pci_default_setup,
+        },
+        /*
+         * Cronyx Omega PCI (PLX-chip based)
+         */
+        {
+                .vendor         = PCI_VENDOR_ID_PLX,
+                .device         = PCI_DEVICE_ID_PLX_CRONYX_OMEGA,
+                .subvendor      = PCI_ANY_ID,
+                .subdevice      = PCI_ANY_ID,
+                .setup          = pci_omegapci_setup,
+         },
         /*
          * Default "match everything" terminator entry
          */
@@ -1617,6 +1643,7 @@ enum pci_board_num_t {
         pbn_ADDIDATA_PCIe_4_3906250,
         pbn_ADDIDATA_PCIe_8_3906250,
         pbn_ce4100_1_115200,
+        pbn_omegapci,
 };
 
 /*
@@ -2312,6 +2339,12 @@ static struct pciserial_board pci_boards[] __devinitdata = {
                 .base_baud      = 921600,
                 .reg_shift      = 2,
         },
+        [pbn_omegapci] = {
+                .flags          = FL_BASE0,
+                .num_ports      = 8,
+                .base_baud      = 115200,
+                .uart_offset    = 0x200,
+        },
 };
 
 static const struct pci_device_id softmodem_blacklist[] = {
@@ -3075,6 +3108,14 @@ static struct pci_device_id serial_pci_tbl[] = {
         {       PCI_VENDOR_ID_MAINPINE, 0x4000, /* IQ Express 8 Port V.34 Super-G3 Fax */
                 PCI_VENDOR_ID_MAINPINE, 0x4008, 0, 0,
                 pbn_oxsemi_8_4000000 },
+
+        /*
+         * Digi/IBM PCIe 2-port Async EIA-232 Adapter utilizing OxSemi Tornado
+         */
+        {       PCI_VENDOR_ID_DIGI, PCIE_DEVICE_ID_NEO_2_OX_IBM,
+                PCI_SUBVENDOR_ID_IBM, PCI_ANY_ID, 0, 0,
+                pbn_oxsemi_2_4000000 },
+
         /*
          * SBS Technologies, Inc. P-Octal and PMC-OCTPRO cards,
          * from skokodyn@yahoo.com
@@ -3801,6 +3842,12 @@ static struct pci_device_id serial_pci_tbl[] = {
                 PCI_ANY_ID,  PCI_ANY_ID, 0, 0,
                 pbn_ce4100_1_115200 },
 
+        /*
+         * Cronyx Omega PCI
+         */
+        {       PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_CRONYX_OMEGA,
+                PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+                pbn_omegapci },
 
         /*
          * These entries match devices with class COMMUNICATION_SERIAL,
diff --git a/drivers/tty/serial/8250_pnp.c b/drivers/tty/serial/8250_pnp.c
index 4822cb50cd0f..fc301f6722e1 100644
--- a/drivers/tty/serial/8250_pnp.c
+++ b/drivers/tty/serial/8250_pnp.c
@@ -1,6 +1,4 @@
 /*
- *  linux/drivers/char/8250_pnp.c
- *
  *  Probe module for 8250/16550-type ISAPNP serial ports.
  *
  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index b1f0f83b870d..636144cea932 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -537,7 +537,7 @@ config SERIAL_S3C6400
 
 config SERIAL_S5PV210
         tristate "Samsung S5PV210 Serial port support"
-        depends on SERIAL_SAMSUNG && (CPU_S5PV210 || CPU_S5P6442 || CPU_EXYNOS4210)
+        depends on SERIAL_SAMSUNG && (CPU_S5PV210 || CPU_EXYNOS4210)
         select SERIAL_SAMSUNG_UARTS_4 if (CPU_S5PV210 || CPU_EXYNOS4210)
         default y
         help
@@ -1585,7 +1585,7 @@ config SERIAL_IFX6X60
           Support for the IFX6x60 modem devices on Intel MID platforms.
 
 config SERIAL_PCH_UART
-        tristate "Intel EG20T PCH UART/OKI SEMICONDUCTOR ML7213 IOH"
+        tristate "Intel EG20T PCH / OKI SEMICONDUCTOR IOH(ML7213/ML7223) UART"
         depends on PCI
         select SERIAL_CORE
         help
@@ -1593,10 +1593,12 @@ config SERIAL_PCH_UART
           which is an IOH(Input/Output Hub) for x86 embedded processor.
           Enabling PCH_DMA, this PCH UART works as DMA mode.
 
-          This driver also can be used for OKI SEMICONDUCTOR ML7213 IOH(Input/
-          Output Hub) which is for IVI(In-Vehicle Infotainment) use.
-          ML7213 is companion chip for Intel Atom E6xx series.
-          ML7213 is completely compatible for Intel EG20T PCH.
+          This driver also can be used for OKI SEMICONDUCTOR IOH(Input/
+          Output Hub), ML7213 and ML7223.
+          ML7213 IOH is for IVI(In-Vehicle Infotainment) use and ML7223 IOH is
+          for MP(Media Phone) use.
+          ML7213/ML7223 is companion chip for Intel Atom E6xx series.
+          ML7213/ML7223 is completely compatible for Intel EG20T PCH.
 
 config SERIAL_MSM_SMD
         bool "Enable tty device interface for some SMD ports"
@@ -1620,4 +1622,17 @@ config SERIAL_MXS_AUART_CONSOLE
         help
           Enable a MXS AUART port to be the system console.
 
+config SERIAL_XILINX_PS_UART
+        tristate "Xilinx PS UART support"
+        select SERIAL_CORE
+        help
+          This driver supports the Xilinx PS UART port.
+
+config SERIAL_XILINX_PS_UART_CONSOLE
+        bool "Xilinx PS UART console support"
+        depends on SERIAL_XILINX_PS_UART=y
+        select SERIAL_CORE_CONSOLE
+        help
+          Enable a Xilinx PS UART port to be the system console.
+
 endmenu
diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
index 35276043d9d1..cb2628fee4c7 100644
--- a/drivers/tty/serial/Makefile
+++ b/drivers/tty/serial/Makefile
@@ -95,3 +95,4 @@ obj-$(CONFIG_SERIAL_PCH_UART)	+= pch_uart.o
 obj-$(CONFIG_SERIAL_MSM_SMD)    += msm_smd_tty.o
 obj-$(CONFIG_SERIAL_MXS_AUART) += mxs-auart.o
 obj-$(CONFIG_SERIAL_LANTIQ)     += lantiq.o
+obj-$(CONFIG_SERIAL_XILINX_PS_UART) += xilinx_uartps.o
diff --git a/drivers/tty/serial/altera_uart.c b/drivers/tty/serial/altera_uart.c
index 6d5b036ac783..50bc5a5ac653 100644
--- a/drivers/tty/serial/altera_uart.c
+++ b/drivers/tty/serial/altera_uart.c
@@ -540,11 +540,14 @@ static int __devinit altera_uart_probe(struct platform_device *pdev)
         int i = pdev->id;
         int ret;
 
-        /* -1 emphasizes that the platform must have one port, no .N suffix */
-        if (i == -1)
-                i = 0;
+        /* if id is -1 scan for a free id and use that one */
+        if (i == -1) {
+                for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS; i++)
+                        if (altera_uart_ports[i].port.mapbase == 0)
+                                break;
+        }
 
-        if (i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
+        if (i < 0 || i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
                 return -EINVAL;
 
         port = &altera_uart_ports[i].port;
@@ -587,6 +590,8 @@ static int __devinit altera_uart_probe(struct platform_device *pdev)
         port->ops = &altera_uart_ops;
         port->flags = UPF_BOOT_AUTOCONF;
 
+        dev_set_drvdata(&pdev->dev, port);
+
         uart_add_one_port(&altera_uart_driver, port);
 
         return 0;
@@ -594,14 +599,13 @@ static int __devinit altera_uart_probe(struct platform_device *pdev)
 
 static int __devexit altera_uart_remove(struct platform_device *pdev)
 {
-        struct uart_port *port;
-        int i = pdev->id;
+        struct uart_port *port = dev_get_drvdata(&pdev->dev);
 
-        if (i == -1)
-                i = 0;
-
-        port = &altera_uart_ports[i].port;
-        uart_remove_one_port(&altera_uart_driver, port);
+        if (port) {
+                uart_remove_one_port(&altera_uart_driver, port);
+                dev_set_drvdata(&pdev->dev, NULL);
+                port->mapbase = 0;
+        }
 
         return 0;
 }
diff --git a/drivers/tty/serial/amba-pl010.c b/drivers/tty/serial/amba-pl010.c
index d742dd2c525c..c0d10c4ddb73 100644
--- a/drivers/tty/serial/amba-pl010.c
+++ b/drivers/tty/serial/amba-pl010.c
@@ -1,6 +1,4 @@
 /*
- *  linux/drivers/char/amba.c
- *
  *  Driver for AMBA serial ports
  *
  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
index 6deee4e546be..8dc0541feecc 100644
--- a/drivers/tty/serial/amba-pl011.c
+++ b/drivers/tty/serial/amba-pl011.c
@@ -1,6 +1,4 @@
 /*
- *  linux/drivers/char/amba.c
- *
  *  Driver for AMBA serial ports
  *
  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
index f119d1761106..652bdac8ce8e 100644
--- a/drivers/tty/serial/atmel_serial.c
+++ b/drivers/tty/serial/atmel_serial.c
@@ -1,6 +1,4 @@
 /*
- *  linux/drivers/char/atmel_serial.c
- *
  *  Driver for Atmel AT91 / AT32 Serial ports
  *  Copyright (C) 2003 Rick Bronson
  *
diff --git a/drivers/tty/serial/clps711x.c b/drivers/tty/serial/clps711x.c
index b6acd19b458e..e6c3dbd781d6 100644
--- a/drivers/tty/serial/clps711x.c
+++ b/drivers/tty/serial/clps711x.c
@@ -1,6 +1,4 @@
 /*
- *  linux/drivers/char/clps711x.c
- *
  *  Driver for CLPS711x serial ports
  *
  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
diff --git a/drivers/tty/serial/cpm_uart/cpm_uart.h b/drivers/tty/serial/cpm_uart/cpm_uart.h
index b754dcf0fda5..cf34d26ff6cd 100644
--- a/drivers/tty/serial/cpm_uart/cpm_uart.h
+++ b/drivers/tty/serial/cpm_uart/cpm_uart.h
@@ -1,6 +1,4 @@
 /*
- *  linux/drivers/serial/cpm_uart.h
- *
  *  Driver for CPM (SCC/SMC) serial ports
  *
  *  Copyright (C) 2004 Freescale Semiconductor, Inc.
diff --git a/drivers/tty/serial/cpm_uart/cpm_uart_core.c b/drivers/tty/serial/cpm_uart/cpm_uart_core.c
index a9a6a5fd169e..9488da74d4f7 100644
--- a/drivers/tty/serial/cpm_uart/cpm_uart_core.c
+++ b/drivers/tty/serial/cpm_uart/cpm_uart_core.c
@@ -1,6 +1,4 @@
 /*
- *  linux/drivers/serial/cpm_uart.c
- *
  *  Driver for CPM (SCC/SMC) serial ports; core driver
  *
  *  Based on arch/ppc/cpm2_io/uart.c by Dan Malek
diff --git a/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.c b/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.c
index 3fc1d66e32c6..18f79575894a 100644
--- a/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.c
+++ b/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.c
@@ -1,6 +1,4 @@
 /*
- *  linux/drivers/serial/cpm_uart.c
- *
  *  Driver for CPM (SCC/SMC) serial ports; CPM1 definitions
  *
  *  Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2)
diff --git a/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.h b/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.h
index 10eecd6af6d4..60c7e94cde1e 100644
--- a/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.h
+++ b/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.h
@@ -1,6 +1,4 @@
 /*
- * linux/drivers/serial/cpm_uart/cpm_uart_cpm1.h
- *
  * Driver for CPM (SCC/SMC) serial ports
  *
  * definitions for cpm1
diff --git a/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.c b/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.c
index 814ac006393f..a4927e66e741 100644
--- a/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.c
+++ b/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.c
@@ -1,6 +1,4 @@
 /*
- *  linux/drivers/serial/cpm_uart_cpm2.c
- *
  *  Driver for CPM (SCC/SMC) serial ports; CPM2 definitions
  *
  *  Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2)
diff --git a/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.h b/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.h
index 7194c63dcf5f..51e651a69938 100644
--- a/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.h
+++ b/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.h
@@ -1,6 +1,4 @@
 /*
- * linux/drivers/serial/cpm_uart/cpm_uart_cpm2.h
- *
  * Driver for CPM (SCC/SMC) serial ports
  *
  * definitions for cpm2
diff --git a/drivers/tty/serial/ifx6x60.c b/drivers/tty/serial/ifx6x60.c
index 8ee5a41d340d..5315525220fb 100644
--- a/drivers/tty/serial/ifx6x60.c
+++ b/drivers/tty/serial/ifx6x60.c
@@ -41,7 +41,6 @@
 #include <linux/tty.h>
 #include <linux/device.h>
 #include <linux/spi/spi.h>
-#include <linux/tty.h>
 #include <linux/kfifo.h>
 #include <linux/tty_flip.h>
 #include <linux/timer.h>
@@ -56,7 +55,6 @@
 #include <linux/sched.h>
 #include <linux/time.h>
 #include <linux/wait.h>
-#include <linux/tty.h>
 #include <linux/pm.h>
 #include <linux/pm_runtime.h>
 #include <linux/spi/ifx_modem.h>
diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
index 62df72d9f0aa..a54473123e0a 100644
--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -1,6 +1,4 @@
 /*
- *  linux/drivers/serial/imx.c
- *
  *  Driver for Motorola IMX serial ports
  *
  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
diff --git a/drivers/tty/serial/msm_serial.c b/drivers/tty/serial/msm_serial.c
index bfee9b4c6661..e6ba83876508 100644
--- a/drivers/tty/serial/msm_serial.c
+++ b/drivers/tty/serial/msm_serial.c
@@ -1,5 +1,5 @@
 /*
- * drivers/serial/msm_serial.c - driver for msm7k serial device and console
+ * Driver for msm7k serial device and console
  *
  * Copyright (C) 2007 Google, Inc.
  * Author: Robert Love <rlove@google.com>
diff --git a/drivers/tty/serial/msm_serial.h b/drivers/tty/serial/msm_serial.h
index 9b8dc5d0d855..e4acef5de77e 100644
--- a/drivers/tty/serial/msm_serial.h
+++ b/drivers/tty/serial/msm_serial.h
@@ -1,6 +1,4 @@
 /*
- * drivers/serial/msm_serial.h
- *
  * Copyright (C) 2007 Google, Inc.
  * Author: Robert Love <rlove@google.com>
  * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
diff --git a/drivers/tty/serial/msm_smd_tty.c b/drivers/tty/serial/msm_smd_tty.c
index beeff1e86093..4f41dcdcb771 100644
--- a/drivers/tty/serial/msm_smd_tty.c
+++ b/drivers/tty/serial/msm_smd_tty.c
@@ -1,5 +1,4 @@
-/* drivers/tty/serial/msm_smd_tty.c
- *
+/*
  * Copyright (C) 2007 Google, Inc.
  * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
  * Author: Brian Swetland <swetland@google.com>
diff --git a/drivers/tty/serial/netx-serial.c b/drivers/tty/serial/netx-serial.c
index 7735c9f35fa0..d40da78e7c85 100644
--- a/drivers/tty/serial/netx-serial.c
+++ b/drivers/tty/serial/netx-serial.c
@@ -1,6 +1,4 @@
 /*
- * drivers/serial/netx-serial.c
- *
  * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
  *
  * This program is free software; you can redistribute it and/or modify
diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c
index 26403b8e4b9b..c63d0d152af6 100644
--- a/drivers/tty/serial/pch_uart.c
+++ b/drivers/tty/serial/pch_uart.c
@@ -253,6 +253,8 @@ enum pch_uart_num_t {
         pch_ml7213_uart0,
         pch_ml7213_uart1,
         pch_ml7213_uart2,
+        pch_ml7223_uart0,
+        pch_ml7223_uart1,
 };
 
 static struct pch_uart_driver_data drv_dat[] = {
@@ -263,6 +265,8 @@ static struct pch_uart_driver_data drv_dat[] = {
         [pch_ml7213_uart0] = {PCH_UART_8LINE, 0},
         [pch_ml7213_uart1] = {PCH_UART_2LINE, 1},
         [pch_ml7213_uart2] = {PCH_UART_2LINE, 2},
+        [pch_ml7223_uart0] = {PCH_UART_8LINE, 0},
+        [pch_ml7223_uart1] = {PCH_UART_2LINE, 1},
 };
 
 static unsigned int default_baud = 9600;
@@ -1534,6 +1538,10 @@ static DEFINE_PCI_DEVICE_TABLE(pch_uart_pci_id) = {
          .driver_data = pch_ml7213_uart1},
         {PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x8029),
          .driver_data = pch_ml7213_uart2},
+        {PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x800C),
+         .driver_data = pch_ml7223_uart0},
+        {PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x800D),
+         .driver_data = pch_ml7223_uart1},
         {0,},
 };
 
diff --git a/drivers/tty/serial/pmac_zilog.c b/drivers/tty/serial/pmac_zilog.c
index e1c8d4f1ce58..5acd24a27d08 100644
--- a/drivers/tty/serial/pmac_zilog.c
+++ b/drivers/tty/serial/pmac_zilog.c
@@ -1,6 +1,4 @@
 /*
- * linux/drivers/serial/pmac_zilog.c
- * 
  * Driver for PowerMac Z85c30 based ESCC cell found in the
  * "macio" ASICs of various PowerMac models
  * 
diff --git a/drivers/tty/serial/pxa.c b/drivers/tty/serial/pxa.c
index 1102a39b44f5..4302e6e3768e 100644
--- a/drivers/tty/serial/pxa.c
+++ b/drivers/tty/serial/pxa.c
@@ -1,6 +1,4 @@
 /*
- *  linux/drivers/serial/pxa.c
- *
  *  Based on drivers/serial/8250.c by Russell King.
  *
  *  Author:     Nicolas Pitre
diff --git a/drivers/tty/serial/s3c2400.c b/drivers/tty/serial/s3c2400.c
index fed1a9a1ffb4..d13051b3df87 100644
--- a/drivers/tty/serial/s3c2400.c
+++ b/drivers/tty/serial/s3c2400.c
@@ -1,5 +1,4 @@
-/* linux/drivers/serial/s3c240.c
- *
+/*
  * Driver for Samsung SoC onboard UARTs.
  *
  * Ben Dooks, Copyright (c) 2003-2005 Simtec Electronics
diff --git a/drivers/tty/serial/s3c2410.c b/drivers/tty/serial/s3c2410.c
index 73f089d3efd6..bffe6ff9b158 100644
--- a/drivers/tty/serial/s3c2410.c
+++ b/drivers/tty/serial/s3c2410.c
@@ -1,5 +1,4 @@
-/* linux/drivers/serial/s3c2410.c
- *
+/*
  * Driver for Samsung S3C2410 SoC onboard UARTs.
  *
  * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
diff --git a/drivers/tty/serial/s3c2412.c b/drivers/tty/serial/s3c2412.c
index 1700b1a2fb7e..7e2b9504a687 100644
--- a/drivers/tty/serial/s3c2412.c
+++ b/drivers/tty/serial/s3c2412.c
@@ -1,5 +1,4 @@
-/* linux/drivers/serial/s3c2412.c
- *
+/*
  * Driver for Samsung S3C2412 and S3C2413 SoC onboard UARTs.
  *
  * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
diff --git a/drivers/tty/serial/s3c2440.c b/drivers/tty/serial/s3c2440.c
index 094cc3904b13..9e10d415d5fd 100644
--- a/drivers/tty/serial/s3c2440.c
+++ b/drivers/tty/serial/s3c2440.c
@@ -1,5 +1,4 @@
-/* linux/drivers/serial/s3c2440.c
- *
+/*
  * Driver for Samsung S3C2440 and S3C2442 SoC onboard UARTs.
  *
  * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
diff --git a/drivers/tty/serial/s3c24a0.c b/drivers/tty/serial/s3c24a0.c
index fad6083ca427..914eff22e499 100644
--- a/drivers/tty/serial/s3c24a0.c
+++ b/drivers/tty/serial/s3c24a0.c
@@ -1,5 +1,4 @@
-/* linux/drivers/serial/s3c24a0.c
- *
+/*
  * Driver for Samsung S3C24A0 SoC onboard UARTs.
  *
  * Based on drivers/serial/s3c2410.c
diff --git a/drivers/tty/serial/s3c6400.c b/drivers/tty/serial/s3c6400.c
index 4be92ab50058..ded26c42ff37 100644
--- a/drivers/tty/serial/s3c6400.c
+++ b/drivers/tty/serial/s3c6400.c
@@ -1,5 +1,4 @@
-/* linux/drivers/serial/s3c6400.c
- *
+/*
  * Driver for Samsung S3C6400 and S3C6410 SoC onboard UARTs.
  *
  * Copyright 2008 Openmoko,  Inc.
diff --git a/drivers/tty/serial/s5pv210.c b/drivers/tty/serial/s5pv210.c
index 6ebccd70a707..fb2619f93d84 100644
--- a/drivers/tty/serial/s5pv210.c
+++ b/drivers/tty/serial/s5pv210.c
@@ -1,5 +1,4 @@
-/* linux/drivers/serial/s5pv210.c
- *
+/*
  * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  *              http://www.samsung.com/
  *
diff --git a/drivers/tty/serial/sa1100.c b/drivers/tty/serial/sa1100.c
index 2199d819a987..ef7a21a6a01b 100644
--- a/drivers/tty/serial/sa1100.c
+++ b/drivers/tty/serial/sa1100.c
@@ -1,6 +1,4 @@
 /*
- *  linux/drivers/char/sa1100.c
- *
  *  Driver for SA11x0 serial ports
  *
  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index 9e2fa8d784e2..f66f64829303 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -1,5 +1,4 @@
-/* linux/drivers/serial/samsuing.c
- *
+/*
  * Driver core for Samsung SoC onboard UARTs.
  *
  * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
diff --git a/drivers/tty/serial/samsung.h b/drivers/tty/serial/samsung.h
index 0ac06a07d25f..5b098cd76040 100644
--- a/drivers/tty/serial/samsung.h
+++ b/drivers/tty/serial/samsung.h
@@ -1,5 +1,4 @@
-/* linux/drivers/serial/samsung.h
- *
+/*
  * Driver for Samsung SoC onboard UARTs.
  *
  * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
diff --git a/drivers/tty/serial/sb1250-duart.c b/drivers/tty/serial/sb1250-duart.c
index 602d9845c52f..ea2340b814e9 100644
--- a/drivers/tty/serial/sb1250-duart.c
+++ b/drivers/tty/serial/sb1250-duart.c
@@ -1,6 +1,4 @@
 /*
- *      drivers/serial/sb1250-duart.c
- *
  *      Support for the asynchronous serial interface (DUART) included
  *      in the BCM1250 and derived System-On-a-Chip (SOC) devices.
  *
diff --git a/drivers/tty/serial/serial_core.c b/drivers/tty/serial/serial_core.c
index 733fe8e73f0f..db7912cb7ae0 100644
--- a/drivers/tty/serial/serial_core.c
+++ b/drivers/tty/serial/serial_core.c
@@ -1,6 +1,4 @@
 /*
- *  linux/drivers/char/core.c
- *
  *  Driver core for serial ports
  *
  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
@@ -172,12 +170,16 @@ static int uart_startup(struct tty_struct *tty, struct uart_state *state, int in
 
         retval = uport->ops->startup(uport);
         if (retval == 0) {
-                if (init_hw) {
-                        /*
-                         * Initialise the hardware port settings.
-                         */
-                        uart_change_speed(tty, state, NULL);
+                if (uart_console(uport) && uport->cons->cflag) {
+                        tty->termios->c_cflag = uport->cons->cflag;
+                        uport->cons->cflag = 0;
+                }
+                /*
+                 * Initialise the hardware port settings.
+                 */
+                uart_change_speed(tty, state, NULL);
 
+                if (init_hw) {
                         /*
                          * Setup the RTS and DTR signals once the
                          * port is open and ready to respond.
@@ -1240,17 +1242,6 @@ static void uart_set_termios(struct tty_struct *tty,
                 }
                 spin_unlock_irqrestore(&state->uart_port->lock, flags);
         }
-#if 0
-        /*
-         * No need to wake up processes in open wait, since they
-         * sample the CLOCAL flag once, and don't recheck it.
-         * XXX  It's not clear whether the current behavior is correct
-         * or not.  Hence, this may change.....
-         */
-        if (!(old_termios->c_cflag & CLOCAL) &&
-            (tty->termios->c_cflag & CLOCAL))
-                wake_up_interruptible(&state->uart_port.open_wait);
-#endif
 }
 
 /*
@@ -1423,7 +1414,6 @@ static void __uart_wait_until_sent(struct uart_port *port, int timeout)
                 if (time_after(jiffies, expire))
                         break;
         }
-        set_current_state(TASK_RUNNING); /* might not be needed */
 }
 
 static void uart_wait_until_sent(struct tty_struct *tty, int timeout)
@@ -1466,45 +1456,6 @@ static void uart_hangup(struct tty_struct *tty)
         mutex_unlock(&port->mutex);
 }
 
-/**
- *      uart_update_termios     -       update the terminal hw settings
- *      @tty: tty associated with UART
- *      @state: UART to update
- *
- *      Copy across the serial console cflag setting into the termios settings
- *      for the initial open of the port.  This allows continuity between the
- *      kernel settings, and the settings init adopts when it opens the port
- *      for the first time.
- */
-static void uart_update_termios(struct tty_struct *tty,
-                                                struct uart_state *state)
-{
-        struct uart_port *port = state->uart_port;
-
-        if (uart_console(port) && port->cons->cflag) {
-                tty->termios->c_cflag = port->cons->cflag;
-                port->cons->cflag = 0;
-        }
-
-        /*
-         * If the device failed to grab its irq resources,
-         * or some other error occurred, don't try to talk
-         * to the port hardware.
-         */
-        if (!(tty->flags & (1 << TTY_IO_ERROR))) {
-                /*
-                 * Make termios settings take effect.
-                 */
-                uart_change_speed(tty, state, NULL);
-
-                /*
-                 * And finally enable the RTS and DTR signals.
-                 */
-                if (tty->termios->c_cflag & CBAUD)
-                        uart_set_mctrl(port, TIOCM_DTR | TIOCM_RTS);
-        }
-}
-
 static int uart_carrier_raised(struct tty_port *port)
 {
         struct uart_state *state = container_of(port, struct uart_state, port);
@@ -1524,16 +1475,8 @@ static void uart_dtr_rts(struct tty_port *port, int onoff)
         struct uart_state *state = container_of(port, struct uart_state, port);
         struct uart_port *uport = state->uart_port;
 
-        if (onoff) {
+        if (onoff)
                 uart_set_mctrl(uport, TIOCM_DTR | TIOCM_RTS);
-
-                /*
-                 * If this is the first open to succeed,
-                 * adjust things to suit.
-                 */
-                if (!test_and_set_bit(ASYNCB_NORMAL_ACTIVE, &port->flags))
-                        uart_update_termios(port->tty, state);
-        }
         else
                 uart_clear_mctrl(uport, TIOCM_DTR | TIOCM_RTS);
 }
@@ -1586,15 +1529,6 @@ static int uart_open(struct tty_struct *tty, struct file *filp)
         pr_debug("uart_open(%d) called\n", line);
 
         /*
-         * tty->driver->num won't change, so we won't fail here with
-         * tty->driver_data set to something non-NULL (and therefore
-         * we won't get caught by uart_close()).
-         */
-        retval = -ENODEV;
-        if (line >= tty->driver->num)
-                goto fail;
-
-        /*
          * We take the semaphore inside uart_get to guarantee that we won't
          * be re-entered while allocating the state structure, or while we
          * request any IRQs that the driver may need.  This also has the nice
@@ -1972,13 +1906,9 @@ int uart_suspend_port(struct uart_driver *drv, struct uart_port *uport)
         struct tty_port *port = &state->port;
         struct device *tty_dev;
         struct uart_match match = {uport, drv};
-        struct tty_struct *tty;
 
         mutex_lock(&port->mutex);
 
-        /* Must be inside the mutex lock until we convert to tty_port */
-        tty = port->tty;
-
         tty_dev = device_find_child(uport->dev, &match, serial_match_port);
         if (device_may_wakeup(tty_dev)) {
                 if (!enable_irq_wake(uport->irq))
diff --git a/drivers/tty/serial/serial_ks8695.c b/drivers/tty/serial/serial_ks8695.c
index b1962025b1aa..2430319f2f52 100644
--- a/drivers/tty/serial/serial_ks8695.c
+++ b/drivers/tty/serial/serial_ks8695.c
@@ -1,6 +1,4 @@
 /*
- *  drivers/serial/serial_ks8695.c
- *
  *  Driver for KS8695 serial ports
  *
  *  Based on drivers/serial/serial_amba.c, by Kam Lee.
diff --git a/drivers/tty/serial/serial_txx9.c b/drivers/tty/serial/serial_txx9.c
index c50e9fbbf743..8e3fc1944e6d 100644
--- a/drivers/tty/serial/serial_txx9.c
+++ b/drivers/tty/serial/serial_txx9.c
@@ -1,6 +1,4 @@
 /*
- *  drivers/serial/serial_txx9.c
- *
  * Derived from many drivers using generic_serial interface,
  * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
  * (was in Linux/VR tree) by Jim Pick.
diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index 920a6f929c8b..f35b8fb94b83 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -1,6 +1,4 @@
 /*
- * drivers/serial/sh-sci.c
- *
  * SuperH on-chip serial module support.  (SCI with no FIFO / with FIFO)
  *
  *  Copyright (C) 2002 - 2011  Paul Mundt
diff --git a/drivers/tty/serial/vt8500_serial.c b/drivers/tty/serial/vt8500_serial.c
index 322bf56c0d89..37fc4e3d487c 100644
--- a/drivers/tty/serial/vt8500_serial.c
+++ b/drivers/tty/serial/vt8500_serial.c
@@ -1,6 +1,4 @@
 /*
- * drivers/serial/vt8500_serial.c
- *
  * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
  *
  * Based on msm_serial.c, which is:
diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
new file mode 100644
index 000000000000..19cc1e8149dd
--- /dev/null
+++ b/drivers/tty/serial/xilinx_uartps.c
@@ -0,0 +1,1113 @@
+/*
+ * Xilinx PS UART driver
+ *
+ * 2011 (c) Xilinx Inc.
+ *
+ * This program is free software; you can redistribute it
+ * and/or modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2 of the License, or (at your option) any
+ * later version.
+ *
+ */
+
+#include <linux/platform_device.h>
+#include <linux/serial_core.h>
+#include <linux/console.h>
+#include <linux/serial.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/of.h>
+
+#define XUARTPS_TTY_NAME        "ttyPS"
+#define XUARTPS_NAME            "xuartps"
+#define XUARTPS_MAJOR           0       /* use dynamic node allocation */
+#define XUARTPS_MINOR           0       /* works best with devtmpfs */
+#define XUARTPS_NR_PORTS        2
+#define XUARTPS_FIFO_SIZE       16      /* FIFO size */
+#define XUARTPS_REGISTER_SPACE  0xFFF
+
+#define xuartps_readl(offset)           ioread32(port->membase + offset)
+#define xuartps_writel(val, offset)     iowrite32(val, port->membase + offset)
+
+/********************************Register Map********************************/
+/** UART
+ *
+ * Register offsets for the UART.
+ *
+ */
+#define XUARTPS_CR_OFFSET       0x00  /* Control Register [8:0] */
+#define XUARTPS_MR_OFFSET       0x04  /* Mode Register [10:0] */
+#define XUARTPS_IER_OFFSET      0x08  /* Interrupt Enable [10:0] */
+#define XUARTPS_IDR_OFFSET      0x0C  /* Interrupt Disable [10:0] */
+#define XUARTPS_IMR_OFFSET      0x10  /* Interrupt Mask [10:0] */
+#define XUARTPS_ISR_OFFSET      0x14  /* Interrupt Status [10:0]*/
+#define XUARTPS_BAUDGEN_OFFSET  0x18  /* Baud Rate Generator [15:0] */
+#define XUARTPS_RXTOUT_OFFSET   0x1C  /* RX Timeout [7:0] */
+#define XUARTPS_RXWM_OFFSET     0x20  /* RX FIFO Trigger Level [5:0] */
+#define XUARTPS_MODEMCR_OFFSET  0x24  /* Modem Control [5:0] */
+#define XUARTPS_MODEMSR_OFFSET  0x28  /* Modem Status [8:0] */
+#define XUARTPS_SR_OFFSET       0x2C  /* Channel Status [11:0] */
+#define XUARTPS_FIFO_OFFSET     0x30  /* FIFO [15:0] or [7:0] */
+#define XUARTPS_BAUDDIV_OFFSET  0x34  /* Baud Rate Divider [7:0] */
+#define XUARTPS_FLOWDEL_OFFSET  0x38  /* Flow Delay [15:0] */
+#define XUARTPS_IRRX_PWIDTH_OFFSET 0x3C /* IR Minimum Received Pulse
+                                                Width [15:0] */
+#define XUARTPS_IRTX_PWIDTH_OFFSET 0x40 /* IR Transmitted pulse
+                                                Width [7:0] */
+#define XUARTPS_TXWM_OFFSET     0x44  /* TX FIFO Trigger Level [5:0] */
+
+/** Control Register
+ *
+ * The Control register (CR) controls the major functions of the device.
+ *
+ * Control Register Bit Definitions
+ */
+#define XUARTPS_CR_STOPBRK      0x00000100  /* Stop TX break */
+#define XUARTPS_CR_STARTBRK     0x00000080  /* Set TX break */
+#define XUARTPS_CR_TX_DIS       0x00000020  /* TX disabled. */
+#define XUARTPS_CR_TX_EN        0x00000010  /* TX enabled */
+#define XUARTPS_CR_RX_DIS       0x00000008  /* RX disabled. */
+#define XUARTPS_CR_RX_EN        0x00000004  /* RX enabled */
+#define XUARTPS_CR_TXRST        0x00000002  /* TX logic reset */
+#define XUARTPS_CR_RXRST        0x00000001  /* RX logic reset */
+#define XUARTPS_CR_RST_TO       0x00000040  /* Restart Timeout Counter */
+
+/** Mode Register
+ *
+ * The mode register (MR) defines the mode of transfer as well as the data
+ * format. If this register is modified during transmission or reception,
+ * data validity cannot be guaranteed.
+ *
+ * Mode Register Bit Definitions
+ *
+ */
+#define XUARTPS_MR_CLKSEL               0x00000001  /* Pre-scalar selection */
+#define XUARTPS_MR_CHMODE_L_LOOP        0x00000200  /* Local loop back mode */
+#define XUARTPS_MR_CHMODE_NORM          0x00000000  /* Normal mode */
+
+#define XUARTPS_MR_STOPMODE_2_BIT       0x00000080  /* 2 stop bits */
+#define XUARTPS_MR_STOPMODE_1_BIT       0x00000000  /* 1 stop bit */
+
+#define XUARTPS_MR_PARITY_NONE          0x00000020  /* No parity mode */
+#define XUARTPS_MR_PARITY_MARK          0x00000018  /* Mark parity mode */
+#define XUARTPS_MR_PARITY_SPACE         0x00000010  /* Space parity mode */
+#define XUARTPS_MR_PARITY_ODD           0x00000008  /* Odd parity mode */
+#define XUARTPS_MR_PARITY_EVEN          0x00000000  /* Even parity mode */
+
+#define XUARTPS_MR_CHARLEN_6_BIT        0x00000006  /* 6 bits data */
+#define XUARTPS_MR_CHARLEN_7_BIT        0x00000004  /* 7 bits data */
+#define XUARTPS_MR_CHARLEN_8_BIT        0x00000000  /* 8 bits data */
+
+/** Interrupt Registers
+ *
+ * Interrupt control logic uses the interrupt enable register (IER) and the
+ * interrupt disable register (IDR) to set the value of the bits in the
+ * interrupt mask register (IMR). The IMR determines whether to pass an
+ * interrupt to the interrupt status register (ISR).
+ * Writing a 1 to IER Enables an interrupt, writing a 1 to IDR disables an
+ * interrupt. IMR and ISR are read only, and IER and IDR are write only.
+ * Reading either IER or IDR returns 0x00.
+ *
+ * All four registers have the same bit definitions.
+ */
+#define XUARTPS_IXR_TOUT        0x00000100 /* RX Timeout error interrupt */
+#define XUARTPS_IXR_PARITY      0x00000080 /* Parity error interrupt */
+#define XUARTPS_IXR_FRAMING     0x00000040 /* Framing error interrupt */
+#define XUARTPS_IXR_OVERRUN     0x00000020 /* Overrun error interrupt */
+#define XUARTPS_IXR_TXFULL      0x00000010 /* TX FIFO Full interrupt */
+#define XUARTPS_IXR_TXEMPTY     0x00000008 /* TX FIFO empty interrupt */
+#define XUARTPS_ISR_RXEMPTY     0x00000002 /* RX FIFO empty interrupt */
+#define XUARTPS_IXR_RXTRIG      0x00000001 /* RX FIFO trigger interrupt */
+#define XUARTPS_IXR_RXFULL      0x00000004 /* RX FIFO full interrupt. */
+#define XUARTPS_IXR_RXEMPTY     0x00000002 /* RX FIFO empty interrupt. */
+#define XUARTPS_IXR_MASK        0x00001FFF /* Valid bit mask */
+
+/** Channel Status Register
+ *
+ * The channel status register (CSR) is provided to enable the control logic
+ * to monitor the status of bits in the channel interrupt status register,
+ * even if these are masked out by the interrupt mask register.
+ */
+#define XUARTPS_SR_RXEMPTY      0x00000002 /* RX FIFO empty */
+#define XUARTPS_SR_TXEMPTY      0x00000008 /* TX FIFO empty */
+#define XUARTPS_SR_TXFULL       0x00000010 /* TX FIFO full */
+#define XUARTPS_SR_RXTRIG       0x00000001 /* Rx Trigger */
+
+/**
+ * xuartps_isr - Interrupt handler
+ * @irq: Irq number
+ * @dev_id: Id of the port
+ *
+ * Returns IRQHANDLED
+ **/
+static irqreturn_t xuartps_isr(int irq, void *dev_id)
+{
+        struct uart_port *port = (struct uart_port *)dev_id;
+        struct tty_struct *tty;
+        unsigned long flags;
+        unsigned int isrstatus, numbytes;
+        unsigned int data;
+        char status = TTY_NORMAL;
+
+        /* Get the tty which could be NULL so don't assume it's valid */
+        tty = tty_port_tty_get(&port->state->port);
+
+        spin_lock_irqsave(&port->lock, flags);
+
+        /* Read the interrupt status register to determine which
+         * interrupt(s) is/are active.
+         */
+        isrstatus = xuartps_readl(XUARTPS_ISR_OFFSET);
+
+        /* drop byte with parity error if IGNPAR specified */
+        if (isrstatus & port->ignore_status_mask & XUARTPS_IXR_PARITY)
+                isrstatus &= ~(XUARTPS_IXR_RXTRIG | XUARTPS_IXR_TOUT);
+
+        isrstatus &= port->read_status_mask;
+        isrstatus &= ~port->ignore_status_mask;
+
+        if ((isrstatus & XUARTPS_IXR_TOUT) ||
+                (isrstatus & XUARTPS_IXR_RXTRIG)) {
+                /* Receive Timeout Interrupt */
+                while ((xuartps_readl(XUARTPS_SR_OFFSET) &
+                        XUARTPS_SR_RXEMPTY) != XUARTPS_SR_RXEMPTY) {
+                        data = xuartps_readl(XUARTPS_FIFO_OFFSET);
+                        port->icount.rx++;
+
+                        if (isrstatus & XUARTPS_IXR_PARITY) {
+                                port->icount.parity++;
+                                status = TTY_PARITY;
+                        } else if (isrstatus & XUARTPS_IXR_FRAMING) {
+                                port->icount.frame++;
+                                status = TTY_FRAME;
+                        } else if (isrstatus & XUARTPS_IXR_OVERRUN)
+                                port->icount.overrun++;
+
+                        if (tty)
+                                uart_insert_char(port, isrstatus,
+                                                XUARTPS_IXR_OVERRUN, data,
+                                                status);
+                }
+                spin_unlock(&port->lock);
+                if (tty)
+                        tty_flip_buffer_push(tty);
+                spin_lock(&port->lock);
+        }
+
+        /* Dispatch an appropriate handler */
+        if ((isrstatus & XUARTPS_IXR_TXEMPTY) == XUARTPS_IXR_TXEMPTY) {
+                if (uart_circ_empty(&port->state->xmit)) {
+                        xuartps_writel(XUARTPS_IXR_TXEMPTY,
+                                                XUARTPS_IDR_OFFSET);
+                } else {
+                        numbytes = port->fifosize;
+                        /* Break if no more data available in the UART buffer */
+                        while (numbytes--) {
+                                if (uart_circ_empty(&port->state->xmit))
+                                        break;
+                                /* Get the data from the UART circular buffer
+                                 * and write it to the xuartps's TX_FIFO
+                                 * register.
+                                 */
+                                xuartps_writel(
+                                        port->state->xmit.buf[port->state->xmit.
+                                        tail], XUARTPS_FIFO_OFFSET);
+
+                                port->icount.tx++;
+
+                                /* Adjust the tail of the UART buffer and wrap
+                                 * the buffer if it reaches limit.
+                                 */
+                                port->state->xmit.tail =
+                                        (port->state->xmit.tail + 1) & \
+                                                (UART_XMIT_SIZE - 1);
+                        }
+
+                        if (uart_circ_chars_pending(
+                                        &port->state->xmit) < WAKEUP_CHARS)
+                                uart_write_wakeup(port);
+                }
+        }
+
+        xuartps_writel(isrstatus, XUARTPS_ISR_OFFSET);
+
+        /* be sure to release the lock and tty before leaving */
+        spin_unlock_irqrestore(&port->lock, flags);
+        tty_kref_put(tty);
+
+        return IRQ_HANDLED;
+}
+
+/**
+ * xuartps_set_baud_rate - Calculate and set the baud rate
+ * @port: Handle to the uart port structure
+ * @baud: Baud rate to set
+ *
+ * Returns baud rate, requested baud when possible, or actual baud when there
+ *      was too much error
+ **/
+static unsigned int xuartps_set_baud_rate(struct uart_port *port,
+                                                unsigned int baud)
+{
+        unsigned int sel_clk;
+        unsigned int calc_baud = 0;
+        unsigned int brgr_val, brdiv_val;
+        unsigned int bauderror;
+
+        /* Formula to obtain baud rate is
+         *      baud_tx/rx rate = sel_clk/CD * (BDIV + 1)
+         *      input_clk = (Uart User Defined Clock or Apb Clock)
+         *              depends on UCLKEN in MR Reg
+         *      sel_clk = input_clk or input_clk/8;
+         *              depends on CLKS in MR reg
+         *      CD and BDIV depends on values in
+         *                      baud rate generate register
+         *                      baud rate clock divisor register
+         */
+        sel_clk = port->uartclk;
+        if (xuartps_readl(XUARTPS_MR_OFFSET) & XUARTPS_MR_CLKSEL)
+                sel_clk = sel_clk / 8;
+
+        /* Find the best values for baud generation */
+        for (brdiv_val = 4; brdiv_val < 255; brdiv_val++) {
+
+                brgr_val = sel_clk / (baud * (brdiv_val + 1));
+                if (brgr_val < 2 || brgr_val > 65535)
+                        continue;
+
+                calc_baud = sel_clk / (brgr_val * (brdiv_val + 1));
+
+                if (baud > calc_baud)
+                        bauderror = baud - calc_baud;
+                else
+                        bauderror = calc_baud - baud;
+
+                /* use the values when percent error is acceptable */
+                if (((bauderror * 100) / baud) < 3) {
+                        calc_baud = baud;
+                        break;
+                }
+        }
+
+        /* Set the values for the new baud rate */
+        xuartps_writel(brgr_val, XUARTPS_BAUDGEN_OFFSET);
+        xuartps_writel(brdiv_val, XUARTPS_BAUDDIV_OFFSET);
+
+        return calc_baud;
+}
+
+/*----------------------Uart Operations---------------------------*/
+
+/**
+ * xuartps_start_tx -  Start transmitting bytes
+ * @port: Handle to the uart port structure
+ *
+ **/
+static void xuartps_start_tx(struct uart_port *port)
+{
+        unsigned int status, numbytes = port->fifosize;
+
+        if (uart_circ_empty(&port->state->xmit) || uart_tx_stopped(port))
+                return;
+
+        status = xuartps_readl(XUARTPS_CR_OFFSET);
+        /* Set the TX enable bit and clear the TX disable bit to enable the
+         * transmitter.
+         */
+        xuartps_writel((status & ~XUARTPS_CR_TX_DIS) | XUARTPS_CR_TX_EN,
+                XUARTPS_CR_OFFSET);
+
+        while (numbytes-- && ((xuartps_readl(XUARTPS_SR_OFFSET)
+                & XUARTPS_SR_TXFULL)) != XUARTPS_SR_TXFULL) {
+
+                /* Break if no more data available in the UART buffer */
+                if (uart_circ_empty(&port->state->xmit))
+                        break;
+
+                /* Get the data from the UART circular buffer and
+                 * write it to the xuartps's TX_FIFO register.
+                 */
+                xuartps_writel(
+                        port->state->xmit.buf[port->state->xmit.tail],
+                        XUARTPS_FIFO_OFFSET);
+                port->icount.tx++;
+
+                /* Adjust the tail of the UART buffer and wrap
+                 * the buffer if it reaches limit.
+                 */
+                port->state->xmit.tail = (port->state->xmit.tail + 1) &
+                                        (UART_XMIT_SIZE - 1);
+        }
+
+        /* Enable the TX Empty interrupt */
+        xuartps_writel(XUARTPS_IXR_TXEMPTY, XUARTPS_IER_OFFSET);
+
+        if (uart_circ_chars_pending(&port->state->xmit) < WAKEUP_CHARS)
+                uart_write_wakeup(port);
+}
+
+/**
+ * xuartps_stop_tx - Stop TX
+ * @port: Handle to the uart port structure
+ *
+ **/
+static void xuartps_stop_tx(struct uart_port *port)
+{
+        unsigned int regval;
+
+        regval = xuartps_readl(XUARTPS_CR_OFFSET);
+        regval |= XUARTPS_CR_TX_DIS;
+        /* Disable the transmitter */
+        xuartps_writel(regval, XUARTPS_CR_OFFSET);
+}
+
+/**
+ * xuartps_stop_rx - Stop RX
+ * @port: Handle to the uart port structure
+ *
+ **/
+static void xuartps_stop_rx(struct uart_port *port)
+{
+        unsigned int regval;
+
+        regval = xuartps_readl(XUARTPS_CR_OFFSET);
+        regval |= XUARTPS_CR_RX_DIS;
+        /* Disable the receiver */
+        xuartps_writel(regval, XUARTPS_CR_OFFSET);
+}
+
+/**
+ * xuartps_tx_empty -  Check whether TX is empty
+ * @port: Handle to the uart port structure
+ *
+ * Returns TIOCSER_TEMT on success, 0 otherwise
+ **/
+static unsigned int xuartps_tx_empty(struct uart_port *port)
+{
+        unsigned int status;
+
+        status = xuartps_readl(XUARTPS_ISR_OFFSET) & XUARTPS_IXR_TXEMPTY;
+        return status ? TIOCSER_TEMT : 0;
+}
+
+/**
+ * xuartps_break_ctl - Based on the input ctl we have to start or stop
+ *                      transmitting char breaks
+ * @port: Handle to the uart port structure
+ * @ctl: Value based on which start or stop decision is taken
+ *
+ **/
+static void xuartps_break_ctl(struct uart_port *port, int ctl)
+{
+        unsigned int status;
+        unsigned long flags;
+
+        spin_lock_irqsave(&port->lock, flags);
+
+        status = xuartps_readl(XUARTPS_CR_OFFSET);
+
+        if (ctl == -1)
+                xuartps_writel(XUARTPS_CR_STARTBRK | status,
+                                        XUARTPS_CR_OFFSET);
+        else {
+                if ((status & XUARTPS_CR_STOPBRK) == 0)
+                        xuartps_writel(XUARTPS_CR_STOPBRK | status,
+                                         XUARTPS_CR_OFFSET);
+        }
+        spin_unlock_irqrestore(&port->lock, flags);
+}
+
+/**
+ * xuartps_set_termios - termios operations, handling data length, parity,
+ *                              stop bits, flow control, baud rate
+ * @port: Handle to the uart port structure
+ * @termios: Handle to the input termios structure
+ * @old: Values of the previously saved termios structure
+ *
+ **/
+static void xuartps_set_termios(struct uart_port *port,
+                                struct ktermios *termios, struct ktermios *old)
+{
+        unsigned int cval = 0;
+        unsigned int baud;
+        unsigned long flags;
+        unsigned int ctrl_reg, mode_reg;
+
+        spin_lock_irqsave(&port->lock, flags);
+
+        /* Empty the receive FIFO 1st before making changes */
+        while ((xuartps_readl(XUARTPS_SR_OFFSET) &
+                 XUARTPS_SR_RXEMPTY) != XUARTPS_SR_RXEMPTY) {
+                xuartps_readl(XUARTPS_FIFO_OFFSET);
+        }
+
+        /* Disable the TX and RX to set baud rate */
+        xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) |
+                        (XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS),
+                        XUARTPS_CR_OFFSET);
+
+        /* Min baud rate = 6bps and Max Baud Rate is 10Mbps for 100Mhz clk */
+        baud = uart_get_baud_rate(port, termios, old, 0, 10000000);
+        baud = xuartps_set_baud_rate(port, baud);
+        if (tty_termios_baud_rate(termios))
+                tty_termios_encode_baud_rate(termios, baud, baud);
+
+        /*
+         * Update the per-port timeout.
+         */
+        uart_update_timeout(port, termios->c_cflag, baud);
+
+        /* Set TX/RX Reset */
+        xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) |
+                        (XUARTPS_CR_TXRST | XUARTPS_CR_RXRST),
+                        XUARTPS_CR_OFFSET);
+
+        ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET);
+
+        /* Clear the RX disable and TX disable bits and then set the TX enable
+         * bit and RX enable bit to enable the transmitter and receiver.
+         */
+        xuartps_writel(
+                (ctrl_reg & ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS))
+                        | (XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN),
+                        XUARTPS_CR_OFFSET);
+
+        xuartps_writel(10, XUARTPS_RXTOUT_OFFSET);
+
+        port->read_status_mask = XUARTPS_IXR_TXEMPTY | XUARTPS_IXR_RXTRIG |
+                        XUARTPS_IXR_OVERRUN | XUARTPS_IXR_TOUT;
+        port->ignore_status_mask = 0;
+
+        if (termios->c_iflag & INPCK)
+                port->read_status_mask |= XUARTPS_IXR_PARITY |
+                XUARTPS_IXR_FRAMING;
+
+        if (termios->c_iflag & IGNPAR)
+                port->ignore_status_mask |= XUARTPS_IXR_PARITY |
+                        XUARTPS_IXR_FRAMING | XUARTPS_IXR_OVERRUN;
+
+        /* ignore all characters if CREAD is not set */
+        if ((termios->c_cflag & CREAD) == 0)
+                port->ignore_status_mask |= XUARTPS_IXR_RXTRIG |
+                        XUARTPS_IXR_TOUT | XUARTPS_IXR_PARITY |
+                        XUARTPS_IXR_FRAMING | XUARTPS_IXR_OVERRUN;
+
+        mode_reg = xuartps_readl(XUARTPS_MR_OFFSET);
+
+        /* Handling Data Size */
+        switch (termios->c_cflag & CSIZE) {
+        case CS6:
+                cval |= XUARTPS_MR_CHARLEN_6_BIT;
+                break;
+        case CS7:
+                cval |= XUARTPS_MR_CHARLEN_7_BIT;
+                break;
+        default:
+        case CS8:
+                cval |= XUARTPS_MR_CHARLEN_8_BIT;
+                termios->c_cflag &= ~CSIZE;
+                termios->c_cflag |= CS8;
+                break;
+        }
+
+        /* Handling Parity and Stop Bits length */
+        if (termios->c_cflag & CSTOPB)
+                cval |= XUARTPS_MR_STOPMODE_2_BIT; /* 2 STOP bits */
+        else
+                cval |= XUARTPS_MR_STOPMODE_1_BIT; /* 1 STOP bit */
+
+        if (termios->c_cflag & PARENB) {
+                /* Mark or Space parity */
+                if (termios->c_cflag & CMSPAR) {
+                        if (termios->c_cflag & PARODD)
+                                cval |= XUARTPS_MR_PARITY_MARK;
+                        else
+                                cval |= XUARTPS_MR_PARITY_SPACE;
+                } else if (termios->c_cflag & PARODD)
+                                cval |= XUARTPS_MR_PARITY_ODD;
+                        else
+                                cval |= XUARTPS_MR_PARITY_EVEN;
+        } else
+                cval |= XUARTPS_MR_PARITY_NONE;
+        xuartps_writel(cval , XUARTPS_MR_OFFSET);
+
+        spin_unlock_irqrestore(&port->lock, flags);
+}
+
+/**
+ * xuartps_startup - Called when an application opens a xuartps port
+ * @port: Handle to the uart port structure
+ *
+ * Returns 0 on success, negative error otherwise
+ **/
+static int xuartps_startup(struct uart_port *port)
+{
+        unsigned int retval = 0, status = 0;
+
+        retval = request_irq(port->irq, xuartps_isr, 0, XUARTPS_NAME,
+                                                                (void *)port);
+        if (retval)
+                return retval;
+
+        /* Disable the TX and RX */
+        xuartps_writel(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS,
+                                                XUARTPS_CR_OFFSET);
+
+        /* Set the Control Register with TX/RX Enable, TX/RX Reset,
+         * no break chars.
+         */
+        xuartps_writel(XUARTPS_CR_TXRST | XUARTPS_CR_RXRST,
+                                XUARTPS_CR_OFFSET);
+
+        status = xuartps_readl(XUARTPS_CR_OFFSET);
+
+        /* Clear the RX disable and TX disable bits and then set the TX enable
+         * bit and RX enable bit to enable the transmitter and receiver.
+         */
+        xuartps_writel((status & ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS))
+                        | (XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN |
+                        XUARTPS_CR_STOPBRK), XUARTPS_CR_OFFSET);
+
+        /* Set the Mode Register with normal mode,8 data bits,1 stop bit,
+         * no parity.
+         */
+        xuartps_writel(XUARTPS_MR_CHMODE_NORM | XUARTPS_MR_STOPMODE_1_BIT
+                | XUARTPS_MR_PARITY_NONE | XUARTPS_MR_CHARLEN_8_BIT,
+                 XUARTPS_MR_OFFSET);
+
+        /* Set the RX FIFO Trigger level to 14 assuming FIFO size as 16 */
+        xuartps_writel(14, XUARTPS_RXWM_OFFSET);
+
+        /* Receive Timeout register is enabled with value of 10 */
+        xuartps_writel(10, XUARTPS_RXTOUT_OFFSET);
+
+
+        /* Set the Interrupt Registers with desired interrupts */
+        xuartps_writel(XUARTPS_IXR_TXEMPTY | XUARTPS_IXR_PARITY |
+                XUARTPS_IXR_FRAMING | XUARTPS_IXR_OVERRUN |
+                XUARTPS_IXR_RXTRIG | XUARTPS_IXR_TOUT, XUARTPS_IER_OFFSET);
+        xuartps_writel(~(XUARTPS_IXR_TXEMPTY | XUARTPS_IXR_PARITY |
+                XUARTPS_IXR_FRAMING | XUARTPS_IXR_OVERRUN |
+                XUARTPS_IXR_RXTRIG | XUARTPS_IXR_TOUT), XUARTPS_IDR_OFFSET);
+
+        return retval;
+}
+
+/**
+ * xuartps_shutdown - Called when an application closes a xuartps port
+ * @port: Handle to the uart port structure
+ *
+ **/
+static void xuartps_shutdown(struct uart_port *port)
+{
+        int status;
+
+        /* Disable interrupts */
+        status = xuartps_readl(XUARTPS_IMR_OFFSET);
+        xuartps_writel(status, XUARTPS_IDR_OFFSET);
+
+        /* Disable the TX and RX */
+        xuartps_writel(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS,
+                                 XUARTPS_CR_OFFSET);
+        free_irq(port->irq, port);
+}
+
+/**
+ * xuartps_type - Set UART type to xuartps port
+ * @port: Handle to the uart port structure
+ *
+ * Returns string on success, NULL otherwise
+ **/
+static const char *xuartps_type(struct uart_port *port)
+{
+        return port->type == PORT_XUARTPS ? XUARTPS_NAME : NULL;
+}
+
+/**
+ * xuartps_verify_port - Verify the port params
+ * @port: Handle to the uart port structure
+ * @ser: Handle to the structure whose members are compared
+ *
+ * Returns 0 if success otherwise -EINVAL
+ **/
+static int xuartps_verify_port(struct uart_port *port,
+                                        struct serial_struct *ser)
+{
+        if (ser->type != PORT_UNKNOWN && ser->type != PORT_XUARTPS)
+                return -EINVAL;
+        if (port->irq != ser->irq)
+                return -EINVAL;
+        if (ser->io_type != UPIO_MEM)
+                return -EINVAL;
+        if (port->iobase != ser->port)
+                return -EINVAL;
+        if (ser->hub6 != 0)
+                return -EINVAL;
+        return 0;
+}
+
+/**
+ * xuartps_request_port - Claim the memory region attached to xuartps port,
+ *                              called when the driver adds a xuartps port via
+ *                              uart_add_one_port()
+ * @port: Handle to the uart port structure
+ *
+ * Returns 0, -ENOMEM if request fails
+ **/
+static int xuartps_request_port(struct uart_port *port)
+{
+        if (!request_mem_region(port->mapbase, XUARTPS_REGISTER_SPACE,
+                                         XUARTPS_NAME)) {
+                return -ENOMEM;
+        }
+
+        port->membase = ioremap(port->mapbase, XUARTPS_REGISTER_SPACE);
+        if (!port->membase) {
+                dev_err(port->dev, "Unable to map registers\n");
+                release_mem_region(port->mapbase, XUARTPS_REGISTER_SPACE);
+                return -ENOMEM;
+        }
+        return 0;
+}
+
+/**
+ * xuartps_release_port - Release the memory region attached to a xuartps
+ *                              port, called when the driver removes a xuartps
+ *                              port via uart_remove_one_port().
+ * @port: Handle to the uart port structure
+ *
+ **/
+static void xuartps_release_port(struct uart_port *port)
+{
+        release_mem_region(port->mapbase, XUARTPS_REGISTER_SPACE);
+        iounmap(port->membase);
+        port->membase = NULL;
+}
+
+/**
+ * xuartps_config_port - Configure xuartps, called when the driver adds a
+ *                              xuartps port
+ * @port: Handle to the uart port structure
+ * @flags: If any
+ *
+ **/
+static void xuartps_config_port(struct uart_port *port, int flags)
+{
+        if (flags & UART_CONFIG_TYPE && xuartps_request_port(port) == 0)
+                port->type = PORT_XUARTPS;
+}
+
+/**
+ * xuartps_get_mctrl - Get the modem control state
+ *
+ * @port: Handle to the uart port structure
+ *
+ * Returns the modem control state
+ *
+ **/
+static unsigned int xuartps_get_mctrl(struct uart_port *port)
+{
+        return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
+}
+
+static void xuartps_set_mctrl(struct uart_port *port, unsigned int mctrl)
+{
+        /* N/A */
+}
+
+static void xuartps_enable_ms(struct uart_port *port)
+{
+        /* N/A */
+}
+
+/** The UART operations structure
+ */
+static struct uart_ops xuartps_ops = {
+        .set_mctrl      = xuartps_set_mctrl,
+        .get_mctrl      = xuartps_get_mctrl,
+        .enable_ms      = xuartps_enable_ms,
+
+        .start_tx       = xuartps_start_tx,     /* Start transmitting */
+        .stop_tx        = xuartps_stop_tx,      /* Stop transmission */
+        .stop_rx        = xuartps_stop_rx,      /* Stop reception */
+        .tx_empty       = xuartps_tx_empty,     /* Transmitter busy? */
+        .break_ctl      = xuartps_break_ctl,    /* Start/stop
+                                                 * transmitting break
+                                                 */
+        .set_termios    = xuartps_set_termios,  /* Set termios */
+        .startup        = xuartps_startup,      /* App opens xuartps */
+        .shutdown       = xuartps_shutdown,     /* App closes xuartps */
+        .type           = xuartps_type,         /* Set UART type */
+        .verify_port    = xuartps_verify_port,  /* Verification of port
+                                                 * params
+                                                 */
+        .request_port   = xuartps_request_port, /* Claim resources
+                                                 * associated with a
+                                                 * xuartps port
+                                                 */
+        .release_port   = xuartps_release_port, /* Release resources
+                                                 * associated with a
+                                                 * xuartps port
+                                                 */
+        .config_port    = xuartps_config_port,  /* Configure when driver
+                                                 * adds a xuartps port
+                                                 */
+};
+
+static struct uart_port xuartps_port[2];
+
+/**
+ * xuartps_get_port - Configure the port from the platform device resource
+ *                      info
+ *
+ * Returns a pointer to a uart_port or NULL for failure
+ **/
+static struct uart_port *xuartps_get_port(void)
+{
+        struct uart_port *port;
+        int id;
+
+        /* Find the next unused port */
+        for (id = 0; id < XUARTPS_NR_PORTS; id++)
+                if (xuartps_port[id].mapbase == 0)
+                        break;
+
+        if (id >= XUARTPS_NR_PORTS)
+                return NULL;
+
+        port = &xuartps_port[id];
+
+        /* At this point, we've got an empty uart_port struct, initialize it */
+        spin_lock_init(&port->lock);
+        port->membase   = NULL;
+        port->iobase    = 1; /* mark port in use */
+        port->irq       = 0;
+        port->type      = PORT_UNKNOWN;
+        port->iotype    = UPIO_MEM32;
+        port->flags     = UPF_BOOT_AUTOCONF;
+        port->ops       = &xuartps_ops;
+        port->fifosize  = XUARTPS_FIFO_SIZE;
+        port->line      = id;
+        port->dev       = NULL;
+        return port;
+}
+
+/*-----------------------Console driver operations--------------------------*/
+
+#ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE
+/**
+ * xuartps_console_wait_tx - Wait for the TX to be full
+ * @port: Handle to the uart port structure
+ *
+ **/
+static void xuartps_console_wait_tx(struct uart_port *port)
+{
+        while ((xuartps_readl(XUARTPS_SR_OFFSET) & XUARTPS_SR_TXEMPTY)
+                                != XUARTPS_SR_TXEMPTY)
+                barrier();
+}
+
+/**
+ * xuartps_console_putchar - write the character to the FIFO buffer
+ * @port: Handle to the uart port structure
+ * @ch: Character to be written
+ *
+ **/
+static void xuartps_console_putchar(struct uart_port *port, int ch)
+{
+        xuartps_console_wait_tx(port);
+        xuartps_writel(ch, XUARTPS_FIFO_OFFSET);
+}
+
+/**
+ * xuartps_console_write - perform write operation
+ * @port: Handle to the uart port structure
+ * @s: Pointer to character array
+ * @count: No of characters
+ **/
+static void xuartps_console_write(struct console *co, const char *s,
+                                unsigned int count)
+{
+        struct uart_port *port = &xuartps_port[co->index];
+        unsigned long flags;
+        unsigned int imr;
+        int locked = 1;
+
+        if (oops_in_progress)
+                locked = spin_trylock_irqsave(&port->lock, flags);
+        else
+                spin_lock_irqsave(&port->lock, flags);
+
+        /* save and disable interrupt */
+        imr = xuartps_readl(XUARTPS_IMR_OFFSET);
+        xuartps_writel(imr, XUARTPS_IDR_OFFSET);
+
+        uart_console_write(port, s, count, xuartps_console_putchar);
+        xuartps_console_wait_tx(port);
+
+        /* restore interrupt state, it seems like there may be a h/w bug
+         * in that the interrupt enable register should not need to be
+         * written based on the data sheet
+         */
+        xuartps_writel(~imr, XUARTPS_IDR_OFFSET);
+        xuartps_writel(imr, XUARTPS_IER_OFFSET);
+
+        if (locked)
+                spin_unlock_irqrestore(&port->lock, flags);
+}
+
+/**
+ * xuartps_console_setup - Initialize the uart to default config
+ * @co: Console handle
+ * @options: Initial settings of uart
+ *
+ * Returns 0, -ENODEV if no device
+ **/
+static int __init xuartps_console_setup(struct console *co, char *options)
+{
+        struct uart_port *port = &xuartps_port[co->index];
+        int baud = 9600;
+        int bits = 8;
+        int parity = 'n';
+        int flow = 'n';
+
+        if (co->index < 0 || co->index >= XUARTPS_NR_PORTS)
+                return -EINVAL;
+
+        if (!port->mapbase) {
+                pr_debug("console on ttyPS%i not present\n", co->index);
+                return -ENODEV;
+        }
+
+        if (options)
+                uart_parse_options(options, &baud, &parity, &bits, &flow);
+
+        return uart_set_options(port, co, baud, parity, bits, flow);
+}
+
+static struct uart_driver xuartps_uart_driver;
+
+static struct console xuartps_console = {
+        .name   = XUARTPS_TTY_NAME,
+        .write  = xuartps_console_write,
+        .device = uart_console_device,
+        .setup  = xuartps_console_setup,
+        .flags  = CON_PRINTBUFFER,
+        .index  = -1, /* Specified on the cmdline (e.g. console=ttyPS ) */
+        .data   = &xuartps_uart_driver,
+};
+
+/**
+ * xuartps_console_init - Initialization call
+ *
+ * Returns 0 on success, negative error otherwise
+ **/
+static int __init xuartps_console_init(void)
+{
+        register_console(&xuartps_console);
+        return 0;
+}
+
+console_initcall(xuartps_console_init);
+
+#endif /* CONFIG_SERIAL_XILINX_PS_UART_CONSOLE */
+
+/** Structure Definitions
+ */
+static struct uart_driver xuartps_uart_driver = {
+        .owner          = THIS_MODULE,          /* Owner */
+        .driver_name    = XUARTPS_NAME,         /* Driver name */
+        .dev_name       = XUARTPS_TTY_NAME,     /* Node name */
+        .major          = XUARTPS_MAJOR,        /* Major number */
+        .minor          = XUARTPS_MINOR,        /* Minor number */
+        .nr             = XUARTPS_NR_PORTS,     /* Number of UART ports */
+#ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE
+        .cons           = &xuartps_console,     /* Console */
+#endif
+};
+
+/* ---------------------------------------------------------------------
+ * Platform bus binding
+ */
+/**
+ * xuartps_probe - Platform driver probe
+ * @pdev: Pointer to the platform device structure
+ *
+ * Returns 0 on success, negative error otherwise
+ **/
+static int __devinit xuartps_probe(struct platform_device *pdev)
+{
+        int rc;
+        struct uart_port *port;
+        struct resource *res, *res2;
+        int clk = 0;
+
+#ifdef CONFIG_OF
+        const unsigned int *prop;
+
+        prop = of_get_property(pdev->dev.of_node, "clock", NULL);
+        if (prop)
+                clk = be32_to_cpup(prop);
+#else
+        clk = *((unsigned int *)(pdev->dev.platform_data));
+#endif
+        if (!clk) {
+                dev_err(&pdev->dev, "no clock specified\n");
+                return -ENODEV;
+        }
+
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!res)
+                return -ENODEV;
+
+        res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+        if (!res2)
+                return -ENODEV;
+
+        /* Initialize the port structure */
+        port = xuartps_get_port();
+
+        if (!port) {
+                dev_err(&pdev->dev, "Cannot get uart_port structure\n");
+                return -ENODEV;
+        } else {
+                /* Register the port.
+                 * This function also registers this device with the tty layer
+                 * and triggers invocation of the config_port() entry point.
+                 */
+                port->mapbase = res->start;
+                port->irq = res2->start;
+                port->dev = &pdev->dev;
+                port->uartclk = clk;
+                dev_set_drvdata(&pdev->dev, port);
+                rc = uart_add_one_port(&xuartps_uart_driver, port);
+                if (rc) {
+                        dev_err(&pdev->dev,
+                                "uart_add_one_port() failed; err=%i\n", rc);
+                        dev_set_drvdata(&pdev->dev, NULL);
+                        return rc;
+                }
+                return 0;
+        }
+}
+
+/**
+ * xuartps_remove - called when the platform driver is unregistered
+ * @pdev: Pointer to the platform device structure
+ *
+ * Returns 0 on success, negative error otherwise
+ **/
+static int __devexit xuartps_remove(struct platform_device *pdev)
+{
+        struct uart_port *port = dev_get_drvdata(&pdev->dev);
+        int rc = 0;
+
+        /* Remove the xuartps port from the serial core */
+        if (port) {
+                rc = uart_remove_one_port(&xuartps_uart_driver, port);
+                dev_set_drvdata(&pdev->dev, NULL);
+                port->mapbase = 0;
+        }
+        return rc;
+}
+
+/**
+ * xuartps_suspend - suspend event
+ * @pdev: Pointer to the platform device structure
+ * @state: State of the device
+ *
+ * Returns 0
+ **/
+static int xuartps_suspend(struct platform_device *pdev, pm_message_t state)
+{
+        /* Call the API provided in serial_core.c file which handles
+         * the suspend.
+         */
+        uart_suspend_port(&xuartps_uart_driver, &xuartps_port[pdev->id]);
+        return 0;
+}
+
+/**
+ * xuartps_resume - Resume after a previous suspend
+ * @pdev: Pointer to the platform device structure
+ *
+ * Returns 0
+ **/
+static int xuartps_resume(struct platform_device *pdev)
+{
+        uart_resume_port(&xuartps_uart_driver, &xuartps_port[pdev->id]);
+        return 0;
+}
+
+/* Match table for of_platform binding */
+
+#ifdef CONFIG_OF
+static struct of_device_id xuartps_of_match[] __devinitdata = {
+        { .compatible = "xlnx,xuartps", },
+        {}
+};
+MODULE_DEVICE_TABLE(of, xuartps_of_match);
+#else
+#define xuartps_of_match NULL
+#endif
+
+static struct platform_driver xuartps_platform_driver = {
+        .probe   = xuartps_probe,               /* Probe method */
+        .remove  = __exit_p(xuartps_remove),    /* Detach method */
+        .suspend = xuartps_suspend,             /* Suspend */
+        .resume  = xuartps_resume,              /* Resume after a suspend */
+        .driver  = {
+                .owner = THIS_MODULE,
+                .name = XUARTPS_NAME,           /* Driver name */
+                .of_match_table = xuartps_of_match,
+                },
+};
+
+/* ---------------------------------------------------------------------
+ * Module Init and Exit
+ */
+/**
+ * xuartps_init - Initial driver registration call
+ *
+ * Returns whether the registration was successful or not
+ **/
+static int __init xuartps_init(void)
+{
+        int retval = 0;
+
+        /* Register the xuartps driver with the serial core */
+        retval = uart_register_driver(&xuartps_uart_driver);
+        if (retval)
+                return retval;
+
+        /* Register the platform driver */
+        retval = platform_driver_register(&xuartps_platform_driver);
+        if (retval)
+                uart_unregister_driver(&xuartps_uart_driver);
+
+        return retval;
+}
+
+/**
+ * xuartps_exit - Driver unregistration call
+ **/
+static void __exit xuartps_exit(void)
+{
+        /* The order of unregistration is important. Unregister the
+         * UART driver before the platform driver crashes the system.
+         */
+
+        /* Unregister the platform driver */
+        platform_driver_unregister(&xuartps_platform_driver);
+
+        /* Unregister the xuartps driver */
+        uart_unregister_driver(&xuartps_uart_driver);
+}
+
+module_init(xuartps_init);
+module_exit(xuartps_exit);
+
+MODULE_DESCRIPTION("Driver for PS UART");
+MODULE_AUTHOR("Xilinx Inc.");
+MODULE_LICENSE("GPL");