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authorBarak Witkowski <barak@broadcom.com>2012-04-22 23:04:46 -0400
committerDavid S. Miller <davem@davemloft.net>2012-04-23 22:34:03 -0400
commita334872224a67b614dc888460377862621f3dac7 (patch)
tree11c49dcbdaa681d75f18b858976d2a3d48e250cd /drivers/net/ethernet/broadcom
parent5b263f5374ea70daa61ed9f5cc5d8f4ac236efbd (diff)
bnx2x: add afex support
Following patch adds afex multifunction support to the driver (afex multifunction is based on vntag header) and updates FW version used to 7.2.51. Support includes the following: 1. Configure vif parameters in firmware (default vlan, vif id, default priority, allowed priorities) according to values received from NIC. 2. Configure FW to strip/add default vlan according to afex vlan mode. 3. Notify link up to OS only after vif is fully initialized. 4. Support vif list set/get requests and configure FW accordingly. 5. Supply afex statistics upon request from NIC. 6. Special handling to L2 interface in case of FCoE vif. Signed-off-by: Barak Witkowski <barak@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/broadcom')
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x.h21
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c16
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h3
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c4
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h2
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h176
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h2
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c4
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h1
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c479
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c108
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h36
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c271
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.h15
14 files changed, 1081 insertions, 57 deletions
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
index bfa78883d5c7..0a5924301646 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
@@ -1063,6 +1063,13 @@ struct bnx2x_slowpath {
1063 struct flow_control_configuration pfc_config; 1063 struct flow_control_configuration pfc_config;
1064 } func_rdata; 1064 } func_rdata;
1065 1065
1066 /* afex ramrod can not be a part of func_rdata union because these
1067 * events might arrive in parallel to other events from func_rdata.
1068 * Therefore, if they would have been defined in the same union,
1069 * data can get corrupted.
1070 */
1071 struct afex_vif_list_ramrod_data func_afex_rdata;
1072
1066 /* used by dmae command executer */ 1073 /* used by dmae command executer */
1067 struct dmae_command dmae[MAX_DMAE_C]; 1074 struct dmae_command dmae[MAX_DMAE_C];
1068 1075
@@ -1179,6 +1186,7 @@ struct bnx2x_fw_stats_data {
1179enum { 1186enum {
1180 BNX2X_SP_RTNL_SETUP_TC, 1187 BNX2X_SP_RTNL_SETUP_TC,
1181 BNX2X_SP_RTNL_TX_TIMEOUT, 1188 BNX2X_SP_RTNL_TX_TIMEOUT,
1189 BNX2X_SP_RTNL_AFEX_F_UPDATE,
1182 BNX2X_SP_RTNL_FAN_FAILURE, 1190 BNX2X_SP_RTNL_FAN_FAILURE,
1183}; 1191};
1184 1192
@@ -1343,13 +1351,14 @@ struct bnx2x {
1343 struct cmng_init cmng; 1351 struct cmng_init cmng;
1344 1352
1345 u32 mf_config[E1HVN_MAX]; 1353 u32 mf_config[E1HVN_MAX];
1346 u32 mf2_config[E2_FUNC_MAX]; 1354 u32 mf_ext_config;
1347 u32 path_has_ovlan; /* E3 */ 1355 u32 path_has_ovlan; /* E3 */
1348 u16 mf_ov; 1356 u16 mf_ov;
1349 u8 mf_mode; 1357 u8 mf_mode;
1350#define IS_MF(bp) (bp->mf_mode != 0) 1358#define IS_MF(bp) (bp->mf_mode != 0)
1351#define IS_MF_SI(bp) (bp->mf_mode == MULTI_FUNCTION_SI) 1359#define IS_MF_SI(bp) (bp->mf_mode == MULTI_FUNCTION_SI)
1352#define IS_MF_SD(bp) (bp->mf_mode == MULTI_FUNCTION_SD) 1360#define IS_MF_SD(bp) (bp->mf_mode == MULTI_FUNCTION_SD)
1361#define IS_MF_AFEX(bp) (bp->mf_mode == MULTI_FUNCTION_AFEX)
1353 1362
1354 u8 wol; 1363 u8 wol;
1355 1364
@@ -1592,6 +1601,9 @@ struct bnx2x {
1592 struct dcbx_features dcbx_remote_feat; 1601 struct dcbx_features dcbx_remote_feat;
1593 u32 dcbx_remote_flags; 1602 u32 dcbx_remote_flags;
1594#endif 1603#endif
1604 /* AFEX: store default vlan used */
1605 int afex_def_vlan_tag;
1606 enum mf_cfg_afex_vlan_mode afex_vlan_mode;
1595 u32 pending_max; 1607 u32 pending_max;
1596 1608
1597 /* multiple tx classes of service */ 1609 /* multiple tx classes of service */
@@ -2148,9 +2160,16 @@ void bnx2x_notify_link_changed(struct bnx2x *bp);
2148#define IS_MF_ISCSI_SD(bp) (IS_MF_SD(bp) && BNX2X_IS_MF_SD_PROTOCOL_ISCSI(bp)) 2160#define IS_MF_ISCSI_SD(bp) (IS_MF_SD(bp) && BNX2X_IS_MF_SD_PROTOCOL_ISCSI(bp))
2149#define IS_MF_FCOE_SD(bp) (IS_MF_SD(bp) && BNX2X_IS_MF_SD_PROTOCOL_FCOE(bp)) 2161#define IS_MF_FCOE_SD(bp) (IS_MF_SD(bp) && BNX2X_IS_MF_SD_PROTOCOL_FCOE(bp))
2150 2162
2163#define BNX2X_MF_EXT_PROTOCOL_FCOE(bp) ((bp)->mf_ext_config & \
2164 MACP_FUNC_CFG_FLAGS_FCOE_OFFLOAD)
2165
2166#define IS_MF_FCOE_AFEX(bp) (IS_MF_AFEX(bp) && BNX2X_MF_EXT_PROTOCOL_FCOE(bp))
2151#define IS_MF_STORAGE_SD(bp) (IS_MF_SD(bp) && \ 2167#define IS_MF_STORAGE_SD(bp) (IS_MF_SD(bp) && \
2152 (BNX2X_IS_MF_SD_PROTOCOL_ISCSI(bp) || \ 2168 (BNX2X_IS_MF_SD_PROTOCOL_ISCSI(bp) || \
2153 BNX2X_IS_MF_SD_PROTOCOL_FCOE(bp))) 2169 BNX2X_IS_MF_SD_PROTOCOL_FCOE(bp)))
2170#else
2171#define IS_MF_FCOE_AFEX(bp) false
2154#endif 2172#endif
2155 2173
2174
2156#endif /* bnx2x.h */ 2175#endif /* bnx2x.h */
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
index 5a58cff78dc2..484e632af2e5 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
@@ -1467,8 +1467,8 @@ void bnx2x_set_num_queues(struct bnx2x *bp)
1467 bp->num_queues = bnx2x_calc_num_queues(bp); 1467 bp->num_queues = bnx2x_calc_num_queues(bp);
1468 1468
1469#ifdef BCM_CNIC 1469#ifdef BCM_CNIC
1470 /* override in STORAGE SD mode */ 1470 /* override in STORAGE SD modes */
1471 if (IS_MF_STORAGE_SD(bp)) 1471 if (IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp))
1472 bp->num_queues = 1; 1472 bp->num_queues = 1;
1473#endif 1473#endif
1474 /* Add special queues */ 1474 /* Add special queues */
@@ -1900,8 +1900,14 @@ int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
1900 SHMEM2_WR(bp, dcc_support, 1900 SHMEM2_WR(bp, dcc_support,
1901 (SHMEM_DCC_SUPPORT_DISABLE_ENABLE_PF_TLV | 1901 (SHMEM_DCC_SUPPORT_DISABLE_ENABLE_PF_TLV |
1902 SHMEM_DCC_SUPPORT_BANDWIDTH_ALLOCATION_TLV)); 1902 SHMEM_DCC_SUPPORT_BANDWIDTH_ALLOCATION_TLV));
1903 if (SHMEM2_HAS(bp, afex_driver_support))
1904 SHMEM2_WR(bp, afex_driver_support,
1905 SHMEM_AFEX_SUPPORTED_VERSION_ONE);
1903 } 1906 }
1904 1907
1908 /* Set AFEX default VLAN tag to an invalid value */
1909 bp->afex_def_vlan_tag = -1;
1910
1905 bp->state = BNX2X_STATE_OPENING_WAIT4_PORT; 1911 bp->state = BNX2X_STATE_OPENING_WAIT4_PORT;
1906 rc = bnx2x_func_start(bp); 1912 rc = bnx2x_func_start(bp);
1907 if (rc) { 1913 if (rc) {
@@ -3073,7 +3079,8 @@ int bnx2x_change_mac_addr(struct net_device *dev, void *p)
3073 } 3079 }
3074 3080
3075#ifdef BCM_CNIC 3081#ifdef BCM_CNIC
3076 if (IS_MF_STORAGE_SD(bp) && !is_zero_ether_addr(addr->sa_data)) { 3082 if ((IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp)) &&
3083 !is_zero_ether_addr(addr->sa_data)) {
3077 BNX2X_ERR("Can't configure non-zero address on iSCSI or FCoE functions in MF-SD mode\n"); 3084 BNX2X_ERR("Can't configure non-zero address on iSCSI or FCoE functions in MF-SD mode\n");
3078 return -EINVAL; 3085 return -EINVAL;
3079 } 3086 }
@@ -3195,7 +3202,8 @@ static int bnx2x_alloc_fp_mem_at(struct bnx2x *bp, int index)
3195 int rx_ring_size = 0; 3202 int rx_ring_size = 0;
3196 3203
3197#ifdef BCM_CNIC 3204#ifdef BCM_CNIC
3198 if (!bp->rx_ring_size && IS_MF_STORAGE_SD(bp)) { 3205 if (!bp->rx_ring_size &&
3206 (IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp))) {
3199 rx_ring_size = MIN_RX_SIZE_NONTPA; 3207 rx_ring_size = MIN_RX_SIZE_NONTPA;
3200 bp->rx_ring_size = rx_ring_size; 3208 bp->rx_ring_size = rx_ring_size;
3201 } else 3209 } else
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h
index 2c3a243c84b3..3b1bc6d9dc79 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h
@@ -1694,7 +1694,8 @@ static inline bool bnx2x_is_valid_ether_addr(struct bnx2x *bp, u8 *addr)
1694 if (is_valid_ether_addr(addr)) 1694 if (is_valid_ether_addr(addr))
1695 return true; 1695 return true;
1696#ifdef BCM_CNIC 1696#ifdef BCM_CNIC
1697 if (is_zero_ether_addr(addr) && IS_MF_STORAGE_SD(bp)) 1697 if (is_zero_ether_addr(addr) &&
1698 (IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp)))
1698 return true; 1699 return true;
1699#endif 1700#endif
1700 return false; 1701 return false;
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c
index 3c7d0cc77e23..faf8abd0b7eb 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c
@@ -1430,7 +1430,7 @@ static void bnx2x_get_ringparam(struct net_device *dev,
1430 else 1430 else
1431 ering->rx_pending = MAX_RX_AVAIL; 1431 ering->rx_pending = MAX_RX_AVAIL;
1432 1432
1433 ering->tx_max_pending = MAX_TX_AVAIL; 1433 ering->tx_max_pending = IS_MF_FCOE_AFEX(bp) ? 0 : MAX_TX_AVAIL;
1434 ering->tx_pending = bp->tx_ring_size; 1434 ering->tx_pending = bp->tx_ring_size;
1435} 1435}
1436 1436
@@ -1448,7 +1448,7 @@ static int bnx2x_set_ringparam(struct net_device *dev,
1448 if ((ering->rx_pending > MAX_RX_AVAIL) || 1448 if ((ering->rx_pending > MAX_RX_AVAIL) ||
1449 (ering->rx_pending < (bp->disable_tpa ? MIN_RX_SIZE_NONTPA : 1449 (ering->rx_pending < (bp->disable_tpa ? MIN_RX_SIZE_NONTPA :
1450 MIN_RX_SIZE_TPA)) || 1450 MIN_RX_SIZE_TPA)) ||
1451 (ering->tx_pending > MAX_TX_AVAIL) || 1451 (ering->tx_pending > (IS_MF_FCOE_AFEX(bp) ? 0 : MAX_TX_AVAIL)) ||
1452 (ering->tx_pending <= MAX_SKB_FRAGS + 4)) { 1452 (ering->tx_pending <= MAX_SKB_FRAGS + 4)) {
1453 DP(BNX2X_MSG_ETHTOOL, "Command parameters not supported\n"); 1453 DP(BNX2X_MSG_ETHTOOL, "Command parameters not supported\n");
1454 return -EINVAL; 1454 return -EINVAL;
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h
index b9b263323436..426f77aa721a 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h
@@ -387,7 +387,7 @@
387 387
388#define STATS_QUERY_CMD_COUNT 16 388#define STATS_QUERY_CMD_COUNT 16
389 389
390#define NIV_LIST_TABLE_SIZE 4096 390#define AFEX_LIST_TABLE_SIZE 4096
391 391
392#define INVALID_VNIC_ID 0xFF 392#define INVALID_VNIC_ID 0xFF
393 393
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h
index 799272d164e5..a440a8ba85f2 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h
@@ -833,6 +833,7 @@ struct shared_feat_cfg { /* NVRAM Offset */
833 #define SHARED_FEAT_CFG_FORCE_SF_MODE_FORCED_SF 0x00000100 833 #define SHARED_FEAT_CFG_FORCE_SF_MODE_FORCED_SF 0x00000100
834 #define SHARED_FEAT_CFG_FORCE_SF_MODE_SPIO4 0x00000200 834 #define SHARED_FEAT_CFG_FORCE_SF_MODE_SPIO4 0x00000200
835 #define SHARED_FEAT_CFG_FORCE_SF_MODE_SWITCH_INDEPT 0x00000300 835 #define SHARED_FEAT_CFG_FORCE_SF_MODE_SWITCH_INDEPT 0x00000300
836 #define SHARED_FEAT_CFG_FORCE_SF_MODE_AFEX_MODE 0x00000400
836 837
837 /* The interval in seconds between sending LLDP packets. Set to zero 838 /* The interval in seconds between sending LLDP packets. Set to zero
838 to disable the feature */ 839 to disable the feature */
@@ -1235,6 +1236,8 @@ struct drv_func_mb {
1235 #define REQ_BC_VER_4_VRFY_FIRST_PHY_OPT_MDL 0x00050006 1236 #define REQ_BC_VER_4_VRFY_FIRST_PHY_OPT_MDL 0x00050006
1236 #define DRV_MSG_CODE_VRFY_SPECIFIC_PHY_OPT_MDL 0xa1000000 1237 #define DRV_MSG_CODE_VRFY_SPECIFIC_PHY_OPT_MDL 0xa1000000
1237 #define REQ_BC_VER_4_VRFY_SPECIFIC_PHY_OPT_MDL 0x00050234 1238 #define REQ_BC_VER_4_VRFY_SPECIFIC_PHY_OPT_MDL 0x00050234
1239 #define DRV_MSG_CODE_VRFY_AFEX_SUPPORTED 0xa2000000
1240 #define REQ_BC_VER_4_VRFY_AFEX_SUPPORTED 0x00070002
1238 #define REQ_BC_VER_4_SFP_TX_DISABLE_SUPPORTED 0x00070014 1241 #define REQ_BC_VER_4_SFP_TX_DISABLE_SUPPORTED 0x00070014
1239 #define REQ_BC_VER_4_PFC_STATS_SUPPORTED 0x00070201 1242 #define REQ_BC_VER_4_PFC_STATS_SUPPORTED 0x00070201
1240 1243
@@ -1242,6 +1245,13 @@ struct drv_func_mb {
1242 #define DRV_MSG_CODE_DCBX_PMF_DRV_OK 0xb2000000 1245 #define DRV_MSG_CODE_DCBX_PMF_DRV_OK 0xb2000000
1243 1246
1244 #define DRV_MSG_CODE_VF_DISABLED_DONE 0xc0000000 1247 #define DRV_MSG_CODE_VF_DISABLED_DONE 0xc0000000
1248
1249 #define DRV_MSG_CODE_AFEX_DRIVER_SETMAC 0xd0000000
1250 #define DRV_MSG_CODE_AFEX_LISTGET_ACK 0xd1000000
1251 #define DRV_MSG_CODE_AFEX_LISTSET_ACK 0xd2000000
1252 #define DRV_MSG_CODE_AFEX_STATSGET_ACK 0xd3000000
1253 #define DRV_MSG_CODE_AFEX_VIFSET_ACK 0xd4000000
1254
1245 #define DRV_MSG_CODE_DRV_INFO_ACK 0xd8000000 1255 #define DRV_MSG_CODE_DRV_INFO_ACK 0xd8000000
1246 #define DRV_MSG_CODE_DRV_INFO_NACK 0xd9000000 1256 #define DRV_MSG_CODE_DRV_INFO_NACK 0xd9000000
1247 1257
@@ -1299,6 +1309,14 @@ struct drv_func_mb {
1299 #define FW_MSG_CODE_VRFY_OPT_MDL_INVLD_IMG 0xa0200000 1309 #define FW_MSG_CODE_VRFY_OPT_MDL_INVLD_IMG 0xa0200000
1300 #define FW_MSG_CODE_VRFY_OPT_MDL_UNAPPROVED 0xa0300000 1310 #define FW_MSG_CODE_VRFY_OPT_MDL_UNAPPROVED 0xa0300000
1301 #define FW_MSG_CODE_VF_DISABLED_DONE 0xb0000000 1311 #define FW_MSG_CODE_VF_DISABLED_DONE 0xb0000000
1312 #define FW_MSG_CODE_HW_SET_INVALID_IMAGE 0xb0100000
1313
1314 #define FW_MSG_CODE_AFEX_DRIVER_SETMAC_DONE 0xd0100000
1315 #define FW_MSG_CODE_AFEX_LISTGET_ACK 0xd1100000
1316 #define FW_MSG_CODE_AFEX_LISTSET_ACK 0xd2100000
1317 #define FW_MSG_CODE_AFEX_STATSGET_ACK 0xd3100000
1318 #define FW_MSG_CODE_AFEX_VIFSET_ACK 0xd4100000
1319
1302 #define FW_MSG_CODE_DRV_INFO_ACK 0xd8100000 1320 #define FW_MSG_CODE_DRV_INFO_ACK 0xd8100000
1303 #define FW_MSG_CODE_DRV_INFO_NACK 0xd9100000 1321 #define FW_MSG_CODE_DRV_INFO_NACK 0xd9100000
1304 1322
@@ -1357,6 +1375,12 @@ struct drv_func_mb {
1357 1375
1358 #define DRV_STATUS_DCBX_EVENT_MASK 0x000f0000 1376 #define DRV_STATUS_DCBX_EVENT_MASK 0x000f0000
1359 #define DRV_STATUS_DCBX_NEGOTIATION_RESULTS 0x00010000 1377 #define DRV_STATUS_DCBX_NEGOTIATION_RESULTS 0x00010000
1378 #define DRV_STATUS_AFEX_EVENT_MASK 0x03f00000
1379 #define DRV_STATUS_AFEX_LISTGET_REQ 0x00100000
1380 #define DRV_STATUS_AFEX_LISTSET_REQ 0x00200000
1381 #define DRV_STATUS_AFEX_STATSGET_REQ 0x00400000
1382 #define DRV_STATUS_AFEX_VIFSET_REQ 0x00800000
1383
1360 #define DRV_STATUS_DRV_INFO_REQ 0x04000000 1384 #define DRV_STATUS_DRV_INFO_REQ 0x04000000
1361 1385
1362 u32 virt_mac_upper; 1386 u32 virt_mac_upper;
@@ -1448,7 +1472,26 @@ struct func_mf_cfg {
1448 #define FUNC_MF_CFG_E1HOV_TAG_SHIFT 0 1472 #define FUNC_MF_CFG_E1HOV_TAG_SHIFT 0
1449 #define FUNC_MF_CFG_E1HOV_TAG_DEFAULT FUNC_MF_CFG_E1HOV_TAG_MASK 1473 #define FUNC_MF_CFG_E1HOV_TAG_DEFAULT FUNC_MF_CFG_E1HOV_TAG_MASK
1450 1474
1451 u32 reserved[2]; 1475 /* afex default VLAN ID - 12 bits */
1476 #define FUNC_MF_CFG_AFEX_VLAN_MASK 0x0fff0000
1477 #define FUNC_MF_CFG_AFEX_VLAN_SHIFT 16
1478
1479 u32 afex_config;
1480 #define FUNC_MF_CFG_AFEX_COS_FILTER_MASK 0x000000ff
1481 #define FUNC_MF_CFG_AFEX_COS_FILTER_SHIFT 0
1482 #define FUNC_MF_CFG_AFEX_MBA_ENABLED_MASK 0x0000ff00
1483 #define FUNC_MF_CFG_AFEX_MBA_ENABLED_SHIFT 8
1484 #define FUNC_MF_CFG_AFEX_MBA_ENABLED_VAL 0x00000100
1485 #define FUNC_MF_CFG_AFEX_VLAN_MODE_MASK 0x000f0000
1486 #define FUNC_MF_CFG_AFEX_VLAN_MODE_SHIFT 16
1487
1488 u32 reserved;
1489};
1490
1491enum mf_cfg_afex_vlan_mode {
1492 FUNC_MF_CFG_AFEX_VLAN_TRUNK_MODE = 0,
1493 FUNC_MF_CFG_AFEX_VLAN_ACCESS_MODE,
1494 FUNC_MF_CFG_AFEX_VLAN_TRUNK_TAG_NATIVE_MODE
1452}; 1495};
1453 1496
1454/* This structure is not applicable and should not be accessed on 57711 */ 1497/* This structure is not applicable and should not be accessed on 57711 */
@@ -1945,18 +1988,29 @@ struct shmem2_region {
1945 1988
1946 u32 nvm_retain_bitmap_addr; /* 0x0070 */ 1989 u32 nvm_retain_bitmap_addr; /* 0x0070 */
1947 1990
1948 u32 reserved1; /* 0x0074 */ 1991 /* afex support of that driver */
1992 u32 afex_driver_support; /* 0x0074 */
1993 #define SHMEM_AFEX_VERSION_MASK 0x100f
1994 #define SHMEM_AFEX_SUPPORTED_VERSION_ONE 0x1001
1995 #define SHMEM_AFEX_REDUCED_DRV_LOADED 0x8000
1949 1996
1950 u32 reserved2[E2_FUNC_MAX]; 1997 /* driver receives addr in scratchpad to which it should respond */
1998 u32 afex_scratchpad_addr_to_write[E2_FUNC_MAX];
1951 1999
1952 u32 reserved3[E2_FUNC_MAX];/* 0x0088 */ 2000 /* generic params from MCP to driver (value depends on the msg sent
1953 u32 reserved4[E2_FUNC_MAX];/* 0x0098 */ 2001 * to driver
2002 */
2003 u32 afex_param1_to_driver[E2_FUNC_MAX]; /* 0x0088 */
2004 u32 afex_param2_to_driver[E2_FUNC_MAX]; /* 0x0098 */
1954 2005
1955 u32 swim_base_addr; /* 0x0108 */ 2006 u32 swim_base_addr; /* 0x0108 */
1956 u32 swim_funcs; 2007 u32 swim_funcs;
1957 u32 swim_main_cb; 2008 u32 swim_main_cb;
1958 2009
1959 u32 reserved5[2]; 2010 /* bitmap notifying which VIF profiles stored in nvram are enabled by
2011 * switch
2012 */
2013 u32 afex_profiles_enabled[2];
1960 2014
1961 /* generic flags controlled by the driver */ 2015 /* generic flags controlled by the driver */
1962 u32 drv_flags; 2016 u32 drv_flags;
@@ -2696,10 +2750,51 @@ union drv_info_to_mcp {
2696 struct fcoe_stats_info fcoe_stat; 2750 struct fcoe_stats_info fcoe_stat;
2697 struct iscsi_stats_info iscsi_stat; 2751 struct iscsi_stats_info iscsi_stat;
2698}; 2752};
2753
2754/* stats collected for afex.
2755 * NOTE: structure is exactly as expected to be received by the switch.
2756 * order must remain exactly as is unless protocol changes !
2757 */
2758struct afex_stats {
2759 u32 tx_unicast_frames_hi;
2760 u32 tx_unicast_frames_lo;
2761 u32 tx_unicast_bytes_hi;
2762 u32 tx_unicast_bytes_lo;
2763 u32 tx_multicast_frames_hi;
2764 u32 tx_multicast_frames_lo;
2765 u32 tx_multicast_bytes_hi;
2766 u32 tx_multicast_bytes_lo;
2767 u32 tx_broadcast_frames_hi;
2768 u32 tx_broadcast_frames_lo;
2769 u32 tx_broadcast_bytes_hi;
2770 u32 tx_broadcast_bytes_lo;
2771 u32 tx_frames_discarded_hi;
2772 u32 tx_frames_discarded_lo;
2773 u32 tx_frames_dropped_hi;
2774 u32 tx_frames_dropped_lo;
2775
2776 u32 rx_unicast_frames_hi;
2777 u32 rx_unicast_frames_lo;
2778 u32 rx_unicast_bytes_hi;
2779 u32 rx_unicast_bytes_lo;
2780 u32 rx_multicast_frames_hi;
2781 u32 rx_multicast_frames_lo;
2782 u32 rx_multicast_bytes_hi;
2783 u32 rx_multicast_bytes_lo;
2784 u32 rx_broadcast_frames_hi;
2785 u32 rx_broadcast_frames_lo;
2786 u32 rx_broadcast_bytes_hi;
2787 u32 rx_broadcast_bytes_lo;
2788 u32 rx_frames_discarded_hi;
2789 u32 rx_frames_discarded_lo;
2790 u32 rx_frames_dropped_hi;
2791 u32 rx_frames_dropped_lo;
2792};
2793
2699#define BCM_5710_FW_MAJOR_VERSION 7 2794#define BCM_5710_FW_MAJOR_VERSION 7
2700#define BCM_5710_FW_MINOR_VERSION 2 2795#define BCM_5710_FW_MINOR_VERSION 2
2701#define BCM_5710_FW_REVISION_VERSION 16 2796#define BCM_5710_FW_REVISION_VERSION 51
2702#define BCM_5710_FW_ENGINEERING_VERSION 0 2797#define BCM_5710_FW_ENGINEERING_VERSION 0
2703#define BCM_5710_FW_COMPILE_FLAGS 1 2798#define BCM_5710_FW_COMPILE_FLAGS 1
2704 2799
2705 2800
@@ -3389,7 +3484,7 @@ struct client_init_tx_data {
3389#define CLIENT_INIT_TX_DATA_RESERVED1 (0xFFF<<4) 3484#define CLIENT_INIT_TX_DATA_RESERVED1 (0xFFF<<4)
3390#define CLIENT_INIT_TX_DATA_RESERVED1_SHIFT 4 3485#define CLIENT_INIT_TX_DATA_RESERVED1_SHIFT 4
3391 u8 default_vlan_flg; 3486 u8 default_vlan_flg;
3392 u8 reserved2; 3487 u8 force_default_pri_flg;
3393 __le32 reserved3; 3488 __le32 reserved3;
3394}; 3489};
3395 3490
@@ -4375,8 +4470,21 @@ struct fcoe_statistics_params {
4375 4470
4376 4471
4377/* 4472/*
4473 * The data afex vif list ramrod need
4474 */
4475struct afex_vif_list_ramrod_data {
4476 u8 afex_vif_list_command;
4477 u8 func_bit_map;
4478 __le16 vif_list_index;
4479 u8 func_to_clear;
4480 u8 echo;
4481 __le16 reserved1;
4482};
4483
4484
4485/*
4378 * cfc delete event data 4486 * cfc delete event data
4379*/ 4487 */
4380struct cfc_del_event_data { 4488struct cfc_del_event_data {
4381 u32 cid; 4489 u32 cid;
4382 u32 reserved0; 4490 u32 reserved0;
@@ -4521,7 +4629,7 @@ enum common_spqe_cmd_id {
4521 RAMROD_CMD_ID_COMMON_STAT_QUERY, 4629 RAMROD_CMD_ID_COMMON_STAT_QUERY,
4522 RAMROD_CMD_ID_COMMON_STOP_TRAFFIC, 4630 RAMROD_CMD_ID_COMMON_STOP_TRAFFIC,
4523 RAMROD_CMD_ID_COMMON_START_TRAFFIC, 4631 RAMROD_CMD_ID_COMMON_START_TRAFFIC,
4524 RAMROD_CMD_ID_COMMON_RESERVED1, 4632 RAMROD_CMD_ID_COMMON_AFEX_VIF_LISTS,
4525 MAX_COMMON_SPQE_CMD_ID 4633 MAX_COMMON_SPQE_CMD_ID
4526}; 4634};
4527 4635
@@ -4729,6 +4837,17 @@ struct malicious_vf_event_data {
4729}; 4837};
4730 4838
4731/* 4839/*
4840 * vif list event data
4841 */
4842struct vif_list_event_data {
4843 u8 func_bit_map;
4844 u8 echo;
4845 __le16 reserved0;
4846 __le32 reserved1;
4847 __le32 reserved2;
4848};
4849
4850/*
4732 * union for all event ring message types 4851 * union for all event ring message types
4733 */ 4852 */
4734union event_data { 4853union event_data {
@@ -4737,6 +4856,7 @@ union event_data {
4737 struct cfc_del_event_data cfc_del_event; 4856 struct cfc_del_event_data cfc_del_event;
4738 struct vf_flr_event_data vf_flr_event; 4857 struct vf_flr_event_data vf_flr_event;
4739 struct malicious_vf_event_data malicious_vf_event; 4858 struct malicious_vf_event_data malicious_vf_event;
4859 struct vif_list_event_data vif_list_event;
4740}; 4860};
4741 4861
4742 4862
@@ -4802,7 +4922,7 @@ enum event_ring_opcode {
4802 EVENT_RING_OPCODE_FORWARD_SETUP, 4922 EVENT_RING_OPCODE_FORWARD_SETUP,
4803 EVENT_RING_OPCODE_RSS_UPDATE_RULES, 4923 EVENT_RING_OPCODE_RSS_UPDATE_RULES,
4804 EVENT_RING_OPCODE_FUNCTION_UPDATE, 4924 EVENT_RING_OPCODE_FUNCTION_UPDATE,
4805 EVENT_RING_OPCODE_RESERVED1, 4925 EVENT_RING_OPCODE_AFEX_VIF_LISTS,
4806 EVENT_RING_OPCODE_SET_MAC, 4926 EVENT_RING_OPCODE_SET_MAC,
4807 EVENT_RING_OPCODE_CLASSIFICATION_RULES, 4927 EVENT_RING_OPCODE_CLASSIFICATION_RULES,
4808 EVENT_RING_OPCODE_FILTERS_RULES, 4928 EVENT_RING_OPCODE_FILTERS_RULES,
@@ -4849,12 +4969,27 @@ struct flow_control_configuration {
4849struct function_start_data { 4969struct function_start_data {
4850 __le16 function_mode; 4970 __le16 function_mode;
4851 __le16 sd_vlan_tag; 4971 __le16 sd_vlan_tag;
4852 u16 reserved; 4972 __le16 vif_id;
4853 u8 path_id; 4973 u8 path_id;
4854 u8 network_cos_mode; 4974 u8 network_cos_mode;
4855}; 4975};
4856 4976
4857 4977
4978struct function_update_data {
4979 u8 vif_id_change_flg;
4980 u8 afex_default_vlan_change_flg;
4981 u8 allowed_priorities_change_flg;
4982 u8 network_cos_mode_change_flg;
4983 __le16 vif_id;
4984 __le16 afex_default_vlan;
4985 u8 allowed_priorities;
4986 u8 network_cos_mode;
4987 u8 lb_mode_en;
4988 u8 reserved0;
4989 __le32 reserved1;
4990};
4991
4992
4858/* 4993/*
4859 * FW version stored in the Xstorm RAM 4994 * FW version stored in the Xstorm RAM
4860 */ 4995 */
@@ -5052,7 +5187,7 @@ enum mf_mode {
5052 SINGLE_FUNCTION, 5187 SINGLE_FUNCTION,
5053 MULTI_FUNCTION_SD, 5188 MULTI_FUNCTION_SD,
5054 MULTI_FUNCTION_SI, 5189 MULTI_FUNCTION_SI,
5055 MULTI_FUNCTION_RESERVED, 5190 MULTI_FUNCTION_AFEX,
5056 MAX_MF_MODE 5191 MAX_MF_MODE
5057}; 5192};
5058 5193
@@ -5177,6 +5312,7 @@ union protocol_common_specific_data {
5177 u8 protocol_data[8]; 5312 u8 protocol_data[8];
5178 struct regpair phy_address; 5313 struct regpair phy_address;
5179 struct regpair mac_config_addr; 5314 struct regpair mac_config_addr;
5315 struct afex_vif_list_ramrod_data afex_vif_list_data;
5180}; 5316};
5181 5317
5182/* 5318/*
@@ -5356,6 +5492,18 @@ enum vf_pf_channel_state {
5356 5492
5357 5493
5358/* 5494/*
5495 * vif_list_rule_kind
5496 */
5497enum vif_list_rule_kind {
5498 VIF_LIST_RULE_SET,
5499 VIF_LIST_RULE_GET,
5500 VIF_LIST_RULE_CLEAR_ALL,
5501 VIF_LIST_RULE_CLEAR_FUNC,
5502 MAX_VIF_LIST_RULE_KIND
5503};
5504
5505
5506/*
5359 * zone A per-queue data 5507 * zone A per-queue data
5360 */ 5508 */
5361struct xstorm_queue_zone_data { 5509struct xstorm_queue_zone_data {
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h
index 2b7a2bd0592c..559c396d45cc 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h
@@ -125,7 +125,7 @@ enum {
125 MODE_MF = 0x00000100, 125 MODE_MF = 0x00000100,
126 MODE_MF_SD = 0x00000200, 126 MODE_MF_SD = 0x00000200,
127 MODE_MF_SI = 0x00000400, 127 MODE_MF_SI = 0x00000400,
128 MODE_MF_NIV = 0x00000800, 128 MODE_MF_AFEX = 0x00000800,
129 MODE_E3_A0 = 0x00001000, 129 MODE_E3_A0 = 0x00001000,
130 MODE_E3_B0 = 0x00002000, 130 MODE_E3_B0 = 0x00002000,
131 MODE_COS3 = 0x00004000, 131 MODE_COS3 = 0x00004000,
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
index ff882a482094..3d78b6267308 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
@@ -6800,6 +6800,10 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)
6800 else 6800 else
6801 rc = bnx2x_update_link_down(params, vars); 6801 rc = bnx2x_update_link_down(params, vars);
6802 6802
6803 /* Update MCP link status was changed */
6804 if (params->feature_config_flags & FEATURE_CONFIG_BC_SUPPORTS_AFEX)
6805 bnx2x_fw_command(bp, DRV_MSG_CODE_LINK_STATUS_CHANGED, 0);
6806
6803 return rc; 6807 return rc;
6804} 6808}
6805 6809
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h
index 00f26d319ba4..ea4371f4335f 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h
@@ -254,6 +254,7 @@ struct link_params {
254#define FEATURE_CONFIG_PFC_ENABLED (1<<1) 254#define FEATURE_CONFIG_PFC_ENABLED (1<<1)
255#define FEATURE_CONFIG_BC_SUPPORTS_OPT_MDL_VRFY (1<<2) 255#define FEATURE_CONFIG_BC_SUPPORTS_OPT_MDL_VRFY (1<<2)
256#define FEATURE_CONFIG_BC_SUPPORTS_DUAL_PHY_OPT_MDL_VRFY (1<<3) 256#define FEATURE_CONFIG_BC_SUPPORTS_DUAL_PHY_OPT_MDL_VRFY (1<<3)
257#define FEATURE_CONFIG_BC_SUPPORTS_AFEX (1<<8)
257#define FEATURE_CONFIG_AUTOGREEEN_ENABLED (1<<9) 258#define FEATURE_CONFIG_AUTOGREEEN_ENABLED (1<<9)
258#define FEATURE_CONFIG_BC_SUPPORTS_SFP_TX_DISABLED (1<<10) 259#define FEATURE_CONFIG_BC_SUPPORTS_SFP_TX_DISABLED (1<<10)
259#define FEATURE_CONFIG_DISABLE_REMOTE_FAULT_DET (1<<11) 260#define FEATURE_CONFIG_DISABLE_REMOTE_FAULT_DET (1<<11)
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
index 1da25d796995..2a9523ae56c5 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
@@ -1646,6 +1646,27 @@ void bnx2x_sp_event(struct bnx2x_fastpath *fp, union eth_rx_cqe *rr_cqe)
1646 1646
1647 DP(BNX2X_MSG_SP, "bp->cq_spq_left %x\n", atomic_read(&bp->cq_spq_left)); 1647 DP(BNX2X_MSG_SP, "bp->cq_spq_left %x\n", atomic_read(&bp->cq_spq_left));
1648 1648
1649 if ((drv_cmd == BNX2X_Q_CMD_UPDATE) && (IS_FCOE_FP(fp)) &&
1650 (!!test_bit(BNX2X_AFEX_FCOE_Q_UPDATE_PENDING, &bp->sp_state))) {
1651 /* if Q update ramrod is completed for last Q in AFEX vif set
1652 * flow, then ACK MCP at the end
1653 *
1654 * mark pending ACK to MCP bit.
1655 * prevent case that both bits are cleared.
1656 * At the end of load/unload driver checks that
1657 * sp_state is cleaerd, and this order prevents
1658 * races
1659 */
1660 smp_mb__before_clear_bit();
1661 set_bit(BNX2X_AFEX_PENDING_VIFSET_MCP_ACK, &bp->sp_state);
1662 wmb();
1663 clear_bit(BNX2X_AFEX_FCOE_Q_UPDATE_PENDING, &bp->sp_state);
1664 smp_mb__after_clear_bit();
1665
1666 /* schedule workqueue to send ack to MCP */
1667 queue_delayed_work(bnx2x_wq, &bp->sp_task, 0);
1668 }
1669
1649 return; 1670 return;
1650} 1671}
1651 1672
@@ -2266,6 +2287,13 @@ void bnx2x_read_mf_cfg(struct bnx2x *bp)
2266 bp->mf_config[vn] = 2287 bp->mf_config[vn] =
2267 MF_CFG_RD(bp, func_mf_config[func].config); 2288 MF_CFG_RD(bp, func_mf_config[func].config);
2268 } 2289 }
2290 if (bp->mf_config[BP_VN(bp)] & FUNC_MF_CFG_FUNC_DISABLED) {
2291 DP(NETIF_MSG_IFUP, "mf_cfg function disabled\n");
2292 bp->flags |= MF_FUNC_DIS;
2293 } else {
2294 DP(NETIF_MSG_IFUP, "mf_cfg function enabled\n");
2295 bp->flags &= ~MF_FUNC_DIS;
2296 }
2269} 2297}
2270 2298
2271static void bnx2x_cmng_fns_init(struct bnx2x *bp, u8 read_cfg, u8 cmng_type) 2299static void bnx2x_cmng_fns_init(struct bnx2x *bp, u8 read_cfg, u8 cmng_type)
@@ -2375,6 +2403,190 @@ void bnx2x__link_status_update(struct bnx2x *bp)
2375 bnx2x_link_report(bp); 2403 bnx2x_link_report(bp);
2376} 2404}
2377 2405
2406static int bnx2x_afex_func_update(struct bnx2x *bp, u16 vifid,
2407 u16 vlan_val, u8 allowed_prio)
2408{
2409 struct bnx2x_func_state_params func_params = {0};
2410 struct bnx2x_func_afex_update_params *f_update_params =
2411 &func_params.params.afex_update;
2412
2413 func_params.f_obj = &bp->func_obj;
2414 func_params.cmd = BNX2X_F_CMD_AFEX_UPDATE;
2415
2416 /* no need to wait for RAMROD completion, so don't
2417 * set RAMROD_COMP_WAIT flag
2418 */
2419
2420 f_update_params->vif_id = vifid;
2421 f_update_params->afex_default_vlan = vlan_val;
2422 f_update_params->allowed_priorities = allowed_prio;
2423
2424 /* if ramrod can not be sent, response to MCP immediately */
2425 if (bnx2x_func_state_change(bp, &func_params) < 0)
2426 bnx2x_fw_command(bp, DRV_MSG_CODE_AFEX_VIFSET_ACK, 0);
2427
2428 return 0;
2429}
2430
2431static int bnx2x_afex_handle_vif_list_cmd(struct bnx2x *bp, u8 cmd_type,
2432 u16 vif_index, u8 func_bit_map)
2433{
2434 struct bnx2x_func_state_params func_params = {0};
2435 struct bnx2x_func_afex_viflists_params *update_params =
2436 &func_params.params.afex_viflists;
2437 int rc;
2438 u32 drv_msg_code;
2439
2440 /* validate only LIST_SET and LIST_GET are received from switch */
2441 if ((cmd_type != VIF_LIST_RULE_GET) && (cmd_type != VIF_LIST_RULE_SET))
2442 BNX2X_ERR("BUG! afex_handle_vif_list_cmd invalid type 0x%x\n",
2443 cmd_type);
2444
2445 func_params.f_obj = &bp->func_obj;
2446 func_params.cmd = BNX2X_F_CMD_AFEX_VIFLISTS;
2447
2448 /* set parameters according to cmd_type */
2449 update_params->afex_vif_list_command = cmd_type;
2450 update_params->vif_list_index = cpu_to_le16(vif_index);
2451 update_params->func_bit_map =
2452 (cmd_type == VIF_LIST_RULE_GET) ? 0 : func_bit_map;
2453 update_params->func_to_clear = 0;
2454 drv_msg_code =
2455 (cmd_type == VIF_LIST_RULE_GET) ?
2456 DRV_MSG_CODE_AFEX_LISTGET_ACK :
2457 DRV_MSG_CODE_AFEX_LISTSET_ACK;
2458
2459 /* if ramrod can not be sent, respond to MCP immediately for
2460 * SET and GET requests (other are not triggered from MCP)
2461 */
2462 rc = bnx2x_func_state_change(bp, &func_params);
2463 if (rc < 0)
2464 bnx2x_fw_command(bp, drv_msg_code, 0);
2465
2466 return 0;
2467}
2468
2469static void bnx2x_handle_afex_cmd(struct bnx2x *bp, u32 cmd)
2470{
2471 struct afex_stats afex_stats;
2472 u32 func = BP_ABS_FUNC(bp);
2473 u32 mf_config;
2474 u16 vlan_val;
2475 u32 vlan_prio;
2476 u16 vif_id;
2477 u8 allowed_prio;
2478 u8 vlan_mode;
2479 u32 addr_to_write, vifid, addrs, stats_type, i;
2480
2481 if (cmd & DRV_STATUS_AFEX_LISTGET_REQ) {
2482 vifid = SHMEM2_RD(bp, afex_param1_to_driver[BP_FW_MB_IDX(bp)]);
2483 DP(BNX2X_MSG_MCP,
2484 "afex: got MCP req LISTGET_REQ for vifid 0x%x\n", vifid);
2485 bnx2x_afex_handle_vif_list_cmd(bp, VIF_LIST_RULE_GET, vifid, 0);
2486 }
2487
2488 if (cmd & DRV_STATUS_AFEX_LISTSET_REQ) {
2489 vifid = SHMEM2_RD(bp, afex_param1_to_driver[BP_FW_MB_IDX(bp)]);
2490 addrs = SHMEM2_RD(bp, afex_param2_to_driver[BP_FW_MB_IDX(bp)]);
2491 DP(BNX2X_MSG_MCP,
2492 "afex: got MCP req LISTSET_REQ for vifid 0x%x addrs 0x%x\n",
2493 vifid, addrs);
2494 bnx2x_afex_handle_vif_list_cmd(bp, VIF_LIST_RULE_SET, vifid,
2495 addrs);
2496 }
2497
2498 if (cmd & DRV_STATUS_AFEX_STATSGET_REQ) {
2499 addr_to_write = SHMEM2_RD(bp,
2500 afex_scratchpad_addr_to_write[BP_FW_MB_IDX(bp)]);
2501 stats_type = SHMEM2_RD(bp,
2502 afex_param1_to_driver[BP_FW_MB_IDX(bp)]);
2503
2504 DP(BNX2X_MSG_MCP,
2505 "afex: got MCP req STATSGET_REQ, write to addr 0x%x\n",
2506 addr_to_write);
2507
2508 bnx2x_afex_collect_stats(bp, (void *)&afex_stats, stats_type);
2509
2510 /* write response to scratchpad, for MCP */
2511 for (i = 0; i < (sizeof(struct afex_stats)/sizeof(u32)); i++)
2512 REG_WR(bp, addr_to_write + i*sizeof(u32),
2513 *(((u32 *)(&afex_stats))+i));
2514
2515 /* send ack message to MCP */
2516 bnx2x_fw_command(bp, DRV_MSG_CODE_AFEX_STATSGET_ACK, 0);
2517 }
2518
2519 if (cmd & DRV_STATUS_AFEX_VIFSET_REQ) {
2520 mf_config = MF_CFG_RD(bp, func_mf_config[func].config);
2521 bp->mf_config[BP_VN(bp)] = mf_config;
2522 DP(BNX2X_MSG_MCP,
2523 "afex: got MCP req VIFSET_REQ, mf_config 0x%x\n",
2524 mf_config);
2525
2526 /* if VIF_SET is "enabled" */
2527 if (!(mf_config & FUNC_MF_CFG_FUNC_DISABLED)) {
2528 /* set rate limit directly to internal RAM */
2529 struct cmng_init_input cmng_input;
2530 struct rate_shaping_vars_per_vn m_rs_vn;
2531 size_t size = sizeof(struct rate_shaping_vars_per_vn);
2532 u32 addr = BAR_XSTRORM_INTMEM +
2533 XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(BP_FUNC(bp));
2534
2535 bp->mf_config[BP_VN(bp)] = mf_config;
2536
2537 bnx2x_calc_vn_max(bp, BP_VN(bp), &cmng_input);
2538 m_rs_vn.vn_counter.rate =
2539 cmng_input.vnic_max_rate[BP_VN(bp)];
2540 m_rs_vn.vn_counter.quota =
2541 (m_rs_vn.vn_counter.rate *
2542 RS_PERIODIC_TIMEOUT_USEC) / 8;
2543
2544 __storm_memset_struct(bp, addr, size, (u32 *)&m_rs_vn);
2545
2546 /* read relevant values from mf_cfg struct in shmem */
2547 vif_id =
2548 (MF_CFG_RD(bp, func_mf_config[func].e1hov_tag) &
2549 FUNC_MF_CFG_E1HOV_TAG_MASK) >>
2550 FUNC_MF_CFG_E1HOV_TAG_SHIFT;
2551 vlan_val =
2552 (MF_CFG_RD(bp, func_mf_config[func].e1hov_tag) &
2553 FUNC_MF_CFG_AFEX_VLAN_MASK) >>
2554 FUNC_MF_CFG_AFEX_VLAN_SHIFT;
2555 vlan_prio = (mf_config &
2556 FUNC_MF_CFG_TRANSMIT_PRIORITY_MASK) >>
2557 FUNC_MF_CFG_TRANSMIT_PRIORITY_SHIFT;
2558 vlan_val |= (vlan_prio << VLAN_PRIO_SHIFT);
2559 vlan_mode =
2560 (MF_CFG_RD(bp,
2561 func_mf_config[func].afex_config) &
2562 FUNC_MF_CFG_AFEX_VLAN_MODE_MASK) >>
2563 FUNC_MF_CFG_AFEX_VLAN_MODE_SHIFT;
2564 allowed_prio =
2565 (MF_CFG_RD(bp,
2566 func_mf_config[func].afex_config) &
2567 FUNC_MF_CFG_AFEX_COS_FILTER_MASK) >>
2568 FUNC_MF_CFG_AFEX_COS_FILTER_SHIFT;
2569
2570 /* send ramrod to FW, return in case of failure */
2571 if (bnx2x_afex_func_update(bp, vif_id, vlan_val,
2572 allowed_prio))
2573 return;
2574
2575 bp->afex_def_vlan_tag = vlan_val;
2576 bp->afex_vlan_mode = vlan_mode;
2577 } else {
2578 /* notify link down because BP->flags is disabled */
2579 bnx2x_link_report(bp);
2580
2581 /* send INVALID VIF ramrod to FW */
2582 bnx2x_afex_func_update(bp, 0xFFFF, 0, 0);
2583
2584 /* Reset the default afex VLAN */
2585 bp->afex_def_vlan_tag = -1;
2586 }
2587 }
2588}
2589
2378static void bnx2x_pmf_update(struct bnx2x *bp) 2590static void bnx2x_pmf_update(struct bnx2x *bp)
2379{ 2591{
2380 int port = BP_PORT(bp); 2592 int port = BP_PORT(bp);
@@ -2520,8 +2732,11 @@ static inline unsigned long bnx2x_get_q_flags(struct bnx2x *bp,
2520 if (IS_MF_SD(bp)) 2732 if (IS_MF_SD(bp))
2521 __set_bit(BNX2X_Q_FLG_OV, &flags); 2733 __set_bit(BNX2X_Q_FLG_OV, &flags);
2522 2734
2523 if (IS_FCOE_FP(fp)) 2735 if (IS_FCOE_FP(fp)) {
2524 __set_bit(BNX2X_Q_FLG_FCOE, &flags); 2736 __set_bit(BNX2X_Q_FLG_FCOE, &flags);
2737 /* For FCoE - force usage of default priority (for afex) */
2738 __set_bit(BNX2X_Q_FLG_FORCE_DEFAULT_PRI, &flags);
2739 }
2525 2740
2526 if (!fp->disable_tpa) { 2741 if (!fp->disable_tpa) {
2527 __set_bit(BNX2X_Q_FLG_TPA, &flags); 2742 __set_bit(BNX2X_Q_FLG_TPA, &flags);
@@ -2538,6 +2753,10 @@ static inline unsigned long bnx2x_get_q_flags(struct bnx2x *bp,
2538 /* Always set HW VLAN stripping */ 2753 /* Always set HW VLAN stripping */
2539 __set_bit(BNX2X_Q_FLG_VLAN, &flags); 2754 __set_bit(BNX2X_Q_FLG_VLAN, &flags);
2540 2755
2756 /* configure silent vlan removal */
2757 if (IS_MF_AFEX(bp))
2758 __set_bit(BNX2X_Q_FLG_SILENT_VLAN_REM, &flags);
2759
2541 2760
2542 return flags | bnx2x_get_common_flags(bp, fp, true); 2761 return flags | bnx2x_get_common_flags(bp, fp, true);
2543} 2762}
@@ -2640,6 +2859,13 @@ static void bnx2x_pf_rx_q_prep(struct bnx2x *bp,
2640 rxq_init->sb_cq_index = HC_SP_INDEX_ETH_FCOE_RX_CQ_CONS; 2859 rxq_init->sb_cq_index = HC_SP_INDEX_ETH_FCOE_RX_CQ_CONS;
2641 else 2860 else
2642 rxq_init->sb_cq_index = HC_INDEX_ETH_RX_CQ_CONS; 2861 rxq_init->sb_cq_index = HC_INDEX_ETH_RX_CQ_CONS;
2862 /* configure silent vlan removal
2863 * if multi function mode is afex, then mask default vlan
2864 */
2865 if (IS_MF_AFEX(bp)) {
2866 rxq_init->silent_removal_value = bp->afex_def_vlan_tag;
2867 rxq_init->silent_removal_mask = VLAN_VID_MASK;
2868 }
2643} 2869}
2644 2870
2645static void bnx2x_pf_tx_q_prep(struct bnx2x *bp, 2871static void bnx2x_pf_tx_q_prep(struct bnx2x *bp,
@@ -3446,6 +3672,7 @@ static inline void bnx2x_attn_int_deasserted3(struct bnx2x *bp, u32 attn)
3446 int func = BP_FUNC(bp); 3672 int func = BP_FUNC(bp);
3447 3673
3448 REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_12 + func*4, 0); 3674 REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_12 + func*4, 0);
3675 bnx2x_read_mf_cfg(bp);
3449 bp->mf_config[BP_VN(bp)] = MF_CFG_RD(bp, 3676 bp->mf_config[BP_VN(bp)] = MF_CFG_RD(bp,
3450 func_mf_config[BP_ABS_FUNC(bp)].config); 3677 func_mf_config[BP_ABS_FUNC(bp)].config);
3451 val = SHMEM_RD(bp, 3678 val = SHMEM_RD(bp,
@@ -3468,6 +3695,9 @@ static inline void bnx2x_attn_int_deasserted3(struct bnx2x *bp, u32 attn)
3468 /* start dcbx state machine */ 3695 /* start dcbx state machine */
3469 bnx2x_dcbx_set_params(bp, 3696 bnx2x_dcbx_set_params(bp,
3470 BNX2X_DCBX_STATE_NEG_RECEIVED); 3697 BNX2X_DCBX_STATE_NEG_RECEIVED);
3698 if (val & DRV_STATUS_AFEX_EVENT_MASK)
3699 bnx2x_handle_afex_cmd(bp,
3700 val & DRV_STATUS_AFEX_EVENT_MASK);
3471 if (bp->link_vars.periodic_flags & 3701 if (bp->link_vars.periodic_flags &
3472 PERIODIC_FLAGS_LINK_EVENT) { 3702 PERIODIC_FLAGS_LINK_EVENT) {
3473 /* sync with link */ 3703 /* sync with link */
@@ -4395,6 +4625,93 @@ static inline void bnx2x_handle_rx_mode_eqe(struct bnx2x *bp)
4395 netif_addr_unlock_bh(bp->dev); 4625 netif_addr_unlock_bh(bp->dev);
4396} 4626}
4397 4627
4628static inline void bnx2x_after_afex_vif_lists(struct bnx2x *bp,
4629 union event_ring_elem *elem)
4630{
4631 if (elem->message.data.vif_list_event.echo == VIF_LIST_RULE_GET) {
4632 DP(BNX2X_MSG_SP,
4633 "afex: ramrod completed VIF LIST_GET, addrs 0x%x\n",
4634 elem->message.data.vif_list_event.func_bit_map);
4635 bnx2x_fw_command(bp, DRV_MSG_CODE_AFEX_LISTGET_ACK,
4636 elem->message.data.vif_list_event.func_bit_map);
4637 } else if (elem->message.data.vif_list_event.echo ==
4638 VIF_LIST_RULE_SET) {
4639 DP(BNX2X_MSG_SP, "afex: ramrod completed VIF LIST_SET\n");
4640 bnx2x_fw_command(bp, DRV_MSG_CODE_AFEX_LISTSET_ACK, 0);
4641 }
4642}
4643
4644/* called with rtnl_lock */
4645static inline void bnx2x_after_function_update(struct bnx2x *bp)
4646{
4647 int q, rc;
4648 struct bnx2x_fastpath *fp;
4649 struct bnx2x_queue_state_params queue_params = {NULL};
4650 struct bnx2x_queue_update_params *q_update_params =
4651 &queue_params.params.update;
4652
4653 /* Send Q update command with afex vlan removal values for all Qs */
4654 queue_params.cmd = BNX2X_Q_CMD_UPDATE;
4655
4656 /* set silent vlan removal values according to vlan mode */
4657 __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG,
4658 &q_update_params->update_flags);
4659 __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
4660 &q_update_params->update_flags);
4661 __set_bit(RAMROD_COMP_WAIT, &queue_params.ramrod_flags);
4662
4663 /* in access mode mark mask and value are 0 to strip all vlans */
4664 if (bp->afex_vlan_mode == FUNC_MF_CFG_AFEX_VLAN_ACCESS_MODE) {
4665 q_update_params->silent_removal_value = 0;
4666 q_update_params->silent_removal_mask = 0;
4667 } else {
4668 q_update_params->silent_removal_value =
4669 (bp->afex_def_vlan_tag & VLAN_VID_MASK);
4670 q_update_params->silent_removal_mask = VLAN_VID_MASK;
4671 }
4672
4673 for_each_eth_queue(bp, q) {
4674 /* Set the appropriate Queue object */
4675 fp = &bp->fp[q];
4676 queue_params.q_obj = &fp->q_obj;
4677
4678 /* send the ramrod */
4679 rc = bnx2x_queue_state_change(bp, &queue_params);
4680 if (rc < 0)
4681 BNX2X_ERR("Failed to config silent vlan rem for Q %d\n",
4682 q);
4683 }
4684
4685#ifdef BCM_CNIC
4686 if (!NO_FCOE(bp)) {
4687 fp = &bp->fp[FCOE_IDX];
4688 queue_params.q_obj = &fp->q_obj;
4689
4690 /* clear pending completion bit */
4691 __clear_bit(RAMROD_COMP_WAIT, &queue_params.ramrod_flags);
4692
4693 /* mark latest Q bit */
4694 smp_mb__before_clear_bit();
4695 set_bit(BNX2X_AFEX_FCOE_Q_UPDATE_PENDING, &bp->sp_state);
4696 smp_mb__after_clear_bit();
4697
4698 /* send Q update ramrod for FCoE Q */
4699 rc = bnx2x_queue_state_change(bp, &queue_params);
4700 if (rc < 0)
4701 BNX2X_ERR("Failed to config silent vlan rem for Q %d\n",
4702 q);
4703 } else {
4704 /* If no FCoE ring - ACK MCP now */
4705 bnx2x_link_report(bp);
4706 bnx2x_fw_command(bp, DRV_MSG_CODE_AFEX_VIFSET_ACK, 0);
4707 }
4708#else
4709 /* If no FCoE ring - ACK MCP now */
4710 bnx2x_link_report(bp);
4711 bnx2x_fw_command(bp, DRV_MSG_CODE_AFEX_VIFSET_ACK, 0);
4712#endif /* BCM_CNIC */
4713}
4714
4398static inline struct bnx2x_queue_sp_obj *bnx2x_cid_to_q_obj( 4715static inline struct bnx2x_queue_sp_obj *bnx2x_cid_to_q_obj(
4399 struct bnx2x *bp, u32 cid) 4716 struct bnx2x *bp, u32 cid)
4400{ 4717{
@@ -4493,6 +4810,28 @@ static void bnx2x_eq_int(struct bnx2x *bp)
4493 break; 4810 break;
4494 bnx2x_dcbx_set_params(bp, BNX2X_DCBX_STATE_TX_RELEASED); 4811 bnx2x_dcbx_set_params(bp, BNX2X_DCBX_STATE_TX_RELEASED);
4495 goto next_spqe; 4812 goto next_spqe;
4813 case EVENT_RING_OPCODE_FUNCTION_UPDATE:
4814 DP(BNX2X_MSG_SP | BNX2X_MSG_MCP,
4815 "AFEX: ramrod completed FUNCTION_UPDATE\n");
4816 f_obj->complete_cmd(bp, f_obj, BNX2X_F_CMD_AFEX_UPDATE);
4817
4818 /* We will perform the Queues update from sp_rtnl task
4819 * as all Queue SP operations should run under
4820 * rtnl_lock.
4821 */
4822 smp_mb__before_clear_bit();
4823 set_bit(BNX2X_SP_RTNL_AFEX_F_UPDATE,
4824 &bp->sp_rtnl_state);
4825 smp_mb__after_clear_bit();
4826
4827 schedule_delayed_work(&bp->sp_rtnl_task, 0);
4828 goto next_spqe;
4829
4830 case EVENT_RING_OPCODE_AFEX_VIF_LISTS:
4831 f_obj->complete_cmd(bp, f_obj,
4832 BNX2X_F_CMD_AFEX_VIFLISTS);
4833 bnx2x_after_afex_vif_lists(bp, elem);
4834 goto next_spqe;
4496 case EVENT_RING_OPCODE_FUNCTION_START: 4835 case EVENT_RING_OPCODE_FUNCTION_START:
4497 DP(BNX2X_MSG_SP | NETIF_MSG_IFUP, 4836 DP(BNX2X_MSG_SP | NETIF_MSG_IFUP,
4498 "got FUNC_START ramrod\n"); 4837 "got FUNC_START ramrod\n");
@@ -4624,6 +4963,13 @@ static void bnx2x_sp_task(struct work_struct *work)
4624 4963
4625 bnx2x_ack_sb(bp, bp->igu_dsb_id, ATTENTION_ID, 4964 bnx2x_ack_sb(bp, bp->igu_dsb_id, ATTENTION_ID,
4626 le16_to_cpu(bp->def_att_idx), IGU_INT_ENABLE, 1); 4965 le16_to_cpu(bp->def_att_idx), IGU_INT_ENABLE, 1);
4966
4967 /* afex - poll to check if VIFSET_ACK should be sent to MFW */
4968 if (test_and_clear_bit(BNX2X_AFEX_PENDING_VIFSET_MCP_ACK,
4969 &bp->sp_state)) {
4970 bnx2x_link_report(bp);
4971 bnx2x_fw_command(bp, DRV_MSG_CODE_AFEX_VIFSET_ACK, 0);
4972 }
4627} 4973}
4628 4974
4629irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance) 4975irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance)
@@ -6095,12 +6441,24 @@ static int bnx2x_init_hw_common(struct bnx2x *bp)
6095 if (!CHIP_IS_E1(bp)) 6441 if (!CHIP_IS_E1(bp))
6096 REG_WR(bp, PRS_REG_E1HOV_MODE, bp->path_has_ovlan); 6442 REG_WR(bp, PRS_REG_E1HOV_MODE, bp->path_has_ovlan);
6097 6443
6098 if (!CHIP_IS_E1x(bp) && !CHIP_IS_E3B0(bp)) 6444 if (!CHIP_IS_E1x(bp) && !CHIP_IS_E3B0(bp)) {
6099 /* Bit-map indicating which L2 hdrs may appear 6445 if (IS_MF_AFEX(bp)) {
6100 * after the basic Ethernet header 6446 /* configure that VNTag and VLAN headers must be
6101 */ 6447 * received in afex mode
6102 REG_WR(bp, PRS_REG_HDRS_AFTER_BASIC, 6448 */
6103 bp->path_has_ovlan ? 7 : 6); 6449 REG_WR(bp, PRS_REG_HDRS_AFTER_BASIC, 0xE);
6450 REG_WR(bp, PRS_REG_MUST_HAVE_HDRS, 0xA);
6451 REG_WR(bp, PRS_REG_HDRS_AFTER_TAG_0, 0x6);
6452 REG_WR(bp, PRS_REG_TAG_ETHERTYPE_0, 0x8926);
6453 REG_WR(bp, PRS_REG_TAG_LEN_0, 0x4);
6454 } else {
6455 /* Bit-map indicating which L2 hdrs may appear
6456 * after the basic Ethernet header
6457 */
6458 REG_WR(bp, PRS_REG_HDRS_AFTER_BASIC,
6459 bp->path_has_ovlan ? 7 : 6);
6460 }
6461 }
6104 6462
6105 bnx2x_init_block(bp, BLOCK_TSDM, PHASE_COMMON); 6463 bnx2x_init_block(bp, BLOCK_TSDM, PHASE_COMMON);
6106 bnx2x_init_block(bp, BLOCK_CSDM, PHASE_COMMON); 6464 bnx2x_init_block(bp, BLOCK_CSDM, PHASE_COMMON);
@@ -6134,9 +6492,21 @@ static int bnx2x_init_hw_common(struct bnx2x *bp)
6134 bnx2x_init_block(bp, BLOCK_XPB, PHASE_COMMON); 6492 bnx2x_init_block(bp, BLOCK_XPB, PHASE_COMMON);
6135 bnx2x_init_block(bp, BLOCK_PBF, PHASE_COMMON); 6493 bnx2x_init_block(bp, BLOCK_PBF, PHASE_COMMON);
6136 6494
6137 if (!CHIP_IS_E1x(bp)) 6495 if (!CHIP_IS_E1x(bp)) {
6138 REG_WR(bp, PBF_REG_HDRS_AFTER_BASIC, 6496 if (IS_MF_AFEX(bp)) {
6139 bp->path_has_ovlan ? 7 : 6); 6497 /* configure that VNTag and VLAN headers must be
6498 * sent in afex mode
6499 */
6500 REG_WR(bp, PBF_REG_HDRS_AFTER_BASIC, 0xE);
6501 REG_WR(bp, PBF_REG_MUST_HAVE_HDRS, 0xA);
6502 REG_WR(bp, PBF_REG_HDRS_AFTER_TAG_0, 0x6);
6503 REG_WR(bp, PBF_REG_TAG_ETHERTYPE_0, 0x8926);
6504 REG_WR(bp, PBF_REG_TAG_LEN_0, 0x4);
6505 } else {
6506 REG_WR(bp, PBF_REG_HDRS_AFTER_BASIC,
6507 bp->path_has_ovlan ? 7 : 6);
6508 }
6509 }
6140 6510
6141 REG_WR(bp, SRC_REG_SOFT_RST, 1); 6511 REG_WR(bp, SRC_REG_SOFT_RST, 1);
6142 6512
@@ -6354,15 +6724,29 @@ static int bnx2x_init_hw_port(struct bnx2x *bp)
6354 6724
6355 6725
6356 bnx2x_init_block(bp, BLOCK_PRS, init_phase); 6726 bnx2x_init_block(bp, BLOCK_PRS, init_phase);
6357 if (CHIP_IS_E3B0(bp)) 6727 if (CHIP_IS_E3B0(bp)) {
6358 /* Ovlan exists only if we are in multi-function + 6728 if (IS_MF_AFEX(bp)) {
6359 * switch-dependent mode, in switch-independent there 6729 /* configure headers for AFEX mode */
6360 * is no ovlan headers 6730 REG_WR(bp, BP_PORT(bp) ?
6361 */ 6731 PRS_REG_HDRS_AFTER_BASIC_PORT_1 :
6362 REG_WR(bp, BP_PORT(bp) ? 6732 PRS_REG_HDRS_AFTER_BASIC_PORT_0, 0xE);
6363 PRS_REG_HDRS_AFTER_BASIC_PORT_1 : 6733 REG_WR(bp, BP_PORT(bp) ?
6364 PRS_REG_HDRS_AFTER_BASIC_PORT_0, 6734 PRS_REG_HDRS_AFTER_TAG_0_PORT_1 :
6365 (bp->path_has_ovlan ? 7 : 6)); 6735 PRS_REG_HDRS_AFTER_TAG_0_PORT_0, 0x6);
6736 REG_WR(bp, BP_PORT(bp) ?
6737 PRS_REG_MUST_HAVE_HDRS_PORT_1 :
6738 PRS_REG_MUST_HAVE_HDRS_PORT_0, 0xA);
6739 } else {
6740 /* Ovlan exists only if we are in multi-function +
6741 * switch-dependent mode, in switch-independent there
6742 * is no ovlan headers
6743 */
6744 REG_WR(bp, BP_PORT(bp) ?
6745 PRS_REG_HDRS_AFTER_BASIC_PORT_1 :
6746 PRS_REG_HDRS_AFTER_BASIC_PORT_0,
6747 (bp->path_has_ovlan ? 7 : 6));
6748 }
6749 }
6366 6750
6367 bnx2x_init_block(bp, BLOCK_TSDM, init_phase); 6751 bnx2x_init_block(bp, BLOCK_TSDM, init_phase);
6368 bnx2x_init_block(bp, BLOCK_CSDM, init_phase); 6752 bnx2x_init_block(bp, BLOCK_CSDM, init_phase);
@@ -6424,10 +6808,15 @@ static int bnx2x_init_hw_port(struct bnx2x *bp)
6424 /* Bit-map indicating which L2 hdrs may appear after the 6808 /* Bit-map indicating which L2 hdrs may appear after the
6425 * basic Ethernet header 6809 * basic Ethernet header
6426 */ 6810 */
6427 REG_WR(bp, BP_PORT(bp) ? 6811 if (IS_MF_AFEX(bp))
6428 NIG_REG_P1_HDRS_AFTER_BASIC : 6812 REG_WR(bp, BP_PORT(bp) ?
6429 NIG_REG_P0_HDRS_AFTER_BASIC, 6813 NIG_REG_P1_HDRS_AFTER_BASIC :
6430 IS_MF_SD(bp) ? 7 : 6); 6814 NIG_REG_P0_HDRS_AFTER_BASIC, 0xE);
6815 else
6816 REG_WR(bp, BP_PORT(bp) ?
6817 NIG_REG_P1_HDRS_AFTER_BASIC :
6818 NIG_REG_P0_HDRS_AFTER_BASIC,
6819 IS_MF_SD(bp) ? 7 : 6);
6431 6820
6432 if (CHIP_IS_E3(bp)) 6821 if (CHIP_IS_E3(bp))
6433 REG_WR(bp, BP_PORT(bp) ? 6822 REG_WR(bp, BP_PORT(bp) ?
@@ -6449,6 +6838,7 @@ static int bnx2x_init_hw_port(struct bnx2x *bp)
6449 val = 1; 6838 val = 1;
6450 break; 6839 break;
6451 case MULTI_FUNCTION_SI: 6840 case MULTI_FUNCTION_SI:
6841 case MULTI_FUNCTION_AFEX:
6452 val = 2; 6842 val = 2;
6453 break; 6843 break;
6454 } 6844 }
@@ -7035,7 +7425,8 @@ int bnx2x_set_eth_mac(struct bnx2x *bp, bool set)
7035 unsigned long ramrod_flags = 0; 7425 unsigned long ramrod_flags = 0;
7036 7426
7037#ifdef BCM_CNIC 7427#ifdef BCM_CNIC
7038 if (is_zero_ether_addr(bp->dev->dev_addr) && IS_MF_STORAGE_SD(bp)) { 7428 if (is_zero_ether_addr(bp->dev->dev_addr) &&
7429 (IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp))) {
7039 DP(NETIF_MSG_IFUP | NETIF_MSG_IFDOWN, 7430 DP(NETIF_MSG_IFUP | NETIF_MSG_IFDOWN,
7040 "Ignoring Zero MAC for STORAGE SD mode\n"); 7431 "Ignoring Zero MAC for STORAGE SD mode\n");
7041 return 0; 7432 return 0;
@@ -8572,7 +8963,8 @@ sp_rtnl_not_reset:
8572#endif 8963#endif
8573 if (test_and_clear_bit(BNX2X_SP_RTNL_SETUP_TC, &bp->sp_rtnl_state)) 8964 if (test_and_clear_bit(BNX2X_SP_RTNL_SETUP_TC, &bp->sp_rtnl_state))
8574 bnx2x_setup_tc(bp->dev, bp->dcbx_port_params.ets.num_of_cos); 8965 bnx2x_setup_tc(bp->dev, bp->dcbx_port_params.ets.num_of_cos);
8575 8966 if (test_and_clear_bit(BNX2X_SP_RTNL_AFEX_F_UPDATE, &bp->sp_rtnl_state))
8967 bnx2x_after_function_update(bp);
8576 /* 8968 /*
8577 * in case of fan failure we need to reset id if the "stop on error" 8969 * in case of fan failure we need to reset id if the "stop on error"
8578 * debug flag is set, since we trying to prevent permanent overheating 8970 * debug flag is set, since we trying to prevent permanent overheating
@@ -9149,7 +9541,9 @@ static void __devinit bnx2x_get_common_hwinfo(struct bnx2x *bp)
9149 bp->link_params.feature_config_flags |= 9541 bp->link_params.feature_config_flags |=
9150 (val >= REQ_BC_VER_4_VRFY_SPECIFIC_PHY_OPT_MDL) ? 9542 (val >= REQ_BC_VER_4_VRFY_SPECIFIC_PHY_OPT_MDL) ?
9151 FEATURE_CONFIG_BC_SUPPORTS_DUAL_PHY_OPT_MDL_VRFY : 0; 9543 FEATURE_CONFIG_BC_SUPPORTS_DUAL_PHY_OPT_MDL_VRFY : 0;
9152 9544 bp->link_params.feature_config_flags |=
9545 (val >= REQ_BC_VER_4_VRFY_AFEX_SUPPORTED) ?
9546 FEATURE_CONFIG_BC_SUPPORTS_AFEX : 0;
9153 bp->link_params.feature_config_flags |= 9547 bp->link_params.feature_config_flags |=
9154 (val >= REQ_BC_VER_4_SFP_TX_DISABLE_SUPPORTED) ? 9548 (val >= REQ_BC_VER_4_SFP_TX_DISABLE_SUPPORTED) ?
9155 FEATURE_CONFIG_BC_SUPPORTS_SFP_TX_DISABLED : 0; 9549 FEATURE_CONFIG_BC_SUPPORTS_SFP_TX_DISABLED : 0;
@@ -9781,6 +10175,9 @@ static void __devinit bnx2x_get_mac_hwinfo(struct bnx2x *bp)
9781 10175
9782 } else 10176 } else
9783 bp->flags |= NO_FCOE_FLAG; 10177 bp->flags |= NO_FCOE_FLAG;
10178
10179 bp->mf_ext_config = cfg;
10180
9784 } else { /* SD MODE */ 10181 } else { /* SD MODE */
9785 if (IS_MF_STORAGE_SD(bp)) { 10182 if (IS_MF_STORAGE_SD(bp)) {
9786 if (BNX2X_IS_MF_SD_PROTOCOL_ISCSI(bp)) { 10183 if (BNX2X_IS_MF_SD_PROTOCOL_ISCSI(bp)) {
@@ -9802,6 +10199,11 @@ static void __devinit bnx2x_get_mac_hwinfo(struct bnx2x *bp)
9802 memset(bp->dev->dev_addr, 0, ETH_ALEN); 10199 memset(bp->dev->dev_addr, 0, ETH_ALEN);
9803 } 10200 }
9804 } 10201 }
10202
10203 if (IS_MF_FCOE_AFEX(bp))
10204 /* use FIP MAC as primary MAC */
10205 memcpy(bp->dev->dev_addr, fip_mac, ETH_ALEN);
10206
9805#endif 10207#endif
9806 } else { 10208 } else {
9807 /* in SF read MACs from port configuration */ 10209 /* in SF read MACs from port configuration */
@@ -9974,6 +10376,19 @@ static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp)
9974 } else 10376 } else
9975 BNX2X_DEV_INFO("illegal MAC address for SI\n"); 10377 BNX2X_DEV_INFO("illegal MAC address for SI\n");
9976 break; 10378 break;
10379 case SHARED_FEAT_CFG_FORCE_SF_MODE_AFEX_MODE:
10380 if ((!CHIP_IS_E1x(bp)) &&
10381 (MF_CFG_RD(bp, func_mf_config[func].
10382 mac_upper) != 0xffff) &&
10383 (SHMEM2_HAS(bp,
10384 afex_driver_support))) {
10385 bp->mf_mode = MULTI_FUNCTION_AFEX;
10386 bp->mf_config[vn] = MF_CFG_RD(bp,
10387 func_mf_config[func].config);
10388 } else {
10389 BNX2X_DEV_INFO("can not configure afex mode\n");
10390 }
10391 break;
9977 case SHARED_FEAT_CFG_FORCE_SF_MODE_MF_ALLOWED: 10392 case SHARED_FEAT_CFG_FORCE_SF_MODE_MF_ALLOWED:
9978 /* get OV configuration */ 10393 /* get OV configuration */
9979 val = MF_CFG_RD(bp, 10394 val = MF_CFG_RD(bp,
@@ -10014,6 +10429,9 @@ static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp)
10014 return -EPERM; 10429 return -EPERM;
10015 } 10430 }
10016 break; 10431 break;
10432 case MULTI_FUNCTION_AFEX:
10433 BNX2X_DEV_INFO("func %d is in MF afex mode\n", func);
10434 break;
10017 case MULTI_FUNCTION_SI: 10435 case MULTI_FUNCTION_SI:
10018 BNX2X_DEV_INFO("func %d is in MF switch-independent mode\n", 10436 BNX2X_DEV_INFO("func %d is in MF switch-independent mode\n",
10019 func); 10437 func);
@@ -10181,6 +10599,9 @@ static void __devinit bnx2x_set_modes_bitmap(struct bnx2x *bp)
10181 case MULTI_FUNCTION_SI: 10599 case MULTI_FUNCTION_SI:
10182 SET_FLAGS(flags, MODE_MF_SI); 10600 SET_FLAGS(flags, MODE_MF_SI);
10183 break; 10601 break;
10602 case MULTI_FUNCTION_AFEX:
10603 SET_FLAGS(flags, MODE_MF_AFEX);
10604 break;
10184 } 10605 }
10185 } else 10606 } else
10186 SET_FLAGS(flags, MODE_SF); 10607 SET_FLAGS(flags, MODE_SF);
@@ -10243,7 +10664,7 @@ static int __devinit bnx2x_init_bp(struct bnx2x *bp)
10243 bp->disable_tpa = disable_tpa; 10664 bp->disable_tpa = disable_tpa;
10244 10665
10245#ifdef BCM_CNIC 10666#ifdef BCM_CNIC
10246 bp->disable_tpa |= IS_MF_STORAGE_SD(bp); 10667 bp->disable_tpa |= IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp);
10247#endif 10668#endif
10248 10669
10249 /* Set TPA flags */ 10670 /* Set TPA flags */
@@ -10262,7 +10683,7 @@ static int __devinit bnx2x_init_bp(struct bnx2x *bp)
10262 10683
10263 bp->mrrs = mrrs; 10684 bp->mrrs = mrrs;
10264 10685
10265 bp->tx_ring_size = MAX_TX_AVAIL; 10686 bp->tx_ring_size = IS_MF_FCOE_AFEX(bp) ? 0 : MAX_TX_AVAIL;
10266 10687
10267 /* make sure that the numbers are in the right granularity */ 10688 /* make sure that the numbers are in the right granularity */
10268 bp->tx_ticks = (50 / BNX2X_BTR) * BNX2X_BTR; 10689 bp->tx_ticks = (50 / BNX2X_BTR) * BNX2X_BTR;
@@ -11098,6 +11519,8 @@ void bnx2x__init_func_obj(struct bnx2x *bp)
11098 bnx2x_init_func_obj(bp, &bp->func_obj, 11519 bnx2x_init_func_obj(bp, &bp->func_obj,
11099 bnx2x_sp(bp, func_rdata), 11520 bnx2x_sp(bp, func_rdata),
11100 bnx2x_sp_mapping(bp, func_rdata), 11521 bnx2x_sp_mapping(bp, func_rdata),
11522 bnx2x_sp(bp, func_afex_rdata),
11523 bnx2x_sp_mapping(bp, func_afex_rdata),
11101 &bnx2x_func_sp_drv); 11524 &bnx2x_func_sp_drv);
11102} 11525}
11103 11526
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c
index 553b9877339e..6c14b4a4e82c 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c
@@ -633,14 +633,17 @@ static inline u8 bnx2x_vlan_mac_get_rx_tx_flag(struct bnx2x_vlan_mac_obj *o)
633} 633}
634 634
635 635
636static inline void bnx2x_set_mac_in_nig(struct bnx2x *bp, 636void bnx2x_set_mac_in_nig(struct bnx2x *bp,
637 bool add, unsigned char *dev_addr, int index) 637 bool add, unsigned char *dev_addr, int index)
638{ 638{
639 u32 wb_data[2]; 639 u32 wb_data[2];
640 u32 reg_offset = BP_PORT(bp) ? NIG_REG_LLH1_FUNC_MEM : 640 u32 reg_offset = BP_PORT(bp) ? NIG_REG_LLH1_FUNC_MEM :
641 NIG_REG_LLH0_FUNC_MEM; 641 NIG_REG_LLH0_FUNC_MEM;
642 642
643 if (!IS_MF_SI(bp) || index > BNX2X_LLH_CAM_MAX_PF_LINE) 643 if (!IS_MF_SI(bp) && !IS_MF_AFEX(bp))
644 return;
645
646 if (index > BNX2X_LLH_CAM_MAX_PF_LINE)
644 return; 647 return;
645 648
646 DP(BNX2X_MSG_SP, "Going to %s LLH configuration at entry %d\n", 649 DP(BNX2X_MSG_SP, "Going to %s LLH configuration at entry %d\n",
@@ -4398,6 +4401,9 @@ static void bnx2x_q_fill_init_tx_data(struct bnx2x_queue_sp_obj *o,
4398 test_bit(BNX2X_Q_FLG_TX_SWITCH, flags); 4401 test_bit(BNX2X_Q_FLG_TX_SWITCH, flags);
4399 tx_data->anti_spoofing_flg = 4402 tx_data->anti_spoofing_flg =
4400 test_bit(BNX2X_Q_FLG_ANTI_SPOOF, flags); 4403 test_bit(BNX2X_Q_FLG_ANTI_SPOOF, flags);
4404 tx_data->force_default_pri_flg =
4405 test_bit(BNX2X_Q_FLG_FORCE_DEFAULT_PRI, flags);
4406
4401 tx_data->tx_status_block_id = params->fw_sb_id; 4407 tx_data->tx_status_block_id = params->fw_sb_id;
4402 tx_data->tx_sb_index_number = params->sb_cq_index; 4408 tx_data->tx_sb_index_number = params->sb_cq_index;
4403 tx_data->tss_leading_client_id = params->tss_leading_cl_id; 4409 tx_data->tss_leading_client_id = params->tss_leading_cl_id;
@@ -5325,6 +5331,17 @@ static int bnx2x_func_chk_transition(struct bnx2x *bp,
5325 case BNX2X_F_STATE_STARTED: 5331 case BNX2X_F_STATE_STARTED:
5326 if (cmd == BNX2X_F_CMD_STOP) 5332 if (cmd == BNX2X_F_CMD_STOP)
5327 next_state = BNX2X_F_STATE_INITIALIZED; 5333 next_state = BNX2X_F_STATE_INITIALIZED;
5334 /* afex ramrods can be sent only in started mode, and only
5335 * if not pending for function_stop ramrod completion
5336 * for these events - next state remained STARTED.
5337 */
5338 else if ((cmd == BNX2X_F_CMD_AFEX_UPDATE) &&
5339 (!test_bit(BNX2X_F_CMD_STOP, &o->pending)))
5340 next_state = BNX2X_F_STATE_STARTED;
5341
5342 else if ((cmd == BNX2X_F_CMD_AFEX_VIFLISTS) &&
5343 (!test_bit(BNX2X_F_CMD_STOP, &o->pending)))
5344 next_state = BNX2X_F_STATE_STARTED;
5328 else if (cmd == BNX2X_F_CMD_TX_STOP) 5345 else if (cmd == BNX2X_F_CMD_TX_STOP)
5329 next_state = BNX2X_F_STATE_TX_STOPPED; 5346 next_state = BNX2X_F_STATE_TX_STOPPED;
5330 5347
@@ -5612,6 +5629,83 @@ static inline int bnx2x_func_send_start(struct bnx2x *bp,
5612 U64_LO(data_mapping), NONE_CONNECTION_TYPE); 5629 U64_LO(data_mapping), NONE_CONNECTION_TYPE);
5613} 5630}
5614 5631
5632static inline int bnx2x_func_send_afex_update(struct bnx2x *bp,
5633 struct bnx2x_func_state_params *params)
5634{
5635 struct bnx2x_func_sp_obj *o = params->f_obj;
5636 struct function_update_data *rdata =
5637 (struct function_update_data *)o->afex_rdata;
5638 dma_addr_t data_mapping = o->afex_rdata_mapping;
5639 struct bnx2x_func_afex_update_params *afex_update_params =
5640 &params->params.afex_update;
5641
5642 memset(rdata, 0, sizeof(*rdata));
5643
5644 /* Fill the ramrod data with provided parameters */
5645 rdata->vif_id_change_flg = 1;
5646 rdata->vif_id = cpu_to_le16(afex_update_params->vif_id);
5647 rdata->afex_default_vlan_change_flg = 1;
5648 rdata->afex_default_vlan =
5649 cpu_to_le16(afex_update_params->afex_default_vlan);
5650 rdata->allowed_priorities_change_flg = 1;
5651 rdata->allowed_priorities = afex_update_params->allowed_priorities;
5652
5653 /* No need for an explicit memory barrier here as long we would
5654 * need to ensure the ordering of writing to the SPQ element
5655 * and updating of the SPQ producer which involves a memory
5656 * read and we will have to put a full memory barrier there
5657 * (inside bnx2x_sp_post()).
5658 */
5659 DP(BNX2X_MSG_SP,
5660 "afex: sending func_update vif_id 0x%x dvlan 0x%x prio 0x%x\n",
5661 rdata->vif_id,
5662 rdata->afex_default_vlan, rdata->allowed_priorities);
5663
5664 return bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_FUNCTION_UPDATE, 0,
5665 U64_HI(data_mapping),
5666 U64_LO(data_mapping), NONE_CONNECTION_TYPE);
5667}
5668
5669static
5670inline int bnx2x_func_send_afex_viflists(struct bnx2x *bp,
5671 struct bnx2x_func_state_params *params)
5672{
5673 struct bnx2x_func_sp_obj *o = params->f_obj;
5674 struct afex_vif_list_ramrod_data *rdata =
5675 (struct afex_vif_list_ramrod_data *)o->afex_rdata;
5676 struct bnx2x_func_afex_viflists_params *afex_viflist_params =
5677 &params->params.afex_viflists;
5678 u64 *p_rdata = (u64 *)rdata;
5679
5680 memset(rdata, 0, sizeof(*rdata));
5681
5682 /* Fill the ramrod data with provided parameters */
5683 rdata->vif_list_index = afex_viflist_params->vif_list_index;
5684 rdata->func_bit_map = afex_viflist_params->func_bit_map;
5685 rdata->afex_vif_list_command =
5686 afex_viflist_params->afex_vif_list_command;
5687 rdata->func_to_clear = afex_viflist_params->func_to_clear;
5688
5689 /* send in echo type of sub command */
5690 rdata->echo = afex_viflist_params->afex_vif_list_command;
5691
5692 /* No need for an explicit memory barrier here as long we would
5693 * need to ensure the ordering of writing to the SPQ element
5694 * and updating of the SPQ producer which involves a memory
5695 * read and we will have to put a full memory barrier there
5696 * (inside bnx2x_sp_post()).
5697 */
5698
5699 DP(BNX2X_MSG_SP, "afex: ramrod lists, cmd 0x%x index 0x%x func_bit_map 0x%x func_to_clr 0x%x\n",
5700 rdata->afex_vif_list_command, rdata->vif_list_index,
5701 rdata->func_bit_map, rdata->func_to_clear);
5702
5703 /* this ramrod sends data directly and not through DMA mapping */
5704 return bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_AFEX_VIF_LISTS, 0,
5705 U64_HI(*p_rdata), U64_LO(*p_rdata),
5706 NONE_CONNECTION_TYPE);
5707}
5708
5615static inline int bnx2x_func_send_stop(struct bnx2x *bp, 5709static inline int bnx2x_func_send_stop(struct bnx2x *bp,
5616 struct bnx2x_func_state_params *params) 5710 struct bnx2x_func_state_params *params)
5617{ 5711{
@@ -5663,6 +5757,10 @@ static int bnx2x_func_send_cmd(struct bnx2x *bp,
5663 return bnx2x_func_send_stop(bp, params); 5757 return bnx2x_func_send_stop(bp, params);
5664 case BNX2X_F_CMD_HW_RESET: 5758 case BNX2X_F_CMD_HW_RESET:
5665 return bnx2x_func_hw_reset(bp, params); 5759 return bnx2x_func_hw_reset(bp, params);
5760 case BNX2X_F_CMD_AFEX_UPDATE:
5761 return bnx2x_func_send_afex_update(bp, params);
5762 case BNX2X_F_CMD_AFEX_VIFLISTS:
5763 return bnx2x_func_send_afex_viflists(bp, params);
5666 case BNX2X_F_CMD_TX_STOP: 5764 case BNX2X_F_CMD_TX_STOP:
5667 return bnx2x_func_send_tx_stop(bp, params); 5765 return bnx2x_func_send_tx_stop(bp, params);
5668 case BNX2X_F_CMD_TX_START: 5766 case BNX2X_F_CMD_TX_START:
@@ -5676,6 +5774,7 @@ static int bnx2x_func_send_cmd(struct bnx2x *bp,
5676void bnx2x_init_func_obj(struct bnx2x *bp, 5774void bnx2x_init_func_obj(struct bnx2x *bp,
5677 struct bnx2x_func_sp_obj *obj, 5775 struct bnx2x_func_sp_obj *obj,
5678 void *rdata, dma_addr_t rdata_mapping, 5776 void *rdata, dma_addr_t rdata_mapping,
5777 void *afex_rdata, dma_addr_t afex_rdata_mapping,
5679 struct bnx2x_func_sp_drv_ops *drv_iface) 5778 struct bnx2x_func_sp_drv_ops *drv_iface)
5680{ 5779{
5681 memset(obj, 0, sizeof(*obj)); 5780 memset(obj, 0, sizeof(*obj));
@@ -5684,7 +5783,8 @@ void bnx2x_init_func_obj(struct bnx2x *bp,
5684 5783
5685 obj->rdata = rdata; 5784 obj->rdata = rdata;
5686 obj->rdata_mapping = rdata_mapping; 5785 obj->rdata_mapping = rdata_mapping;
5687 5786 obj->afex_rdata = afex_rdata;
5787 obj->afex_rdata_mapping = afex_rdata_mapping;
5688 obj->send_cmd = bnx2x_func_send_cmd; 5788 obj->send_cmd = bnx2x_func_send_cmd;
5689 obj->check_transition = bnx2x_func_chk_transition; 5789 obj->check_transition = bnx2x_func_chk_transition;
5690 obj->complete_cmd = bnx2x_func_comp_cmd; 5790 obj->complete_cmd = bnx2x_func_comp_cmd;
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h
index dee2f372a974..efd80bdd0dfe 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h
@@ -62,6 +62,8 @@ enum {
62 BNX2X_FILTER_MCAST_PENDING, 62 BNX2X_FILTER_MCAST_PENDING,
63 BNX2X_FILTER_MCAST_SCHED, 63 BNX2X_FILTER_MCAST_SCHED,
64 BNX2X_FILTER_RSS_CONF_PENDING, 64 BNX2X_FILTER_RSS_CONF_PENDING,
65 BNX2X_AFEX_FCOE_Q_UPDATE_PENDING,
66 BNX2X_AFEX_PENDING_VIFSET_MCP_ACK
65}; 67};
66 68
67struct bnx2x_raw_obj { 69struct bnx2x_raw_obj {
@@ -432,6 +434,8 @@ enum {
432 BNX2X_LLH_CAM_MAX_PF_LINE = NIG_REG_LLH1_FUNC_MEM_SIZE / 2 434 BNX2X_LLH_CAM_MAX_PF_LINE = NIG_REG_LLH1_FUNC_MEM_SIZE / 2
433}; 435};
434 436
437void bnx2x_set_mac_in_nig(struct bnx2x *bp,
438 bool add, unsigned char *dev_addr, int index);
435 439
436/** RX_MODE verbs:DROP_ALL/ACCEPT_ALL/ACCEPT_ALL_MULTI/ACCEPT_ALL_VLAN/NORMAL */ 440/** RX_MODE verbs:DROP_ALL/ACCEPT_ALL/ACCEPT_ALL_MULTI/ACCEPT_ALL_VLAN/NORMAL */
437 441
@@ -798,7 +802,8 @@ enum {
798 BNX2X_Q_FLG_TX_SWITCH, 802 BNX2X_Q_FLG_TX_SWITCH,
799 BNX2X_Q_FLG_TX_SEC, 803 BNX2X_Q_FLG_TX_SEC,
800 BNX2X_Q_FLG_ANTI_SPOOF, 804 BNX2X_Q_FLG_ANTI_SPOOF,
801 BNX2X_Q_FLG_SILENT_VLAN_REM 805 BNX2X_Q_FLG_SILENT_VLAN_REM,
806 BNX2X_Q_FLG_FORCE_DEFAULT_PRI
802}; 807};
803 808
804/* Queue type options: queue type may be a compination of below. */ 809/* Queue type options: queue type may be a compination of below. */
@@ -960,6 +965,11 @@ struct bnx2x_queue_state_params {
960 } params; 965 } params;
961}; 966};
962 967
968struct bnx2x_viflist_params {
969 u8 echo_res;
970 u8 func_bit_map_res;
971};
972
963struct bnx2x_queue_sp_obj { 973struct bnx2x_queue_sp_obj {
964 u32 cids[BNX2X_MULTI_TX_COS]; 974 u32 cids[BNX2X_MULTI_TX_COS];
965 u8 cl_id; 975 u8 cl_id;
@@ -1042,6 +1052,8 @@ enum bnx2x_func_cmd {
1042 BNX2X_F_CMD_START, 1052 BNX2X_F_CMD_START,
1043 BNX2X_F_CMD_STOP, 1053 BNX2X_F_CMD_STOP,
1044 BNX2X_F_CMD_HW_RESET, 1054 BNX2X_F_CMD_HW_RESET,
1055 BNX2X_F_CMD_AFEX_UPDATE,
1056 BNX2X_F_CMD_AFEX_VIFLISTS,
1045 BNX2X_F_CMD_TX_STOP, 1057 BNX2X_F_CMD_TX_STOP,
1046 BNX2X_F_CMD_TX_START, 1058 BNX2X_F_CMD_TX_START,
1047 BNX2X_F_CMD_MAX, 1059 BNX2X_F_CMD_MAX,
@@ -1086,6 +1098,18 @@ struct bnx2x_func_start_params {
1086 u8 network_cos_mode; 1098 u8 network_cos_mode;
1087}; 1099};
1088 1100
1101struct bnx2x_func_afex_update_params {
1102 u16 vif_id;
1103 u16 afex_default_vlan;
1104 u8 allowed_priorities;
1105};
1106
1107struct bnx2x_func_afex_viflists_params {
1108 u16 vif_list_index;
1109 u8 func_bit_map;
1110 u8 afex_vif_list_command;
1111 u8 func_to_clear;
1112};
1089struct bnx2x_func_tx_start_params { 1113struct bnx2x_func_tx_start_params {
1090 struct priority_cos traffic_type_to_priority_cos[MAX_TRAFFIC_TYPES]; 1114 struct priority_cos traffic_type_to_priority_cos[MAX_TRAFFIC_TYPES];
1091 u8 dcb_enabled; 1115 u8 dcb_enabled;
@@ -1107,6 +1131,8 @@ struct bnx2x_func_state_params {
1107 struct bnx2x_func_hw_init_params hw_init; 1131 struct bnx2x_func_hw_init_params hw_init;
1108 struct bnx2x_func_hw_reset_params hw_reset; 1132 struct bnx2x_func_hw_reset_params hw_reset;
1109 struct bnx2x_func_start_params start; 1133 struct bnx2x_func_start_params start;
1134 struct bnx2x_func_afex_update_params afex_update;
1135 struct bnx2x_func_afex_viflists_params afex_viflists;
1110 struct bnx2x_func_tx_start_params tx_start; 1136 struct bnx2x_func_tx_start_params tx_start;
1111 } params; 1137 } params;
1112}; 1138};
@@ -1151,6 +1177,13 @@ struct bnx2x_func_sp_obj {
1151 void *rdata; 1177 void *rdata;
1152 dma_addr_t rdata_mapping; 1178 dma_addr_t rdata_mapping;
1153 1179
1180 /* Buffer to use as a afex ramrod data and its mapping.
1181 * This can't be same rdata as above because afex ramrod requests
1182 * can arrive to the object in parallel to other ramrod requests.
1183 */
1184 void *afex_rdata;
1185 dma_addr_t afex_rdata_mapping;
1186
1154 /* this mutex validates that when pending flag is taken, the next 1187 /* this mutex validates that when pending flag is taken, the next
1155 * ramrod to be sent will be the one set the pending bit 1188 * ramrod to be sent will be the one set the pending bit
1156 */ 1189 */
@@ -1194,6 +1227,7 @@ union bnx2x_qable_obj {
1194void bnx2x_init_func_obj(struct bnx2x *bp, 1227void bnx2x_init_func_obj(struct bnx2x *bp,
1195 struct bnx2x_func_sp_obj *obj, 1228 struct bnx2x_func_sp_obj *obj,
1196 void *rdata, dma_addr_t rdata_mapping, 1229 void *rdata, dma_addr_t rdata_mapping,
1230 void *afex_rdata, dma_addr_t afex_rdata_mapping,
1197 struct bnx2x_func_sp_drv_ops *drv_iface); 1231 struct bnx2x_func_sp_drv_ops *drv_iface);
1198 1232
1199int bnx2x_func_state_change(struct bnx2x *bp, 1233int bnx2x_func_state_change(struct bnx2x *bp,
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c
index e1c9310fb07c..7366e92c3fa7 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c
@@ -1561,3 +1561,274 @@ void bnx2x_save_statistics(struct bnx2x *bp)
1561 UPDATE_FW_STAT_OLD(mac_discard); 1561 UPDATE_FW_STAT_OLD(mac_discard);
1562 } 1562 }
1563} 1563}
1564
1565void bnx2x_afex_collect_stats(struct bnx2x *bp, void *void_afex_stats,
1566 u32 stats_type)
1567{
1568 int i;
1569 struct afex_stats *afex_stats = (struct afex_stats *)void_afex_stats;
1570 struct bnx2x_eth_stats *estats = &bp->eth_stats;
1571 struct per_queue_stats *fcoe_q_stats =
1572 &bp->fw_stats_data->queue_stats[FCOE_IDX];
1573
1574 struct tstorm_per_queue_stats *fcoe_q_tstorm_stats =
1575 &fcoe_q_stats->tstorm_queue_statistics;
1576
1577 struct ustorm_per_queue_stats *fcoe_q_ustorm_stats =
1578 &fcoe_q_stats->ustorm_queue_statistics;
1579
1580 struct xstorm_per_queue_stats *fcoe_q_xstorm_stats =
1581 &fcoe_q_stats->xstorm_queue_statistics;
1582
1583 struct fcoe_statistics_params *fw_fcoe_stat =
1584 &bp->fw_stats_data->fcoe;
1585
1586 memset(afex_stats, 0, sizeof(struct afex_stats));
1587
1588 for_each_eth_queue(bp, i) {
1589 struct bnx2x_fastpath *fp = &bp->fp[i];
1590 struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
1591
1592 ADD_64(afex_stats->rx_unicast_bytes_hi,
1593 qstats->total_unicast_bytes_received_hi,
1594 afex_stats->rx_unicast_bytes_lo,
1595 qstats->total_unicast_bytes_received_lo);
1596
1597 ADD_64(afex_stats->rx_broadcast_bytes_hi,
1598 qstats->total_broadcast_bytes_received_hi,
1599 afex_stats->rx_broadcast_bytes_lo,
1600 qstats->total_broadcast_bytes_received_lo);
1601
1602 ADD_64(afex_stats->rx_multicast_bytes_hi,
1603 qstats->total_multicast_bytes_received_hi,
1604 afex_stats->rx_multicast_bytes_lo,
1605 qstats->total_multicast_bytes_received_lo);
1606
1607 ADD_64(afex_stats->rx_unicast_frames_hi,
1608 qstats->total_unicast_packets_received_hi,
1609 afex_stats->rx_unicast_frames_lo,
1610 qstats->total_unicast_packets_received_lo);
1611
1612 ADD_64(afex_stats->rx_broadcast_frames_hi,
1613 qstats->total_broadcast_packets_received_hi,
1614 afex_stats->rx_broadcast_frames_lo,
1615 qstats->total_broadcast_packets_received_lo);
1616
1617 ADD_64(afex_stats->rx_multicast_frames_hi,
1618 qstats->total_multicast_packets_received_hi,
1619 afex_stats->rx_multicast_frames_lo,
1620 qstats->total_multicast_packets_received_lo);
1621
1622 /* sum to rx_frames_discarded all discraded
1623 * packets due to size, ttl0 and checksum
1624 */
1625 ADD_64(afex_stats->rx_frames_discarded_hi,
1626 qstats->total_packets_received_checksum_discarded_hi,
1627 afex_stats->rx_frames_discarded_lo,
1628 qstats->total_packets_received_checksum_discarded_lo);
1629
1630 ADD_64(afex_stats->rx_frames_discarded_hi,
1631 qstats->total_packets_received_ttl0_discarded_hi,
1632 afex_stats->rx_frames_discarded_lo,
1633 qstats->total_packets_received_ttl0_discarded_lo);
1634
1635 ADD_64(afex_stats->rx_frames_discarded_hi,
1636 qstats->etherstatsoverrsizepkts_hi,
1637 afex_stats->rx_frames_discarded_lo,
1638 qstats->etherstatsoverrsizepkts_lo);
1639
1640 ADD_64(afex_stats->rx_frames_dropped_hi,
1641 qstats->no_buff_discard_hi,
1642 afex_stats->rx_frames_dropped_lo,
1643 qstats->no_buff_discard_lo);
1644
1645 ADD_64(afex_stats->tx_unicast_bytes_hi,
1646 qstats->total_unicast_bytes_transmitted_hi,
1647 afex_stats->tx_unicast_bytes_lo,
1648 qstats->total_unicast_bytes_transmitted_lo);
1649
1650 ADD_64(afex_stats->tx_broadcast_bytes_hi,
1651 qstats->total_broadcast_bytes_transmitted_hi,
1652 afex_stats->tx_broadcast_bytes_lo,
1653 qstats->total_broadcast_bytes_transmitted_lo);
1654
1655 ADD_64(afex_stats->tx_multicast_bytes_hi,
1656 qstats->total_multicast_bytes_transmitted_hi,
1657 afex_stats->tx_multicast_bytes_lo,
1658 qstats->total_multicast_bytes_transmitted_lo);
1659
1660 ADD_64(afex_stats->tx_unicast_frames_hi,
1661 qstats->total_unicast_packets_transmitted_hi,
1662 afex_stats->tx_unicast_frames_lo,
1663 qstats->total_unicast_packets_transmitted_lo);
1664
1665 ADD_64(afex_stats->tx_broadcast_frames_hi,
1666 qstats->total_broadcast_packets_transmitted_hi,
1667 afex_stats->tx_broadcast_frames_lo,
1668 qstats->total_broadcast_packets_transmitted_lo);
1669
1670 ADD_64(afex_stats->tx_multicast_frames_hi,
1671 qstats->total_multicast_packets_transmitted_hi,
1672 afex_stats->tx_multicast_frames_lo,
1673 qstats->total_multicast_packets_transmitted_lo);
1674
1675 ADD_64(afex_stats->tx_frames_dropped_hi,
1676 qstats->total_transmitted_dropped_packets_error_hi,
1677 afex_stats->tx_frames_dropped_lo,
1678 qstats->total_transmitted_dropped_packets_error_lo);
1679 }
1680
1681 /* now add FCoE statistics which are collected separately
1682 * (both offloaded and non offloaded)
1683 */
1684 if (!NO_FCOE(bp)) {
1685 ADD_64_LE(afex_stats->rx_unicast_bytes_hi,
1686 LE32_0,
1687 afex_stats->rx_unicast_bytes_lo,
1688 fw_fcoe_stat->rx_stat0.fcoe_rx_byte_cnt);
1689
1690 ADD_64_LE(afex_stats->rx_unicast_bytes_hi,
1691 fcoe_q_tstorm_stats->rcv_ucast_bytes.hi,
1692 afex_stats->rx_unicast_bytes_lo,
1693 fcoe_q_tstorm_stats->rcv_ucast_bytes.lo);
1694
1695 ADD_64_LE(afex_stats->rx_broadcast_bytes_hi,
1696 fcoe_q_tstorm_stats->rcv_bcast_bytes.hi,
1697 afex_stats->rx_broadcast_bytes_lo,
1698 fcoe_q_tstorm_stats->rcv_bcast_bytes.lo);
1699
1700 ADD_64_LE(afex_stats->rx_multicast_bytes_hi,
1701 fcoe_q_tstorm_stats->rcv_mcast_bytes.hi,
1702 afex_stats->rx_multicast_bytes_lo,
1703 fcoe_q_tstorm_stats->rcv_mcast_bytes.lo);
1704
1705 ADD_64_LE(afex_stats->rx_unicast_frames_hi,
1706 LE32_0,
1707 afex_stats->rx_unicast_frames_lo,
1708 fw_fcoe_stat->rx_stat0.fcoe_rx_pkt_cnt);
1709
1710 ADD_64_LE(afex_stats->rx_unicast_frames_hi,
1711 LE32_0,
1712 afex_stats->rx_unicast_frames_lo,
1713 fcoe_q_tstorm_stats->rcv_ucast_pkts);
1714
1715 ADD_64_LE(afex_stats->rx_broadcast_frames_hi,
1716 LE32_0,
1717 afex_stats->rx_broadcast_frames_lo,
1718 fcoe_q_tstorm_stats->rcv_bcast_pkts);
1719
1720 ADD_64_LE(afex_stats->rx_multicast_frames_hi,
1721 LE32_0,
1722 afex_stats->rx_multicast_frames_lo,
1723 fcoe_q_tstorm_stats->rcv_ucast_pkts);
1724
1725 ADD_64_LE(afex_stats->rx_frames_discarded_hi,
1726 LE32_0,
1727 afex_stats->rx_frames_discarded_lo,
1728 fcoe_q_tstorm_stats->checksum_discard);
1729
1730 ADD_64_LE(afex_stats->rx_frames_discarded_hi,
1731 LE32_0,
1732 afex_stats->rx_frames_discarded_lo,
1733 fcoe_q_tstorm_stats->pkts_too_big_discard);
1734
1735 ADD_64_LE(afex_stats->rx_frames_discarded_hi,
1736 LE32_0,
1737 afex_stats->rx_frames_discarded_lo,
1738 fcoe_q_tstorm_stats->ttl0_discard);
1739
1740 ADD_64_LE16(afex_stats->rx_frames_dropped_hi,
1741 LE16_0,
1742 afex_stats->rx_frames_dropped_lo,
1743 fcoe_q_tstorm_stats->no_buff_discard);
1744
1745 ADD_64_LE(afex_stats->rx_frames_dropped_hi,
1746 LE32_0,
1747 afex_stats->rx_frames_dropped_lo,
1748 fcoe_q_ustorm_stats->ucast_no_buff_pkts);
1749
1750 ADD_64_LE(afex_stats->rx_frames_dropped_hi,
1751 LE32_0,
1752 afex_stats->rx_frames_dropped_lo,
1753 fcoe_q_ustorm_stats->mcast_no_buff_pkts);
1754
1755 ADD_64_LE(afex_stats->rx_frames_dropped_hi,
1756 LE32_0,
1757 afex_stats->rx_frames_dropped_lo,
1758 fcoe_q_ustorm_stats->bcast_no_buff_pkts);
1759
1760 ADD_64_LE(afex_stats->rx_frames_dropped_hi,
1761 LE32_0,
1762 afex_stats->rx_frames_dropped_lo,
1763 fw_fcoe_stat->rx_stat1.fcoe_rx_drop_pkt_cnt);
1764
1765 ADD_64_LE(afex_stats->rx_frames_dropped_hi,
1766 LE32_0,
1767 afex_stats->rx_frames_dropped_lo,
1768 fw_fcoe_stat->rx_stat2.fcoe_rx_drop_pkt_cnt);
1769
1770 ADD_64_LE(afex_stats->tx_unicast_bytes_hi,
1771 LE32_0,
1772 afex_stats->tx_unicast_bytes_lo,
1773 fw_fcoe_stat->tx_stat.fcoe_tx_byte_cnt);
1774
1775 ADD_64_LE(afex_stats->tx_unicast_bytes_hi,
1776 fcoe_q_xstorm_stats->ucast_bytes_sent.hi,
1777 afex_stats->tx_unicast_bytes_lo,
1778 fcoe_q_xstorm_stats->ucast_bytes_sent.lo);
1779
1780 ADD_64_LE(afex_stats->tx_broadcast_bytes_hi,
1781 fcoe_q_xstorm_stats->bcast_bytes_sent.hi,
1782 afex_stats->tx_broadcast_bytes_lo,
1783 fcoe_q_xstorm_stats->bcast_bytes_sent.lo);
1784
1785 ADD_64_LE(afex_stats->tx_multicast_bytes_hi,
1786 fcoe_q_xstorm_stats->mcast_bytes_sent.hi,
1787 afex_stats->tx_multicast_bytes_lo,
1788 fcoe_q_xstorm_stats->mcast_bytes_sent.lo);
1789
1790 ADD_64_LE(afex_stats->tx_unicast_frames_hi,
1791 LE32_0,
1792 afex_stats->tx_unicast_frames_lo,
1793 fw_fcoe_stat->tx_stat.fcoe_tx_pkt_cnt);
1794
1795 ADD_64_LE(afex_stats->tx_unicast_frames_hi,
1796 LE32_0,
1797 afex_stats->tx_unicast_frames_lo,
1798 fcoe_q_xstorm_stats->ucast_pkts_sent);
1799
1800 ADD_64_LE(afex_stats->tx_broadcast_frames_hi,
1801 LE32_0,
1802 afex_stats->tx_broadcast_frames_lo,
1803 fcoe_q_xstorm_stats->bcast_pkts_sent);
1804
1805 ADD_64_LE(afex_stats->tx_multicast_frames_hi,
1806 LE32_0,
1807 afex_stats->tx_multicast_frames_lo,
1808 fcoe_q_xstorm_stats->mcast_pkts_sent);
1809
1810 ADD_64_LE(afex_stats->tx_frames_dropped_hi,
1811 LE32_0,
1812 afex_stats->tx_frames_dropped_lo,
1813 fcoe_q_xstorm_stats->error_drop_pkts);
1814 }
1815
1816 /* if port stats are requested, add them to the PMF
1817 * stats, as anyway they will be accumulated by the
1818 * MCP before sent to the switch
1819 */
1820 if ((bp->port.pmf) && (stats_type == VICSTATST_UIF_INDEX)) {
1821 ADD_64(afex_stats->rx_frames_dropped_hi,
1822 0,
1823 afex_stats->rx_frames_dropped_lo,
1824 estats->mac_filter_discard);
1825 ADD_64(afex_stats->rx_frames_dropped_hi,
1826 0,
1827 afex_stats->rx_frames_dropped_lo,
1828 estats->brb_truncate_discard);
1829 ADD_64(afex_stats->rx_frames_discarded_hi,
1830 0,
1831 afex_stats->rx_frames_discarded_lo,
1832 estats->mac_discard);
1833 }
1834}
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.h
index 2b46e1eb7fd1..93e689fdfeda 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.h
@@ -338,6 +338,18 @@ struct bnx2x_fw_port_stats_old {
338 s_hi += a_hi + ((s_lo < a_lo) ? 1 : 0); \ 338 s_hi += a_hi + ((s_lo < a_lo) ? 1 : 0); \
339 } while (0) 339 } while (0)
340 340
341#define LE32_0 ((__force __le32) 0)
342#define LE16_0 ((__force __le16) 0)
343
344/* The _force is for cases where high value is 0 */
345#define ADD_64_LE(s_hi, a_hi_le, s_lo, a_lo_le) \
346 ADD_64(s_hi, le32_to_cpu(a_hi_le), \
347 s_lo, le32_to_cpu(a_lo_le))
348
349#define ADD_64_LE16(s_hi, a_hi_le, s_lo, a_lo_le) \
350 ADD_64(s_hi, le16_to_cpu(a_hi_le), \
351 s_lo, le16_to_cpu(a_lo_le))
352
341/* difference = minuend - subtrahend */ 353/* difference = minuend - subtrahend */
342#define DIFF_64(d_hi, m_hi, s_hi, d_lo, m_lo, s_lo) \ 354#define DIFF_64(d_hi, m_hi, s_hi, d_lo, m_lo, s_lo) \
343 do { \ 355 do { \
@@ -529,4 +541,7 @@ void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event);
529 * @bp: driver handle 541 * @bp: driver handle
530 */ 542 */
531void bnx2x_save_statistics(struct bnx2x *bp); 543void bnx2x_save_statistics(struct bnx2x *bp);
544
545void bnx2x_afex_collect_stats(struct bnx2x *bp, void *void_afex_stats,
546 u32 stats_type);
532#endif /* BNX2X_STATS_H */ 547#endif /* BNX2X_STATS_H */
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-04 23:37:40 -0500