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authorBill Pemberton <wfp5p@virginia.edu>2012-12-03 09:22:59 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2012-12-03 14:16:41 -0500
commit229b1ad1cb1a7159658f466c736bc3898dabb876 (patch)
treebbd6220edb582aaf37d0c0df990bf3115f4ac299 /drivers/net/ethernet/broadcom/tg3.c
parentcfd95a634f49358ab8d2a759c637fef0b50e7583 (diff)
tg3: remove __dev* attributes
CONFIG_HOTPLUG is going away as an option. As result the __dev* markings will be going away. Remove use of __devinit, __devexit_p, __devinitdata, __devinitconst, and __devexit. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Cc: Matt Carlson <mcarlson@broadcom.com> Cc: Michael Chan <mchan@broadcom.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/net/ethernet/broadcom/tg3.c')
-rw-r--r--drivers/net/ethernet/broadcom/tg3.c95
1 files changed, 48 insertions, 47 deletions
diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c
index 5cc976d01189..ac94939c03e6 100644
--- a/drivers/net/ethernet/broadcom/tg3.c
+++ b/drivers/net/ethernet/broadcom/tg3.c
@@ -211,7 +211,7 @@ static inline void _tg3_flag_clear(enum TG3_FLAGS flag, unsigned long *bits)
211#define FIRMWARE_TG3TSO "tigon/tg3_tso.bin" 211#define FIRMWARE_TG3TSO "tigon/tg3_tso.bin"
212#define FIRMWARE_TG3TSO5 "tigon/tg3_tso5.bin" 212#define FIRMWARE_TG3TSO5 "tigon/tg3_tso5.bin"
213 213
214static char version[] __devinitdata = 214static char version[] =
215 DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")"; 215 DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")";
216 216
217MODULE_AUTHOR("David S. Miller (davem@redhat.com) and Jeff Garzik (jgarzik@pobox.com)"); 217MODULE_AUTHOR("David S. Miller (davem@redhat.com) and Jeff Garzik (jgarzik@pobox.com)");
@@ -9938,7 +9938,7 @@ restart_timer:
9938 add_timer(&tp->timer); 9938 add_timer(&tp->timer);
9939} 9939}
9940 9940
9941static void __devinit tg3_timer_init(struct tg3 *tp) 9941static void tg3_timer_init(struct tg3 *tp)
9942{ 9942{
9943 if (tg3_flag(tp, TAGGED_STATUS) && 9943 if (tg3_flag(tp, TAGGED_STATUS) &&
9944 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 && 9944 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 &&
@@ -12829,7 +12829,7 @@ static const struct net_device_ops tg3_netdev_ops = {
12829#endif 12829#endif
12830}; 12830};
12831 12831
12832static void __devinit tg3_get_eeprom_size(struct tg3 *tp) 12832static void tg3_get_eeprom_size(struct tg3 *tp)
12833{ 12833{
12834 u32 cursize, val, magic; 12834 u32 cursize, val, magic;
12835 12835
@@ -12863,7 +12863,7 @@ static void __devinit tg3_get_eeprom_size(struct tg3 *tp)
12863 tp->nvram_size = cursize; 12863 tp->nvram_size = cursize;
12864} 12864}
12865 12865
12866static void __devinit tg3_get_nvram_size(struct tg3 *tp) 12866static void tg3_get_nvram_size(struct tg3 *tp)
12867{ 12867{
12868 u32 val; 12868 u32 val;
12869 12869
@@ -12896,7 +12896,7 @@ static void __devinit tg3_get_nvram_size(struct tg3 *tp)
12896 tp->nvram_size = TG3_NVRAM_SIZE_512KB; 12896 tp->nvram_size = TG3_NVRAM_SIZE_512KB;
12897} 12897}
12898 12898
12899static void __devinit tg3_get_nvram_info(struct tg3 *tp) 12899static void tg3_get_nvram_info(struct tg3 *tp)
12900{ 12900{
12901 u32 nvcfg1; 12901 u32 nvcfg1;
12902 12902
@@ -12947,7 +12947,7 @@ static void __devinit tg3_get_nvram_info(struct tg3 *tp)
12947 } 12947 }
12948} 12948}
12949 12949
12950static void __devinit tg3_nvram_get_pagesize(struct tg3 *tp, u32 nvmcfg1) 12950static void tg3_nvram_get_pagesize(struct tg3 *tp, u32 nvmcfg1)
12951{ 12951{
12952 switch (nvmcfg1 & NVRAM_CFG1_5752PAGE_SIZE_MASK) { 12952 switch (nvmcfg1 & NVRAM_CFG1_5752PAGE_SIZE_MASK) {
12953 case FLASH_5752PAGE_SIZE_256: 12953 case FLASH_5752PAGE_SIZE_256:
@@ -12974,7 +12974,7 @@ static void __devinit tg3_nvram_get_pagesize(struct tg3 *tp, u32 nvmcfg1)
12974 } 12974 }
12975} 12975}
12976 12976
12977static void __devinit tg3_get_5752_nvram_info(struct tg3 *tp) 12977static void tg3_get_5752_nvram_info(struct tg3 *tp)
12978{ 12978{
12979 u32 nvcfg1; 12979 u32 nvcfg1;
12980 12980
@@ -13015,7 +13015,7 @@ static void __devinit tg3_get_5752_nvram_info(struct tg3 *tp)
13015 } 13015 }
13016} 13016}
13017 13017
13018static void __devinit tg3_get_5755_nvram_info(struct tg3 *tp) 13018static void tg3_get_5755_nvram_info(struct tg3 *tp)
13019{ 13019{
13020 u32 nvcfg1, protect = 0; 13020 u32 nvcfg1, protect = 0;
13021 13021
@@ -13071,7 +13071,7 @@ static void __devinit tg3_get_5755_nvram_info(struct tg3 *tp)
13071 } 13071 }
13072} 13072}
13073 13073
13074static void __devinit tg3_get_5787_nvram_info(struct tg3 *tp) 13074static void tg3_get_5787_nvram_info(struct tg3 *tp)
13075{ 13075{
13076 u32 nvcfg1; 13076 u32 nvcfg1;
13077 13077
@@ -13109,7 +13109,7 @@ static void __devinit tg3_get_5787_nvram_info(struct tg3 *tp)
13109 } 13109 }
13110} 13110}
13111 13111
13112static void __devinit tg3_get_5761_nvram_info(struct tg3 *tp) 13112static void tg3_get_5761_nvram_info(struct tg3 *tp)
13113{ 13113{
13114 u32 nvcfg1, protect = 0; 13114 u32 nvcfg1, protect = 0;
13115 13115
@@ -13184,14 +13184,14 @@ static void __devinit tg3_get_5761_nvram_info(struct tg3 *tp)
13184 } 13184 }
13185} 13185}
13186 13186
13187static void __devinit tg3_get_5906_nvram_info(struct tg3 *tp) 13187static void tg3_get_5906_nvram_info(struct tg3 *tp)
13188{ 13188{
13189 tp->nvram_jedecnum = JEDEC_ATMEL; 13189 tp->nvram_jedecnum = JEDEC_ATMEL;
13190 tg3_flag_set(tp, NVRAM_BUFFERED); 13190 tg3_flag_set(tp, NVRAM_BUFFERED);
13191 tp->nvram_pagesize = ATMEL_AT24C512_CHIP_SIZE; 13191 tp->nvram_pagesize = ATMEL_AT24C512_CHIP_SIZE;
13192} 13192}
13193 13193
13194static void __devinit tg3_get_57780_nvram_info(struct tg3 *tp) 13194static void tg3_get_57780_nvram_info(struct tg3 *tp)
13195{ 13195{
13196 u32 nvcfg1; 13196 u32 nvcfg1;
13197 13197
@@ -13264,7 +13264,7 @@ static void __devinit tg3_get_57780_nvram_info(struct tg3 *tp)
13264} 13264}
13265 13265
13266 13266
13267static void __devinit tg3_get_5717_nvram_info(struct tg3 *tp) 13267static void tg3_get_5717_nvram_info(struct tg3 *tp)
13268{ 13268{
13269 u32 nvcfg1; 13269 u32 nvcfg1;
13270 13270
@@ -13342,7 +13342,7 @@ static void __devinit tg3_get_5717_nvram_info(struct tg3 *tp)
13342 tg3_flag_set(tp, NO_NVRAM_ADDR_TRANS); 13342 tg3_flag_set(tp, NO_NVRAM_ADDR_TRANS);
13343} 13343}
13344 13344
13345static void __devinit tg3_get_5720_nvram_info(struct tg3 *tp) 13345static void tg3_get_5720_nvram_info(struct tg3 *tp)
13346{ 13346{
13347 u32 nvcfg1, nvmpinstrp; 13347 u32 nvcfg1, nvmpinstrp;
13348 13348
@@ -13455,7 +13455,7 @@ static void __devinit tg3_get_5720_nvram_info(struct tg3 *tp)
13455} 13455}
13456 13456
13457/* Chips other than 5700/5701 use the NVRAM for fetching info. */ 13457/* Chips other than 5700/5701 use the NVRAM for fetching info. */
13458static void __devinit tg3_nvram_init(struct tg3 *tp) 13458static void tg3_nvram_init(struct tg3 *tp)
13459{ 13459{
13460 tw32_f(GRC_EEPROM_ADDR, 13460 tw32_f(GRC_EEPROM_ADDR,
13461 (EEPROM_ADDR_FSM_RESET | 13461 (EEPROM_ADDR_FSM_RESET |
@@ -13525,7 +13525,7 @@ struct subsys_tbl_ent {
13525 u32 phy_id; 13525 u32 phy_id;
13526}; 13526};
13527 13527
13528static struct subsys_tbl_ent subsys_id_to_phy_id[] __devinitdata = { 13528static struct subsys_tbl_ent subsys_id_to_phy_id[] = {
13529 /* Broadcom boards. */ 13529 /* Broadcom boards. */
13530 { TG3PCI_SUBVENDOR_ID_BROADCOM, 13530 { TG3PCI_SUBVENDOR_ID_BROADCOM,
13531 TG3PCI_SUBDEVICE_ID_BROADCOM_95700A6, TG3_PHY_ID_BCM5401 }, 13531 TG3PCI_SUBDEVICE_ID_BROADCOM_95700A6, TG3_PHY_ID_BCM5401 },
@@ -13589,7 +13589,7 @@ static struct subsys_tbl_ent subsys_id_to_phy_id[] __devinitdata = {
13589 TG3PCI_SUBDEVICE_ID_IBM_5703SAX2, 0 } 13589 TG3PCI_SUBDEVICE_ID_IBM_5703SAX2, 0 }
13590}; 13590};
13591 13591
13592static struct subsys_tbl_ent * __devinit tg3_lookup_by_subsys(struct tg3 *tp) 13592static struct subsys_tbl_ent *tg3_lookup_by_subsys(struct tg3 *tp)
13593{ 13593{
13594 int i; 13594 int i;
13595 13595
@@ -13603,7 +13603,7 @@ static struct subsys_tbl_ent * __devinit tg3_lookup_by_subsys(struct tg3 *tp)
13603 return NULL; 13603 return NULL;
13604} 13604}
13605 13605
13606static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp) 13606static void tg3_get_eeprom_hw_cfg(struct tg3 *tp)
13607{ 13607{
13608 u32 val; 13608 u32 val;
13609 13609
@@ -13803,7 +13803,7 @@ done:
13803 device_set_wakeup_capable(&tp->pdev->dev, false); 13803 device_set_wakeup_capable(&tp->pdev->dev, false);
13804} 13804}
13805 13805
13806static int __devinit tg3_issue_otp_command(struct tg3 *tp, u32 cmd) 13806static int tg3_issue_otp_command(struct tg3 *tp, u32 cmd)
13807{ 13807{
13808 int i; 13808 int i;
13809 u32 val; 13809 u32 val;
@@ -13826,7 +13826,7 @@ static int __devinit tg3_issue_otp_command(struct tg3 *tp, u32 cmd)
13826 * configuration is a 32-bit value that straddles the alignment boundary. 13826 * configuration is a 32-bit value that straddles the alignment boundary.
13827 * We do two 32-bit reads and then shift and merge the results. 13827 * We do two 32-bit reads and then shift and merge the results.
13828 */ 13828 */
13829static u32 __devinit tg3_read_otp_phycfg(struct tg3 *tp) 13829static u32 tg3_read_otp_phycfg(struct tg3 *tp)
13830{ 13830{
13831 u32 bhalf_otp, thalf_otp; 13831 u32 bhalf_otp, thalf_otp;
13832 13832
@@ -13852,7 +13852,7 @@ static u32 __devinit tg3_read_otp_phycfg(struct tg3 *tp)
13852 return ((thalf_otp & 0x0000ffff) << 16) | (bhalf_otp >> 16); 13852 return ((thalf_otp & 0x0000ffff) << 16) | (bhalf_otp >> 16);
13853} 13853}
13854 13854
13855static void __devinit tg3_phy_init_link_config(struct tg3 *tp) 13855static void tg3_phy_init_link_config(struct tg3 *tp)
13856{ 13856{
13857 u32 adv = ADVERTISED_Autoneg; 13857 u32 adv = ADVERTISED_Autoneg;
13858 13858
@@ -13879,7 +13879,7 @@ static void __devinit tg3_phy_init_link_config(struct tg3 *tp)
13879 tp->old_link = -1; 13879 tp->old_link = -1;
13880} 13880}
13881 13881
13882static int __devinit tg3_phy_probe(struct tg3 *tp) 13882static int tg3_phy_probe(struct tg3 *tp)
13883{ 13883{
13884 u32 hw_phy_id_1, hw_phy_id_2; 13884 u32 hw_phy_id_1, hw_phy_id_2;
13885 u32 hw_phy_id, hw_phy_id_masked; 13885 u32 hw_phy_id, hw_phy_id_masked;
@@ -14007,7 +14007,7 @@ skip_phy_reset:
14007 return err; 14007 return err;
14008} 14008}
14009 14009
14010static void __devinit tg3_read_vpd(struct tg3 *tp) 14010static void tg3_read_vpd(struct tg3 *tp)
14011{ 14011{
14012 u8 *vpd_data; 14012 u8 *vpd_data;
14013 unsigned int block_end, rosize, len; 14013 unsigned int block_end, rosize, len;
@@ -14128,7 +14128,7 @@ nomatch:
14128 } 14128 }
14129} 14129}
14130 14130
14131static int __devinit tg3_fw_img_is_valid(struct tg3 *tp, u32 offset) 14131static int tg3_fw_img_is_valid(struct tg3 *tp, u32 offset)
14132{ 14132{
14133 u32 val; 14133 u32 val;
14134 14134
@@ -14141,7 +14141,7 @@ static int __devinit tg3_fw_img_is_valid(struct tg3 *tp, u32 offset)
14141 return 1; 14141 return 1;
14142} 14142}
14143 14143
14144static void __devinit tg3_read_bc_ver(struct tg3 *tp) 14144static void tg3_read_bc_ver(struct tg3 *tp)
14145{ 14145{
14146 u32 val, offset, start, ver_offset; 14146 u32 val, offset, start, ver_offset;
14147 int i, dst_off; 14147 int i, dst_off;
@@ -14193,7 +14193,7 @@ static void __devinit tg3_read_bc_ver(struct tg3 *tp)
14193 } 14193 }
14194} 14194}
14195 14195
14196static void __devinit tg3_read_hwsb_ver(struct tg3 *tp) 14196static void tg3_read_hwsb_ver(struct tg3 *tp)
14197{ 14197{
14198 u32 val, major, minor; 14198 u32 val, major, minor;
14199 14199
@@ -14209,7 +14209,7 @@ static void __devinit tg3_read_hwsb_ver(struct tg3 *tp)
14209 snprintf(&tp->fw_ver[0], 32, "sb v%d.%02d", major, minor); 14209 snprintf(&tp->fw_ver[0], 32, "sb v%d.%02d", major, minor);
14210} 14210}
14211 14211
14212static void __devinit tg3_read_sb_ver(struct tg3 *tp, u32 val) 14212static void tg3_read_sb_ver(struct tg3 *tp, u32 val)
14213{ 14213{
14214 u32 offset, major, minor, build; 14214 u32 offset, major, minor, build;
14215 14215
@@ -14264,7 +14264,7 @@ static void __devinit tg3_read_sb_ver(struct tg3 *tp, u32 val)
14264 } 14264 }
14265} 14265}
14266 14266
14267static void __devinit tg3_read_mgmtfw_ver(struct tg3 *tp) 14267static void tg3_read_mgmtfw_ver(struct tg3 *tp)
14268{ 14268{
14269 u32 val, offset, start; 14269 u32 val, offset, start;
14270 int i, vlen; 14270 int i, vlen;
@@ -14316,7 +14316,7 @@ static void __devinit tg3_read_mgmtfw_ver(struct tg3 *tp)
14316 } 14316 }
14317} 14317}
14318 14318
14319static void __devinit tg3_probe_ncsi(struct tg3 *tp) 14319static void tg3_probe_ncsi(struct tg3 *tp)
14320{ 14320{
14321 u32 apedata; 14321 u32 apedata;
14322 14322
@@ -14332,7 +14332,7 @@ static void __devinit tg3_probe_ncsi(struct tg3 *tp)
14332 tg3_flag_set(tp, APE_HAS_NCSI); 14332 tg3_flag_set(tp, APE_HAS_NCSI);
14333} 14333}
14334 14334
14335static void __devinit tg3_read_dash_ver(struct tg3 *tp) 14335static void tg3_read_dash_ver(struct tg3 *tp)
14336{ 14336{
14337 int vlen; 14337 int vlen;
14338 u32 apedata; 14338 u32 apedata;
@@ -14355,7 +14355,7 @@ static void __devinit tg3_read_dash_ver(struct tg3 *tp)
14355 (apedata & APE_FW_VERSION_BLDMSK)); 14355 (apedata & APE_FW_VERSION_BLDMSK));
14356} 14356}
14357 14357
14358static void __devinit tg3_read_fw_ver(struct tg3 *tp) 14358static void tg3_read_fw_ver(struct tg3 *tp)
14359{ 14359{
14360 u32 val; 14360 u32 val;
14361 bool vpd_vers = false; 14361 bool vpd_vers = false;
@@ -14408,7 +14408,7 @@ static DEFINE_PCI_DEVICE_TABLE(tg3_write_reorder_chipsets) = {
14408 { }, 14408 { },
14409}; 14409};
14410 14410
14411static struct pci_dev * __devinit tg3_find_peer(struct tg3 *tp) 14411static struct pci_dev *tg3_find_peer(struct tg3 *tp)
14412{ 14412{
14413 struct pci_dev *peer; 14413 struct pci_dev *peer;
14414 unsigned int func, devnr = tp->pdev->devfn & ~7; 14414 unsigned int func, devnr = tp->pdev->devfn & ~7;
@@ -14436,7 +14436,7 @@ static struct pci_dev * __devinit tg3_find_peer(struct tg3 *tp)
14436 return peer; 14436 return peer;
14437} 14437}
14438 14438
14439static void __devinit tg3_detect_asic_rev(struct tg3 *tp, u32 misc_ctrl_reg) 14439static void tg3_detect_asic_rev(struct tg3 *tp, u32 misc_ctrl_reg)
14440{ 14440{
14441 tp->pci_chip_rev_id = misc_ctrl_reg >> MISC_HOST_CTRL_CHIPREV_SHIFT; 14441 tp->pci_chip_rev_id = misc_ctrl_reg >> MISC_HOST_CTRL_CHIPREV_SHIFT;
14442 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_USE_PROD_ID_REG) { 14442 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_USE_PROD_ID_REG) {
@@ -14539,7 +14539,7 @@ static bool tg3_10_100_only_device(struct tg3 *tp,
14539 return false; 14539 return false;
14540} 14540}
14541 14541
14542static int __devinit tg3_get_invariants(struct tg3 *tp, 14542static int tg3_get_invariants(struct tg3 *tp,
14543 const struct pci_device_id *ent) 14543 const struct pci_device_id *ent)
14544{ 14544{
14545 u32 misc_ctrl_reg; 14545 u32 misc_ctrl_reg;
@@ -15299,7 +15299,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp,
15299} 15299}
15300 15300
15301#ifdef CONFIG_SPARC 15301#ifdef CONFIG_SPARC
15302static int __devinit tg3_get_macaddr_sparc(struct tg3 *tp) 15302static int tg3_get_macaddr_sparc(struct tg3 *tp)
15303{ 15303{
15304 struct net_device *dev = tp->dev; 15304 struct net_device *dev = tp->dev;
15305 struct pci_dev *pdev = tp->pdev; 15305 struct pci_dev *pdev = tp->pdev;
@@ -15316,7 +15316,7 @@ static int __devinit tg3_get_macaddr_sparc(struct tg3 *tp)
15316 return -ENODEV; 15316 return -ENODEV;
15317} 15317}
15318 15318
15319static int __devinit tg3_get_default_macaddr_sparc(struct tg3 *tp) 15319static int tg3_get_default_macaddr_sparc(struct tg3 *tp)
15320{ 15320{
15321 struct net_device *dev = tp->dev; 15321 struct net_device *dev = tp->dev;
15322 15322
@@ -15326,7 +15326,7 @@ static int __devinit tg3_get_default_macaddr_sparc(struct tg3 *tp)
15326} 15326}
15327#endif 15327#endif
15328 15328
15329static int __devinit tg3_get_device_address(struct tg3 *tp) 15329static int tg3_get_device_address(struct tg3 *tp)
15330{ 15330{
15331 struct net_device *dev = tp->dev; 15331 struct net_device *dev = tp->dev;
15332 u32 hi, lo, mac_offset; 15332 u32 hi, lo, mac_offset;
@@ -15405,7 +15405,7 @@ static int __devinit tg3_get_device_address(struct tg3 *tp)
15405#define BOUNDARY_SINGLE_CACHELINE 1 15405#define BOUNDARY_SINGLE_CACHELINE 1
15406#define BOUNDARY_MULTI_CACHELINE 2 15406#define BOUNDARY_MULTI_CACHELINE 2
15407 15407
15408static u32 __devinit tg3_calc_dma_bndry(struct tg3 *tp, u32 val) 15408static u32 tg3_calc_dma_bndry(struct tg3 *tp, u32 val)
15409{ 15409{
15410 int cacheline_size; 15410 int cacheline_size;
15411 u8 byte; 15411 u8 byte;
@@ -15546,7 +15546,8 @@ out:
15546 return val; 15546 return val;
15547} 15547}
15548 15548
15549static int __devinit tg3_do_test_dma(struct tg3 *tp, u32 *buf, dma_addr_t buf_dma, int size, int to_device) 15549static int tg3_do_test_dma(struct tg3 *tp, u32 *buf, dma_addr_t buf_dma,
15550 int size, int to_device)
15550{ 15551{
15551 struct tg3_internal_buffer_desc test_desc; 15552 struct tg3_internal_buffer_desc test_desc;
15552 u32 sram_dma_descs; 15553 u32 sram_dma_descs;
@@ -15633,7 +15634,7 @@ static DEFINE_PCI_DEVICE_TABLE(tg3_dma_wait_state_chipsets) = {
15633 { }, 15634 { },
15634}; 15635};
15635 15636
15636static int __devinit tg3_test_dma(struct tg3 *tp) 15637static int tg3_test_dma(struct tg3 *tp)
15637{ 15638{
15638 dma_addr_t buf_dma; 15639 dma_addr_t buf_dma;
15639 u32 *buf, saved_dma_rwctrl; 15640 u32 *buf, saved_dma_rwctrl;
@@ -15823,7 +15824,7 @@ out_nofree:
15823 return ret; 15824 return ret;
15824} 15825}
15825 15826
15826static void __devinit tg3_init_bufmgr_config(struct tg3 *tp) 15827static void tg3_init_bufmgr_config(struct tg3 *tp)
15827{ 15828{
15828 if (tg3_flag(tp, 57765_PLUS)) { 15829 if (tg3_flag(tp, 57765_PLUS)) {
15829 tp->bufmgr_config.mbuf_read_dma_low_water = 15830 tp->bufmgr_config.mbuf_read_dma_low_water =
@@ -15879,7 +15880,7 @@ static void __devinit tg3_init_bufmgr_config(struct tg3 *tp)
15879 tp->bufmgr_config.dma_high_water = DEFAULT_DMA_HIGH_WATER; 15880 tp->bufmgr_config.dma_high_water = DEFAULT_DMA_HIGH_WATER;
15880} 15881}
15881 15882
15882static char * __devinit tg3_phy_string(struct tg3 *tp) 15883static char *tg3_phy_string(struct tg3 *tp)
15883{ 15884{
15884 switch (tp->phy_id & TG3_PHY_ID_MASK) { 15885 switch (tp->phy_id & TG3_PHY_ID_MASK) {
15885 case TG3_PHY_ID_BCM5400: return "5400"; 15886 case TG3_PHY_ID_BCM5400: return "5400";
@@ -15910,7 +15911,7 @@ static char * __devinit tg3_phy_string(struct tg3 *tp)
15910 } 15911 }
15911} 15912}
15912 15913
15913static char * __devinit tg3_bus_string(struct tg3 *tp, char *str) 15914static char *tg3_bus_string(struct tg3 *tp, char *str)
15914{ 15915{
15915 if (tg3_flag(tp, PCI_EXPRESS)) { 15916 if (tg3_flag(tp, PCI_EXPRESS)) {
15916 strcpy(str, "PCI Express"); 15917 strcpy(str, "PCI Express");
@@ -15946,7 +15947,7 @@ static char * __devinit tg3_bus_string(struct tg3 *tp, char *str)
15946 return str; 15947 return str;
15947} 15948}
15948 15949
15949static void __devinit tg3_init_coal(struct tg3 *tp) 15950static void tg3_init_coal(struct tg3 *tp)
15950{ 15951{
15951 struct ethtool_coalesce *ec = &tp->coal; 15952 struct ethtool_coalesce *ec = &tp->coal;
15952 15953
@@ -15977,7 +15978,7 @@ static void __devinit tg3_init_coal(struct tg3 *tp)
15977 } 15978 }
15978} 15979}
15979 15980
15980static int __devinit tg3_init_one(struct pci_dev *pdev, 15981static int tg3_init_one(struct pci_dev *pdev,
15981 const struct pci_device_id *ent) 15982 const struct pci_device_id *ent)
15982{ 15983{
15983 struct net_device *dev; 15984 struct net_device *dev;
@@ -16357,7 +16358,7 @@ err_out_disable_pdev:
16357 return err; 16358 return err;
16358} 16359}
16359 16360
16360static void __devexit tg3_remove_one(struct pci_dev *pdev) 16361static void tg3_remove_one(struct pci_dev *pdev)
16361{ 16362{
16362 struct net_device *dev = pci_get_drvdata(pdev); 16363 struct net_device *dev = pci_get_drvdata(pdev);
16363 16364
@@ -16626,7 +16627,7 @@ static struct pci_driver tg3_driver = {
16626 .name = DRV_MODULE_NAME, 16627 .name = DRV_MODULE_NAME,
16627 .id_table = tg3_pci_tbl, 16628 .id_table = tg3_pci_tbl,
16628 .probe = tg3_init_one, 16629 .probe = tg3_init_one,
16629 .remove = __devexit_p(tg3_remove_one), 16630 .remove = tg3_remove_one,
16630 .err_handler = &tg3_err_handler, 16631 .err_handler = &tg3_err_handler,
16631 .driver.pm = TG3_PM_OPS, 16632 .driver.pm = TG3_PM_OPS,
16632}; 16633};
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-25 18:50:05 -0500