diff options
author | Brian Norris <computersforpeace@gmail.com> | 2016-01-29 14:25:37 -0500 |
---|---|---|
committer | Brian Norris <computersforpeace@gmail.com> | 2016-03-07 21:01:58 -0500 |
commit | 9648388fc7737365be7a8092e77df78ccc2cd1a4 (patch) | |
tree | b47ae9fab8204eb80691ab31d601cac3d50eeafd /drivers/mtd | |
parent | 3dd8012a8eeb3702fa17450ec1a16a3f38af138d (diff) |
mtd: spi-nor: support lock/unlock for a few Winbond chips
These are recent Winbond models that are known to have lock/unlock
support via writing the Status Register, and that also support the TB
(Top/Bottom) protection bit.
Tested on w25q32dw.
[Note on style: these entries are getting pretty long lines, so I picked
a style that seems reasonable for splitting up the flags separate from
the other mostly-similar fields.]
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Tested-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Diffstat (limited to 'drivers/mtd')
-rw-r--r-- | drivers/mtd/spi-nor/spi-nor.c | 18 |
1 files changed, 15 insertions, 3 deletions
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 2aebf18f7c36..157841dc3e99 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c | |||
@@ -963,11 +963,23 @@ static const struct flash_info spi_nor_ids[] = { | |||
963 | { "w25x16", INFO(0xef3015, 0, 64 * 1024, 32, SECT_4K) }, | 963 | { "w25x16", INFO(0xef3015, 0, 64 * 1024, 32, SECT_4K) }, |
964 | { "w25x32", INFO(0xef3016, 0, 64 * 1024, 64, SECT_4K) }, | 964 | { "w25x32", INFO(0xef3016, 0, 64 * 1024, 64, SECT_4K) }, |
965 | { "w25q32", INFO(0xef4016, 0, 64 * 1024, 64, SECT_4K) }, | 965 | { "w25q32", INFO(0xef4016, 0, 64 * 1024, 64, SECT_4K) }, |
966 | { "w25q32dw", INFO(0xef6016, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, | 966 | { |
967 | "w25q32dw", INFO(0xef6016, 0, 64 * 1024, 64, | ||
968 | SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | | ||
969 | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) | ||
970 | }, | ||
967 | { "w25x64", INFO(0xef3017, 0, 64 * 1024, 128, SECT_4K) }, | 971 | { "w25x64", INFO(0xef3017, 0, 64 * 1024, 128, SECT_4K) }, |
968 | { "w25q64", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) }, | 972 | { "w25q64", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) }, |
969 | { "w25q64dw", INFO(0xef6017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, | 973 | { |
970 | { "w25q128fw", INFO(0xef6018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, | 974 | "w25q64dw", INFO(0xef6017, 0, 64 * 1024, 128, |
975 | SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | | ||
976 | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) | ||
977 | }, | ||
978 | { | ||
979 | "w25q128fw", INFO(0xef6018, 0, 64 * 1024, 256, | ||
980 | SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | | ||
981 | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) | ||
982 | }, | ||
971 | { "w25q80", INFO(0xef5014, 0, 64 * 1024, 16, SECT_4K) }, | 983 | { "w25q80", INFO(0xef5014, 0, 64 * 1024, 16, SECT_4K) }, |
972 | { "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16, SECT_4K) }, | 984 | { "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16, SECT_4K) }, |
973 | { "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) }, | 985 | { "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) }, |