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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2015-02-10 13:59:56 -0500
committerBrian Norris <computersforpeace@gmail.com>2015-03-11 18:20:19 -0400
commit1f42adc8880d0692c3cb7b6adb247f17c4983081 (patch)
tree07f8c0dcd92dec8fb60963890e55a354e46b0dfb /drivers/mtd/nand
parente35d1d8a1d16e9f56a9b54c96d0cb85ed621bb89 (diff)
mtd: mxc-nand: Only enable hardware checksumming for fully detected flashes
At least on i.MX25 (i.e. NFCv2) preset_v2 is called with mtd->writesize == 0 that is before the connect flash chip is detected. It then configures for 8 bit ECC mode which needs 26 bytes of OOB per 512 bytes main section. For flashes with a smaller OOB area issuing a read page command makes the controller stuck with this config. Note that this currently doesn't hurt because the first read page command is issued only after detection is complete and preset is called once more. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Diffstat (limited to 'drivers/mtd/nand')
-rw-r--r--drivers/mtd/nand/mxc_nand.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 27ba07c07966..d9637ae34719 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -928,7 +928,7 @@ static void preset_v1(struct mtd_info *mtd)
928 struct mxc_nand_host *host = nand_chip->priv; 928 struct mxc_nand_host *host = nand_chip->priv;
929 uint16_t config1 = 0; 929 uint16_t config1 = 0;
930 930
931 if (nand_chip->ecc.mode == NAND_ECC_HW) 931 if (nand_chip->ecc.mode == NAND_ECC_HW && mtd->writesize)
932 config1 |= NFC_V1_V2_CONFIG1_ECC_EN; 932 config1 |= NFC_V1_V2_CONFIG1_ECC_EN;
933 933
934 if (!host->devtype_data->irqpending_quirk) 934 if (!host->devtype_data->irqpending_quirk)
@@ -956,9 +956,6 @@ static void preset_v2(struct mtd_info *mtd)
956 struct mxc_nand_host *host = nand_chip->priv; 956 struct mxc_nand_host *host = nand_chip->priv;
957 uint16_t config1 = 0; 957 uint16_t config1 = 0;
958 958
959 if (nand_chip->ecc.mode == NAND_ECC_HW)
960 config1 |= NFC_V1_V2_CONFIG1_ECC_EN;
961
962 config1 |= NFC_V2_CONFIG1_FP_INT; 959 config1 |= NFC_V2_CONFIG1_FP_INT;
963 960
964 if (!host->devtype_data->irqpending_quirk) 961 if (!host->devtype_data->irqpending_quirk)
@@ -967,6 +964,9 @@ static void preset_v2(struct mtd_info *mtd)
967 if (mtd->writesize) { 964 if (mtd->writesize) {
968 uint16_t pages_per_block = mtd->erasesize / mtd->writesize; 965 uint16_t pages_per_block = mtd->erasesize / mtd->writesize;
969 966
967 if (nand_chip->ecc.mode == NAND_ECC_HW)
968 config1 |= NFC_V1_V2_CONFIG1_ECC_EN;
969
970 host->eccsize = get_eccsize(mtd); 970 host->eccsize = get_eccsize(mtd);
971 if (host->eccsize == 4) 971 if (host->eccsize == 4)
972 config1 |= NFC_V2_CONFIG1_ECC_MODE_4; 972 config1 |= NFC_V2_CONFIG1_ECC_MODE_4;
@@ -1024,9 +1024,6 @@ static void preset_v3(struct mtd_info *mtd)
1024 NFC_V3_CONFIG2_INT_MSK | 1024 NFC_V3_CONFIG2_INT_MSK |
1025 NFC_V3_CONFIG2_NUM_ADDR_PHASE0; 1025 NFC_V3_CONFIG2_NUM_ADDR_PHASE0;
1026 1026
1027 if (chip->ecc.mode == NAND_ECC_HW)
1028 config2 |= NFC_V3_CONFIG2_ECC_EN;
1029
1030 addr_phases = fls(chip->pagemask) >> 3; 1027 addr_phases = fls(chip->pagemask) >> 3;
1031 1028
1032 if (mtd->writesize == 2048) { 1029 if (mtd->writesize == 2048) {
@@ -1041,6 +1038,9 @@ static void preset_v3(struct mtd_info *mtd)
1041 } 1038 }
1042 1039
1043 if (mtd->writesize) { 1040 if (mtd->writesize) {
1041 if (chip->ecc.mode == NAND_ECC_HW)
1042 config2 |= NFC_V3_CONFIG2_ECC_EN;
1043
1044 config2 |= NFC_V3_CONFIG2_PPB( 1044 config2 |= NFC_V3_CONFIG2_PPB(
1045 ffs(mtd->erasesize / mtd->writesize) - 6, 1045 ffs(mtd->erasesize / mtd->writesize) - 6,
1046 host->devtype_data->ppb_shift); 1046 host->devtype_data->ppb_shift);