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authorLucas Stach <dev@lynxeye.de>2015-12-22 13:41:03 -0500
committerUlf Hansson <ulf.hansson@linaro.org>2016-01-05 12:04:02 -0500
commit7ad2ed1dfcbed6f50923fc0afc24aac475bdc0b5 (patch)
tree6ab6e94df1c3d414f3f94d4807a46911a4c3b195 /drivers/mmc
parentc3c2384c3ac073cdc2d8e3bbc89b55cdcf507b8f (diff)
mmc: tegra: enable UHS-I modes
Keep the quirk bits, as Tegra30 and Tegra114 host have different levels of support for UHS-I modes and so need different spare bits to be set, but change the logic to be positive. Tegra210 needs a different tuning sequence than Tegra30+. Disable UHS modes until support for this is properly added. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/host/sdhci-tegra.c37
1 files changed, 17 insertions, 20 deletions
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index 020154943732..ff2eefe9f237 100644
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -45,9 +45,9 @@
45#define NVQUIRK_FORCE_SDHCI_SPEC_200 BIT(0) 45#define NVQUIRK_FORCE_SDHCI_SPEC_200 BIT(0)
46#define NVQUIRK_ENABLE_BLOCK_GAP_DET BIT(1) 46#define NVQUIRK_ENABLE_BLOCK_GAP_DET BIT(1)
47#define NVQUIRK_ENABLE_SDHCI_SPEC_300 BIT(2) 47#define NVQUIRK_ENABLE_SDHCI_SPEC_300 BIT(2)
48#define NVQUIRK_DISABLE_SDR50 BIT(3) 48#define NVQUIRK_ENABLE_SDR50 BIT(3)
49#define NVQUIRK_DISABLE_SDR104 BIT(4) 49#define NVQUIRK_ENABLE_SDR104 BIT(4)
50#define NVQUIRK_DISABLE_DDR50 BIT(5) 50#define NVQUIRK_ENABLE_DDR50 BIT(5)
51 51
52struct sdhci_tegra_soc_data { 52struct sdhci_tegra_soc_data {
53 const struct sdhci_pltfm_data *pdata; 53 const struct sdhci_pltfm_data *pdata;
@@ -144,18 +144,18 @@ static void tegra_sdhci_reset(struct sdhci_host *host, u8 mask)
144 /* Erratum: Enable SDHCI spec v3.00 support */ 144 /* Erratum: Enable SDHCI spec v3.00 support */
145 if (soc_data->nvquirks & NVQUIRK_ENABLE_SDHCI_SPEC_300) 145 if (soc_data->nvquirks & NVQUIRK_ENABLE_SDHCI_SPEC_300)
146 misc_ctrl |= SDHCI_MISC_CTRL_ENABLE_SDHCI_SPEC_300; 146 misc_ctrl |= SDHCI_MISC_CTRL_ENABLE_SDHCI_SPEC_300;
147 /* Don't advertise UHS modes which aren't supported yet */ 147 /* Advertise UHS modes as supported by host */
148 if (soc_data->nvquirks & NVQUIRK_DISABLE_SDR50) 148 if (soc_data->nvquirks & NVQUIRK_ENABLE_SDR50)
149 misc_ctrl &= ~SDHCI_MISC_CTRL_ENABLE_SDR50; 149 misc_ctrl |= SDHCI_MISC_CTRL_ENABLE_SDR50;
150 if (soc_data->nvquirks & NVQUIRK_DISABLE_DDR50) 150 if (soc_data->nvquirks & NVQUIRK_ENABLE_DDR50)
151 misc_ctrl &= ~SDHCI_MISC_CTRL_ENABLE_DDR50; 151 misc_ctrl |= SDHCI_MISC_CTRL_ENABLE_DDR50;
152 if (soc_data->nvquirks & NVQUIRK_DISABLE_SDR104) 152 if (soc_data->nvquirks & NVQUIRK_ENABLE_SDR104)
153 misc_ctrl &= ~SDHCI_MISC_CTRL_ENABLE_SDR104; 153 misc_ctrl |= SDHCI_MISC_CTRL_ENABLE_SDR104;
154 sdhci_writew(host, misc_ctrl, SDHCI_TEGRA_VENDOR_MISC_CTRL); 154 sdhci_writew(host, misc_ctrl, SDHCI_TEGRA_VENDOR_MISC_CTRL);
155 155
156 clk_ctrl = sdhci_readl(host, SDHCI_TEGRA_VENDOR_CLOCK_CTRL); 156 clk_ctrl = sdhci_readl(host, SDHCI_TEGRA_VENDOR_CLOCK_CTRL);
157 clk_ctrl &= ~SDHCI_CLOCK_CTRL_SPI_MODE_CLKEN_OVERRIDE; 157 clk_ctrl &= ~SDHCI_CLOCK_CTRL_SPI_MODE_CLKEN_OVERRIDE;
158 if (!(soc_data->nvquirks & NVQUIRK_DISABLE_SDR50)) 158 if (soc_data->nvquirks & SDHCI_MISC_CTRL_ENABLE_SDR50)
159 clk_ctrl |= SDHCI_CLOCK_CTRL_SDR50_TUNING_OVERRIDE; 159 clk_ctrl |= SDHCI_CLOCK_CTRL_SDR50_TUNING_OVERRIDE;
160 sdhci_writel(host, clk_ctrl, SDHCI_TEGRA_VENDOR_CLOCK_CTRL); 160 sdhci_writel(host, clk_ctrl, SDHCI_TEGRA_VENDOR_CLOCK_CTRL);
161 161
@@ -305,8 +305,8 @@ static const struct sdhci_pltfm_data sdhci_tegra30_pdata = {
305static const struct sdhci_tegra_soc_data soc_data_tegra30 = { 305static const struct sdhci_tegra_soc_data soc_data_tegra30 = {
306 .pdata = &sdhci_tegra30_pdata, 306 .pdata = &sdhci_tegra30_pdata,
307 .nvquirks = NVQUIRK_ENABLE_SDHCI_SPEC_300 | 307 .nvquirks = NVQUIRK_ENABLE_SDHCI_SPEC_300 |
308 NVQUIRK_DISABLE_SDR50 | 308 NVQUIRK_ENABLE_SDR50 |
309 NVQUIRK_DISABLE_SDR104, 309 NVQUIRK_ENABLE_SDR104,
310}; 310};
311 311
312static const struct sdhci_ops tegra114_sdhci_ops = { 312static const struct sdhci_ops tegra114_sdhci_ops = {
@@ -335,9 +335,9 @@ static const struct sdhci_pltfm_data sdhci_tegra114_pdata = {
335 335
336static const struct sdhci_tegra_soc_data soc_data_tegra114 = { 336static const struct sdhci_tegra_soc_data soc_data_tegra114 = {
337 .pdata = &sdhci_tegra114_pdata, 337 .pdata = &sdhci_tegra114_pdata,
338 .nvquirks = NVQUIRK_DISABLE_SDR50 | 338 .nvquirks = NVQUIRK_ENABLE_SDR50 |
339 NVQUIRK_DISABLE_DDR50 | 339 NVQUIRK_ENABLE_DDR50 |
340 NVQUIRK_DISABLE_SDR104, 340 NVQUIRK_ENABLE_SDR104,
341}; 341};
342 342
343static const struct sdhci_pltfm_data sdhci_tegra210_pdata = { 343static const struct sdhci_pltfm_data sdhci_tegra210_pdata = {
@@ -353,9 +353,6 @@ static const struct sdhci_pltfm_data sdhci_tegra210_pdata = {
353 353
354static const struct sdhci_tegra_soc_data soc_data_tegra210 = { 354static const struct sdhci_tegra_soc_data soc_data_tegra210 = {
355 .pdata = &sdhci_tegra210_pdata, 355 .pdata = &sdhci_tegra210_pdata,
356 .nvquirks = NVQUIRK_DISABLE_SDR50 |
357 NVQUIRK_DISABLE_DDR50 |
358 NVQUIRK_DISABLE_SDR104,
359}; 356};
360 357
361static const struct of_device_id sdhci_tegra_dt_match[] = { 358static const struct of_device_id sdhci_tegra_dt_match[] = {
@@ -402,7 +399,7 @@ static int sdhci_tegra_probe(struct platform_device *pdev)
402 if (rc) 399 if (rc)
403 goto err_parse_dt; 400 goto err_parse_dt;
404 401
405 if (!(tegra_host->soc_data->nvquirks & NVQUIRK_DISABLE_DDR50)) 402 if (tegra_host->soc_data->nvquirks & NVQUIRK_ENABLE_DDR50)
406 host->mmc->caps |= MMC_CAP_1_8V_DDR; 403 host->mmc->caps |= MMC_CAP_1_8V_DDR;
407 404
408 tegra_host->power_gpio = devm_gpiod_get_optional(&pdev->dev, "power", 405 tegra_host->power_gpio = devm_gpiod_get_optional(&pdev->dev, "power",