diff options
author | Ian Munsie <imunsie@au1.ibm.com> | 2016-05-04 00:48:32 -0400 |
---|---|---|
committer | Michael Ellerman <mpe@ellerman.id.au> | 2016-05-11 07:54:09 -0400 |
commit | 0e5b5ba17ac33a05d9f4a48b5eb8b5e30f2274d7 (patch) | |
tree | a8cf9cbac64fa2750035d4c6d544e284f047fe0e /drivers/misc | |
parent | 895a79805c287df73142f1b424b22ea5190734c2 (diff) |
cxl: Remove duplicate #defines
These defines are not used, but other equivalent definitions
(CXL_SPA_SW_CMD_*) are used. Remove the unused defines.
Signed-off-by: Ian Munsie <imunsie@au1.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'drivers/misc')
-rw-r--r-- | drivers/misc/cxl/cxl.h | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h index dfdbfb025089..2823fb32fcf6 100644 --- a/drivers/misc/cxl/cxl.h +++ b/drivers/misc/cxl/cxl.h | |||
@@ -178,15 +178,6 @@ static const cxl_p2n_reg_t CXL_PSL_WED_An = {0x0A0}; | |||
178 | #define CXL_PSL_SR_An_MP (1ull << (63-62)) /* Master Process */ | 178 | #define CXL_PSL_SR_An_MP (1ull << (63-62)) /* Master Process */ |
179 | #define CXL_PSL_SR_An_LE (1ull << (63-63)) /* Little Endian */ | 179 | #define CXL_PSL_SR_An_LE (1ull << (63-63)) /* Little Endian */ |
180 | 180 | ||
181 | /****** CXL_PSL_LLCMD_An ****************************************************/ | ||
182 | #define CXL_LLCMD_TERMINATE 0x0001000000000000ULL | ||
183 | #define CXL_LLCMD_REMOVE 0x0002000000000000ULL | ||
184 | #define CXL_LLCMD_SUSPEND 0x0003000000000000ULL | ||
185 | #define CXL_LLCMD_RESUME 0x0004000000000000ULL | ||
186 | #define CXL_LLCMD_ADD 0x0005000000000000ULL | ||
187 | #define CXL_LLCMD_UPDATE 0x0006000000000000ULL | ||
188 | #define CXL_LLCMD_HANDLE_MASK 0x000000000000ffffULL | ||
189 | |||
190 | /****** CXL_PSL_ID_An ****************************************************/ | 181 | /****** CXL_PSL_ID_An ****************************************************/ |
191 | #define CXL_PSL_ID_An_F (1ull << (63-31)) | 182 | #define CXL_PSL_ID_An_F (1ull << (63-31)) |
192 | #define CXL_PSL_ID_An_L (1ull << (63-30)) | 183 | #define CXL_PSL_ID_An_L (1ull << (63-30)) |