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authorAndreas Werner <andreas.werner@men.de>2016-08-26 03:34:58 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2016-08-31 07:16:24 -0400
commitffc7bb3857e42acab131271e485735cbf673d0f0 (patch)
tree8747ff47afd68f8aa5ba40c93fa001d08521e9bb /drivers/mcb
parent73edc8f7cceffe537d6888dc20703123769eb3f6 (diff)
mcb: Added bar descriptor support for non PCI bus MCB carrier
Added support for the bar descriptor. This type is used for FPGAs connect to the LPC or to a non PCI bus. The Bar descriptor could have a maximum of 6 BARs. Each of the devices within the FPGA could be mapped to a different BAR. The BAR descriptor is comparable to the PCI header. Signed-off-by: Andreas Werner <andreas.werner@men.de> [ free bar descriptor in the non-error case ] Signed-off-by: Johannes Thumshirn <jthumshirn@suse.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/mcb')
-rw-r--r--drivers/mcb/mcb-internal.h9
-rw-r--r--drivers/mcb/mcb-parse.c126
2 files changed, 121 insertions, 14 deletions
diff --git a/drivers/mcb/mcb-internal.h b/drivers/mcb/mcb-internal.h
index 5254e0285725..d6e6933b19f1 100644
--- a/drivers/mcb/mcb-internal.h
+++ b/drivers/mcb/mcb-internal.h
@@ -112,6 +112,15 @@ struct chameleon_bdd {
112 u32 size; 112 u32 size;
113} __packed; 113} __packed;
114 114
115struct chameleon_bar {
116 u32 addr;
117 u32 size;
118};
119
120#define BAR_CNT(x) ((x) & 0x07)
121#define CHAMELEON_BAR_MAX 6
122#define BAR_DESC_SIZE(x) ((x) * sizeof(struct chameleon_bar) + sizeof(__le32))
123
115int chameleon_parse_cells(struct mcb_bus *bus, phys_addr_t mapbase, 124int chameleon_parse_cells(struct mcb_bus *bus, phys_addr_t mapbase,
116 void __iomem *base); 125 void __iomem *base);
117 126
diff --git a/drivers/mcb/mcb-parse.c b/drivers/mcb/mcb-parse.c
index dbecbed0d258..4ca2739b4fad 100644
--- a/drivers/mcb/mcb-parse.c
+++ b/drivers/mcb/mcb-parse.c
@@ -26,19 +26,20 @@ static inline uint32_t get_next_dtype(void __iomem *p)
26} 26}
27 27
28static int chameleon_parse_bdd(struct mcb_bus *bus, 28static int chameleon_parse_bdd(struct mcb_bus *bus,
29 phys_addr_t mapbase, 29 struct chameleon_bar *cb,
30 void __iomem *base) 30 void __iomem *base)
31{ 31{
32 return 0; 32 return 0;
33} 33}
34 34
35static int chameleon_parse_gdd(struct mcb_bus *bus, 35static int chameleon_parse_gdd(struct mcb_bus *bus,
36 phys_addr_t mapbase, 36 struct chameleon_bar *cb,
37 void __iomem *base) 37 void __iomem *base, int bar_count)
38{ 38{
39 struct chameleon_gdd __iomem *gdd = 39 struct chameleon_gdd __iomem *gdd =
40 (struct chameleon_gdd __iomem *) base; 40 (struct chameleon_gdd __iomem *) base;
41 struct mcb_device *mdev; 41 struct mcb_device *mdev;
42 u32 dev_mapbase;
42 u32 offset; 43 u32 offset;
43 u32 size; 44 u32 size;
44 int ret; 45 int ret;
@@ -61,13 +62,39 @@ static int chameleon_parse_gdd(struct mcb_bus *bus,
61 mdev->group = GDD_GRP(reg2); 62 mdev->group = GDD_GRP(reg2);
62 mdev->inst = GDD_INS(reg2); 63 mdev->inst = GDD_INS(reg2);
63 64
65 /*
66 * If the BAR is missing, dev_mapbase is zero, or if the
67 * device is IO mapped we just print a warning and go on with the
68 * next device, instead of completely stop the gdd parser
69 */
70 if (mdev->bar > bar_count - 1) {
71 pr_info("No BAR for 16z%03d\n", mdev->id);
72 ret = 0;
73 goto err;
74 }
75
76 dev_mapbase = cb[mdev->bar].addr;
77 if (!dev_mapbase) {
78 pr_info("BAR not assigned for 16z%03d\n", mdev->id);
79 ret = 0;
80 goto err;
81 }
82
83 if (dev_mapbase & 0x01) {
84 pr_info("IO mapped Device (16z%03d) not yet supported\n",
85 mdev->id);
86 ret = 0;
87 goto err;
88 }
89
64 pr_debug("Found a 16z%03d\n", mdev->id); 90 pr_debug("Found a 16z%03d\n", mdev->id);
65 91
66 mdev->irq.start = GDD_IRQ(reg1); 92 mdev->irq.start = GDD_IRQ(reg1);
67 mdev->irq.end = GDD_IRQ(reg1); 93 mdev->irq.end = GDD_IRQ(reg1);
68 mdev->irq.flags = IORESOURCE_IRQ; 94 mdev->irq.flags = IORESOURCE_IRQ;
69 95
70 mdev->mem.start = mapbase + offset; 96 mdev->mem.start = dev_mapbase + offset;
97
71 mdev->mem.end = mdev->mem.start + size - 1; 98 mdev->mem.end = mdev->mem.start + size - 1;
72 mdev->mem.flags = IORESOURCE_MEM; 99 mdev->mem.flags = IORESOURCE_MEM;
73 100
@@ -85,13 +112,76 @@ err:
85 return ret; 112 return ret;
86} 113}
87 114
115static void chameleon_parse_bar(void __iomem *base,
116 struct chameleon_bar *cb, int bar_count)
117{
118 char __iomem *p = base;
119 int i;
120
121 /* skip reg1 */
122 p += sizeof(__le32);
123
124 for (i = 0; i < bar_count; i++) {
125 cb[i].addr = readl(p);
126 cb[i].size = readl(p + 4);
127
128 p += sizeof(struct chameleon_bar);
129 }
130}
131
132static int chameleon_get_bar(char __iomem **base, phys_addr_t mapbase,
133 struct chameleon_bar **cb)
134{
135 struct chameleon_bar *c;
136 int bar_count;
137 __le32 reg;
138 u32 dtype;
139
140 /*
141 * For those devices which are not connected
142 * to the PCI Bus (e.g. LPC) there is a bar
143 * descriptor located directly after the
144 * chameleon header. This header is comparable
145 * to a PCI header.
146 */
147 dtype = get_next_dtype(*base);
148 if (dtype == CHAMELEON_DTYPE_BAR) {
149 reg = readl(*base);
150
151 bar_count = BAR_CNT(reg);
152 if (bar_count <= 0 && bar_count > CHAMELEON_BAR_MAX)
153 return -ENODEV;
154
155 c = kcalloc(bar_count, sizeof(struct chameleon_bar),
156 GFP_KERNEL);
157 if (!c)
158 return -ENOMEM;
159
160 chameleon_parse_bar(*base, c, bar_count);
161 *base += BAR_DESC_SIZE(bar_count);
162 } else {
163 c = kzalloc(sizeof(struct chameleon_bar), GFP_KERNEL);
164 if (!c)
165 return -ENOMEM;
166
167 bar_count = 1;
168 c->addr = mapbase;
169 }
170
171 *cb = c;
172
173 return bar_count;
174}
175
88int chameleon_parse_cells(struct mcb_bus *bus, phys_addr_t mapbase, 176int chameleon_parse_cells(struct mcb_bus *bus, phys_addr_t mapbase,
89 void __iomem *base) 177 void __iomem *base)
90{ 178{
91 char __iomem *p = base;
92 struct chameleon_fpga_header *header; 179 struct chameleon_fpga_header *header;
93 uint32_t dtype; 180 struct chameleon_bar *cb;
181 char __iomem *p = base;
94 int num_cells = 0; 182 int num_cells = 0;
183 uint32_t dtype;
184 int bar_count;
95 int ret = 0; 185 int ret = 0;
96 u32 hsize; 186 u32 hsize;
97 187
@@ -108,8 +198,8 @@ int chameleon_parse_cells(struct mcb_bus *bus, phys_addr_t mapbase,
108 if (header->magic != CHAMELEONV2_MAGIC) { 198 if (header->magic != CHAMELEONV2_MAGIC) {
109 pr_err("Unsupported chameleon version 0x%x\n", 199 pr_err("Unsupported chameleon version 0x%x\n",
110 header->magic); 200 header->magic);
111 kfree(header); 201 ret = -ENODEV;
112 return -ENODEV; 202 goto free_header;
113 } 203 }
114 p += hsize; 204 p += hsize;
115 205
@@ -119,16 +209,20 @@ int chameleon_parse_cells(struct mcb_bus *bus, phys_addr_t mapbase,
119 snprintf(bus->name, CHAMELEON_FILENAME_LEN + 1, "%s", 209 snprintf(bus->name, CHAMELEON_FILENAME_LEN + 1, "%s",
120 header->filename); 210 header->filename);
121 211
212 bar_count = chameleon_get_bar(&p, mapbase, &cb);
213 if (bar_count < 0)
214 goto free_header;
215
122 for_each_chameleon_cell(dtype, p) { 216 for_each_chameleon_cell(dtype, p) {
123 switch (dtype) { 217 switch (dtype) {
124 case CHAMELEON_DTYPE_GENERAL: 218 case CHAMELEON_DTYPE_GENERAL:
125 ret = chameleon_parse_gdd(bus, mapbase, p); 219