diff options
author | Geert Uytterhoeven <geert+renesas@glider.be> | 2015-11-24 09:49:40 -0500 |
---|---|---|
committer | Jason Cooper <jason@lakedaemon.net> | 2015-11-24 11:53:00 -0500 |
commit | f9551a9c083b8acc1db38e234a630655bae8e771 (patch) | |
tree | 0f87813dbc2de549499be4157164726762e6c57a /drivers/irqchip | |
parent | 8005c49d9aea74d382f474ce11afbbc7d7130bec (diff) |
irqchip/renesas-intc-irqpin: Remove obsolete platform data support
Since commit 4baadb9e05c68962 ("ARM: shmobile: r8a7778: remove obsolete
setup code"), all Renesas SoCs with a renesas-intc-irqpin module are
only supported in generic DT-only ARM multi-platform builds. The driver
doesn't need to use platform data anymore, hence remove platform data
configuration.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lkml.kernel.org/r/1448376581-9202-2-git-send-email-geert+renesas@glider.be
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'drivers/irqchip')
-rw-r--r-- | drivers/irqchip/irq-renesas-intc-irqpin.c | 38 |
1 files changed, 12 insertions, 26 deletions
diff --git a/drivers/irqchip/irq-renesas-intc-irqpin.c b/drivers/irqchip/irq-renesas-intc-irqpin.c index c325806561be..7aefa500d210 100644 --- a/drivers/irqchip/irq-renesas-intc-irqpin.c +++ b/drivers/irqchip/irq-renesas-intc-irqpin.c | |||
@@ -31,7 +31,6 @@ | |||
31 | #include <linux/slab.h> | 31 | #include <linux/slab.h> |
32 | #include <linux/module.h> | 32 | #include <linux/module.h> |
33 | #include <linux/of_device.h> | 33 | #include <linux/of_device.h> |
34 | #include <linux/platform_data/irq-renesas-intc-irqpin.h> | ||
35 | #include <linux/pm_runtime.h> | 34 | #include <linux/pm_runtime.h> |
36 | 35 | ||
37 | #define INTC_IRQPIN_MAX 8 /* maximum 8 interrupts per driver instance */ | 36 | #define INTC_IRQPIN_MAX 8 /* maximum 8 interrupts per driver instance */ |
@@ -75,7 +74,7 @@ struct intc_irqpin_irq { | |||
75 | struct intc_irqpin_priv { | 74 | struct intc_irqpin_priv { |
76 | struct intc_irqpin_iomem iomem[INTC_IRQPIN_REG_NR]; | 75 | struct intc_irqpin_iomem iomem[INTC_IRQPIN_REG_NR]; |
77 | struct intc_irqpin_irq irq[INTC_IRQPIN_MAX]; | 76 | struct intc_irqpin_irq irq[INTC_IRQPIN_MAX]; |
78 | struct renesas_intc_irqpin_config config; | 77 | unsigned int sense_bitfield_width; |
79 | unsigned int number_of_irqs; | 78 | unsigned int number_of_irqs; |
80 | struct platform_device *pdev; | 79 | struct platform_device *pdev; |
81 | struct irq_chip irq_chip; | 80 | struct irq_chip irq_chip; |
@@ -171,7 +170,7 @@ static void intc_irqpin_mask_unmask_prio(struct intc_irqpin_priv *p, | |||
171 | static int intc_irqpin_set_sense(struct intc_irqpin_priv *p, int irq, int value) | 170 | static int intc_irqpin_set_sense(struct intc_irqpin_priv *p, int irq, int value) |
172 | { | 171 | { |
173 | /* The SENSE register is assumed to be 32-bit. */ | 172 | /* The SENSE register is assumed to be 32-bit. */ |
174 | int bitfield_width = p->config.sense_bitfield_width; | 173 | int bitfield_width = p->sense_bitfield_width; |
175 | int shift = 32 - (irq + 1) * bitfield_width; | 174 | int shift = 32 - (irq + 1) * bitfield_width; |
176 | 175 | ||
177 | dev_dbg(&p->pdev->dev, "sense irq = %d, mode = %d\n", irq, value); | 176 | dev_dbg(&p->pdev->dev, "sense irq = %d, mode = %d\n", irq, value); |
@@ -378,7 +377,6 @@ MODULE_DEVICE_TABLE(of, intc_irqpin_dt_ids); | |||
378 | static int intc_irqpin_probe(struct platform_device *pdev) | 377 | static int intc_irqpin_probe(struct platform_device *pdev) |
379 | { | 378 | { |
380 | struct device *dev = &pdev->dev; | 379 | struct device *dev = &pdev->dev; |
381 | struct renesas_intc_irqpin_config *pdata = dev->platform_data; | ||
382 | const struct of_device_id *of_id; | 380 | const struct of_device_id *of_id; |
383 | struct intc_irqpin_priv *p; | 381 | struct intc_irqpin_priv *p; |
384 | struct intc_irqpin_iomem *i; | 382 | struct intc_irqpin_iomem *i; |
@@ -388,6 +386,7 @@ static int intc_irqpin_probe(struct platform_device *pdev) | |||
388 | void (*enable_fn)(struct irq_data *d); | 386 | void (*enable_fn)(struct irq_data *d); |
389 | void (*disable_fn)(struct irq_data *d); | 387 | void (*disable_fn)(struct irq_data *d); |
390 | const char *name = dev_name(dev); | 388 | const char *name = dev_name(dev); |
389 | bool control_parent; | ||
391 | int ref_irq; | 390 | int ref_irq; |
392 | int ret; | 391 | int ret; |
393 | int k; | 392 | int k; |
@@ -399,16 +398,11 @@ static int intc_irqpin_probe(struct platform_device *pdev) | |||
399 | } | 398 | } |
400 | 399 | ||
401 | /* deal with driver instance configuration */ | 400 | /* deal with driver instance configuration */ |
402 | if (pdata) { | 401 | of_property_read_u32(dev->of_node, "sense-bitfield-width", |
403 | memcpy(&p->config, pdata, sizeof(*pdata)); | 402 | &p->sense_bitfield_width); |
404 | } else { | 403 | control_parent = of_property_read_bool(dev->of_node, "control-parent"); |
405 | of_property_read_u32(dev->of_node, "sense-bitfield-width", | 404 | if (!p->sense_bitfield_width) |
406 | &p->config.sense_bitfield_width); | 405 | p->sense_bitfield_width = 4; /* default to 4 bits */ |
407 | p->config.control_parent = of_property_read_bool(dev->of_node, | ||
408 | "control-parent"); | ||
409 | } | ||
410 | if (!p->config.sense_bitfield_width) | ||
411 | p->config.sense_bitfield_width = 4; /* default to 4 bits */ | ||
412 | 406 | ||
413 | p->pdev = pdev; | 407 | p->pdev = pdev; |
414 | platform_set_drvdata(pdev, p); | 408 | platform_set_drvdata(pdev, p); |
@@ -515,7 +509,7 @@ static int intc_irqpin_probe(struct platform_device *pdev) | |||
515 | } | 509 | } |
516 | 510 | ||
517 | /* use more severe masking method if requested */ | 511 | /* use more severe masking method if requested */ |
518 | if (p->config.control_parent) { | 512 | if (control_parent) { |
519 | enable_fn = intc_irqpin_irq_enable_force; | 513 | enable_fn = intc_irqpin_irq_enable_force; |
520 | disable_fn = intc_irqpin_irq_disable_force; | 514 | disable_fn = intc_irqpin_irq_disable_force; |
521 | } else if (!p->shared_irqs) { | 515 | } else if (!p->shared_irqs) { |
@@ -534,10 +528,9 @@ static int intc_irqpin_probe(struct platform_device *pdev) | |||
534 | irq_chip->irq_set_wake = intc_irqpin_irq_set_wake; | 528 | irq_chip->irq_set_wake = intc_irqpin_irq_set_wake; |
535 | irq_chip->flags = IRQCHIP_MASK_ON_SUSPEND; | 529 | irq_chip->flags = IRQCHIP_MASK_ON_SUSPEND; |
536 | 530 | ||
537 | p->irq_domain = irq_domain_add_simple(dev->of_node, | 531 | p->irq_domain = irq_domain_add_simple(dev->of_node, p->number_of_irqs, |
538 | p->number_of_irqs, | 532 | 0, &intc_irqpin_irq_domain_ops, |
539 | p->config.irq_base, | 533 | p); |
540 | &intc_irqpin_irq_domain_ops, p); | ||
541 | if (!p->irq_domain) { | 534 | if (!p->irq_domain) { |
542 | ret = -ENXIO; | 535 | ret = -ENXIO; |
543 | dev_err(dev, "cannot initialize irq domain\n"); | 536 | dev_err(dev, "cannot initialize irq domain\n"); |
@@ -572,13 +565,6 @@ static int intc_irqpin_probe(struct platform_device *pdev) | |||
572 | 565 | ||
573 | dev_info(dev, "driving %d irqs\n", p->number_of_irqs); | 566 | dev_info(dev, "driving %d irqs\n", p->number_of_irqs); |
574 | 567 | ||
575 | /* warn in case of mismatch if irq base is specified */ | ||
576 | if (p->config.irq_base) { | ||
577 | if (p->config.irq_base != p->irq[0].domain_irq) | ||
578 | dev_warn(dev, "irq base mismatch (%d/%d)\n", | ||
579 | p->config.irq_base, p->irq[0].domain_irq); | ||
580 | } | ||
581 | |||
582 | return 0; | 568 | return 0; |
583 | 569 | ||
584 | err1: | 570 | err1: |