Merge tag 'imx-drm-next-2015-10-30' of git://git.pengutronix.de/git/pza/linux into drm-next

imx-drm fixes and color format updates

- Some correctness fixes found by coccinelle
- Add drivers/gpu/ipu-v3 directory to MAINTAINERS
- Add support for more color formats
- Fix a regression, making displays larger than FullHD work again

* tag 'imx-drm-next-2015-10-30' of git://git.pengutronix.de/git/pza/linux:
  drm/imx: hdmi: fix HDMI setup to allow modes larger than FullHD
  gpu: ipu-v3: fix div_ratio type
  gpu: ipu-v3: csi: add support for 8 bpp grayscale sensors.
  drm/imx: enable ARGB4444 16-bit color format
  gpu: ipu-v3: add support for ARGB4444 16-bit color format
  drm/imx: ipuv3-plane: enable support for RGBX8888 and RGBA8888 pixel formats
  gpu: ipu-v3: add support for RGBX8888 and RGBA8888 pixel formats
  drm/imx: enable 15-bit RGB with 1-bit alpha formats
  gpu: ipu-v3: add support for 15-bit RGB with 1-bit alpha formats
  MAINTAINERS: Add IPUv3 core driver to the i.MX DRM driver section
  gpu: ipu-v3: ipu-csi: bool test doesn't need a comparison to false

5 files changed, 119 insertions, 10 deletions

diff --git a/drivers/gpu/drm/imx/dw_hdmi-imx.c b/drivers/gpu/drm/imx/dw_hdmi-imx.c
index 644edf65dbe0..98605ea2ad9d 100644
--- a/drivers/gpu/drm/imx/dw_hdmi-imx.c
+++ b/drivers/gpu/drm/imx/dw_hdmi-imx.c
@@ -48,11 +48,17 @@ static const struct dw_hdmi_mpll_config imx_mpll_cfg[] = {
                         { 0x40a2, 0x000a },
                 },
         }, {
-                ~0UL, {
+                216000000, {
                         { 0x00a0, 0x000a },
                         { 0x2001, 0x000f },
                         { 0x4002, 0x000f },
                 },
+        }, {
+                ~0UL, {
+                        { 0x0000, 0x0000 },
+                        { 0x0000, 0x0000 },
+                        { 0x0000, 0x0000 },
+                },
         }
 };
 
@@ -82,7 +88,7 @@ static const struct dw_hdmi_curr_ctrl imx_cur_ctr[] = {
  */
 static const struct dw_hdmi_phy_config imx_phy_config[] = {
         /*pixelclk   symbol   term   vlev */
-        { 148500000, 0x800d, 0x0005, 0x01ad},
+        { 216000000, 0x800d, 0x0005, 0x01ad},
         { ~0UL,      0x0000, 0x0000, 0x0000}
 };
 
@@ -148,7 +154,8 @@ static enum drm_mode_status imx6q_hdmi_mode_valid(struct drm_connector *con,
 {
         if (mode->clock < 13500)
                 return MODE_CLOCK_LOW;
-        if (mode->clock > 266000)
+        /* FIXME: Hardware is capable of 266MHz, but setup data is missing. */
+        if (mode->clock > 216000)
                 return MODE_CLOCK_HIGH;
 
         return MODE_OK;
@@ -159,7 +166,8 @@ static enum drm_mode_status imx6dl_hdmi_mode_valid(struct drm_connector *con,
 {
         if (mode->clock < 13500)
                 return MODE_CLOCK_LOW;
-        if (mode->clock > 270000)
+        /* FIXME: Hardware is capable of 270MHz, but setup data is missing. */
+        if (mode->clock > 216000)
                 return MODE_CLOCK_HIGH;
 
         return MODE_OK;
diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c
index 878a643d72e4..575f4c84388f 100644
--- a/drivers/gpu/drm/imx/ipuv3-plane.c
+++ b/drivers/gpu/drm/imx/ipuv3-plane.c
@@ -23,12 +23,21 @@
 #define to_ipu_plane(x) container_of(x, struct ipu_plane, base)
 
 static const uint32_t ipu_plane_formats[] = {
+        DRM_FORMAT_ARGB1555,
         DRM_FORMAT_XRGB1555,
+        DRM_FORMAT_ABGR1555,
         DRM_FORMAT_XBGR1555,
+        DRM_FORMAT_RGBA5551,
+        DRM_FORMAT_BGRA5551,
+        DRM_FORMAT_ARGB4444,
         DRM_FORMAT_ARGB8888,
         DRM_FORMAT_XRGB8888,
         DRM_FORMAT_ABGR8888,
         DRM_FORMAT_XBGR8888,
+        DRM_FORMAT_RGBA8888,
+        DRM_FORMAT_RGBX8888,
+        DRM_FORMAT_BGRA8888,
+        DRM_FORMAT_BGRA8888,
         DRM_FORMAT_YUYV,
         DRM_FORMAT_YVYU,
         DRM_FORMAT_YUV420,
@@ -175,8 +184,15 @@ int ipu_plane_mode_set(struct ipu_plane *ipu_plane, struct drm_crtc *crtc,
                 ipu_dp_set_window_pos(ipu_plane->dp, crtc_x, crtc_y);
                 /* Enable local alpha on partial plane */
                 switch (fb->pixel_format) {
+                case DRM_FORMAT_ARGB1555:
+                case DRM_FORMAT_ABGR1555:
+                case DRM_FORMAT_RGBA5551:
+                case DRM_FORMAT_BGRA5551:
+                case DRM_FORMAT_ARGB4444:
                 case DRM_FORMAT_ARGB8888:
                 case DRM_FORMAT_ABGR8888:
+                case DRM_FORMAT_RGBA8888:
+                case DRM_FORMAT_BGRA8888:
                         ipu_dp_set_global_alpha(ipu_plane->dp, false, 0, false);
                         break;
                 default:
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index e5a38d202a21..ba47b30d28fa 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -57,10 +57,15 @@ EXPORT_SYMBOL_GPL(ipu_srm_dp_sync_update);
 enum ipu_color_space ipu_drm_fourcc_to_colorspace(u32 drm_fourcc)
 {
         switch (drm_fourcc) {
+        case DRM_FORMAT_ARGB1555:
+        case DRM_FORMAT_ABGR1555:
+        case DRM_FORMAT_RGBA5551:
+        case DRM_FORMAT_BGRA5551:
         case DRM_FORMAT_RGB565:
         case DRM_FORMAT_BGR565:
         case DRM_FORMAT_RGB888:
         case DRM_FORMAT_BGR888:
+        case DRM_FORMAT_ARGB4444:
         case DRM_FORMAT_XRGB8888:
         case DRM_FORMAT_XBGR8888:
         case DRM_FORMAT_RGBX8888:
diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c
index 3bf05bc4ab67..63eb16bf2cf0 100644
--- a/drivers/gpu/ipu-v3/ipu-cpmem.c
+++ b/drivers/gpu/ipu-v3/ipu-cpmem.c
@@ -452,7 +452,7 @@ void ipu_cpmem_set_yuv_planar(struct ipuv3_channel *ch,
 }
 EXPORT_SYMBOL_GPL(ipu_cpmem_set_yuv_planar);
 
-static const struct ipu_rgb def_rgb_32 = {
+static const struct ipu_rgb def_xrgb_32 = {
         .red    = { .offset = 16, .length = 8, },
         .green  = { .offset =  8, .length = 8, },
         .blue   = { .offset =  0, .length = 8, },
@@ -460,7 +460,7 @@ static const struct ipu_rgb def_rgb_32 = {
         .bits_per_pixel = 32,
 };
 
-static const struct ipu_rgb def_bgr_32 = {
+static const struct ipu_rgb def_xbgr_32 = {
         .red    = { .offset =  0, .length = 8, },
         .green  = { .offset =  8, .length = 8, },
         .blue   = { .offset = 16, .length = 8, },
@@ -468,6 +468,22 @@ static const struct ipu_rgb def_bgr_32 = {
         .bits_per_pixel = 32,
 };
 
+static const struct ipu_rgb def_rgbx_32 = {
+        .red    = { .offset = 24, .length = 8, },
+        .green  = { .offset = 16, .length = 8, },
+        .blue   = { .offset =  8, .length = 8, },
+        .transp = { .offset =  0, .length = 8, },
+        .bits_per_pixel = 32,
+};
+
+static const struct ipu_rgb def_bgrx_32 = {
+        .red    = { .offset =  8, .length = 8, },
+        .green  = { .offset = 16, .length = 8, },
+        .blue   = { .offset = 24, .length = 8, },
+        .transp = { .offset =  0, .length = 8, },
+        .bits_per_pixel = 32,
+};
+
 static const struct ipu_rgb def_rgb_24 = {
         .red    = { .offset = 16, .length = 8, },
         .green  = { .offset =  8, .length = 8, },
@@ -500,6 +516,46 @@ static const struct ipu_rgb def_bgr_16 = {
         .bits_per_pixel = 16,
 };
 
+static const struct ipu_rgb def_argb_16 = {
+        .red    = { .offset = 10, .length = 5, },
+        .green  = { .offset =  5, .length = 5, },
+        .blue   = { .offset =  0, .length = 5, },