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authorBen Skeggs <bskeggs@redhat.com>2015-08-20 00:54:15 -0400
committerBen Skeggs <bskeggs@redhat.com>2015-08-27 22:40:32 -0400
commita01ca78c8f118e5a24f1527ecf078ab56ddd4805 (patch)
tree34ccaf8913fcdf3a9be2794b27a30a52e8449bb0 /drivers/gpu
parent4e7e62d607a711bc8e8576a0fc7d8f242d25c9b3 (diff)
drm/nouveau/nvif: simplify and tidy library interfaces
A variety of tweaks to the NVIF library interfaces, mostly ripping out things that turned out to be not so useful. - Removed refcounting from nvif_object, callers are expected to not be stupid instead. - nvif_client is directly reachable from anything derived from nvif_object, removing the need for heuristics to locate it - _new() versions of interfaces, that allocate memory for the object they construct, have been removed. The vast majority of callers used the embedded _init() interfaces. - No longer storing constructor arguments (and the data returned from nvkm) inside nvif_object, it's more or less unused and just wastes memory. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/nouveau/dispnv04/arb.c2
-rw-r--r--drivers/gpu/drm/nouveau/dispnv04/dac.c15
-rw-r--r--drivers/gpu/drm/nouveau/dispnv04/dfp.c2
-rw-r--r--drivers/gpu/drm/nouveau/dispnv04/disp.c4
-rw-r--r--drivers/gpu/drm/nouveau/dispnv04/hw.c22
-rw-r--r--drivers/gpu/drm/nouveau/dispnv04/hw.h26
-rw-r--r--drivers/gpu/drm/nouveau/dispnv04/overlay.c13
-rw-r--r--drivers/gpu/drm/nouveau/dispnv04/tvnv17.h4
-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/client.h26
-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/device.h24
-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/notify.h12
-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/object.h57
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_abi16.c134
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_abi16.h2
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_agp.c2
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_backlight.c22
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_bios.c11
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_bo.c4
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_chan.c55
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_chan.h2
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_connector.c4
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_display.c6
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_dma.c10
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_dma.h2
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drm.c18
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_fence.c15
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_gem.c2
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_sysfs.c4
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_vga.c9
-rw-r--r--drivers/gpu/drm/nouveau/nv04_fbcon.c12
-rw-r--r--drivers/gpu/drm/nouveau/nv04_fence.c2
-rw-r--r--drivers/gpu/drm/nouveau/nv10_fence.c2
-rw-r--r--drivers/gpu/drm/nouveau/nv17_fence.c4
-rw-r--r--drivers/gpu/drm/nouveau/nv50_display.c110
-rw-r--r--drivers/gpu/drm/nouveau/nv50_fbcon.c2
-rw-r--r--drivers/gpu/drm/nouveau/nv50_fence.c4
-rw-r--r--drivers/gpu/drm/nouveau/nv84_fence.c2
-rw-r--r--drivers/gpu/drm/nouveau/nvc0_fbcon.c2
-rw-r--r--drivers/gpu/drm/nouveau/nvif/client.c61
-rw-r--r--drivers/gpu/drm/nouveau/nvif/device.c45
-rw-r--r--drivers/gpu/drm/nouveau/nvif/notify.c49
-rw-r--r--drivers/gpu/drm/nouveau/nvif/object.c135
42 files changed, 365 insertions, 574 deletions
diff --git a/drivers/gpu/drm/nouveau/dispnv04/arb.c b/drivers/gpu/drm/nouveau/dispnv04/arb.c
index c6361422a0b2..82bd4658aa58 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/arb.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/arb.c
@@ -198,7 +198,7 @@ nv04_update_arb(struct drm_device *dev, int VClk, int bpp,
198 int *burst, int *lwm) 198 int *burst, int *lwm)
199{ 199{
200 struct nouveau_drm *drm = nouveau_drm(dev); 200 struct nouveau_drm *drm = nouveau_drm(dev);
201 struct nvif_device *device = &nouveau_drm(dev)->device; 201 struct nvif_object *device = &nouveau_drm(dev)->device.object;
202 struct nv_fifo_info fifo_data; 202 struct nv_fifo_info fifo_data;
203 struct nv_sim_state sim_data; 203 struct nv_sim_state sim_data;
204 int MClk = nouveau_hw_get_clock(dev, PLL_MEMORY); 204 int MClk = nouveau_hw_get_clock(dev, PLL_MEMORY);
diff --git a/drivers/gpu/drm/nouveau/dispnv04/dac.c b/drivers/gpu/drm/nouveau/dispnv04/dac.c
index 81c1efb8b3b6..71e99cdfc40e 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/dac.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/dac.c
@@ -65,7 +65,8 @@ int nv04_dac_output_offset(struct drm_encoder *encoder)
65 65
66static int sample_load_twice(struct drm_device *dev, bool sense[2]) 66static int sample_load_twice(struct drm_device *dev, bool sense[2])
67{ 67{
68 struct nvif_device *device = &nouveau_drm(dev)->device; 68 struct nouveau_drm *drm = nouveau_drm(dev);
69 struct nvif_object *device = &drm->device.object;
69 int i; 70 int i;
70 71
71 for (i = 0; i < 2; i++) { 72 for (i = 0; i < 2; i++) {
@@ -79,19 +80,19 @@ static int sample_load_twice(struct drm_device *dev, bool sense[2])
79 * use a 10ms timeout (guards against crtc being inactive, in 80 * use a 10ms timeout (guards against crtc being inactive, in
80 * which case blank state would never change) 81 * which case blank state would never change)
81 */ 82 */
82 if (nvif_msec(device, 10, 83 if (nvif_msec(&drm->device, 10,
83 if (!(nvif_rd32(device, NV_PRMCIO_INP0__COLOR) & 1)) 84 if (!(nvif_rd32(device, NV_PRMCIO_INP0__COLOR) & 1))
84 break; 85 break;
85 ) < 0) 86 ) < 0)
86 return -EBUSY; 87 return -EBUSY;
87 88
88 if (nvif_msec(device, 10, 89 if (nvif_msec(&drm->device, 10,
89 if ( (nvif_rd32(device, NV_PRMCIO_INP0__COLOR) & 1)) 90 if ( (nvif_rd32(device, NV_PRMCIO_INP0__COLOR) & 1))
90 break; 91 break;
91 ) < 0) 92 ) < 0)
92 return -EBUSY; 93 return -EBUSY;
93 94
94 if (nvif_msec(device, 10, 95 if (nvif_msec(&drm->device, 10,
95 if (!(nvif_rd32(device, NV_PRMCIO_INP0__COLOR) & 1)) 96 if (!(nvif_rd32(device, NV_PRMCIO_INP0__COLOR) & 1))
96 break; 97 break;
97 ) < 0) 98 ) < 0)
@@ -132,7 +133,7 @@ static enum drm_connector_status nv04_dac_detect(struct drm_encoder *encoder,
132 struct drm_connector *connector) 133 struct drm_connector *connector)
133{ 134{
134 struct drm_device *dev = encoder->dev; 135 struct drm_device *dev = encoder->dev;
135 struct nvif_device *device = &nouveau_drm(dev)->device; 136 struct nvif_object *device = &nouveau_drm(dev)->device.object;
136 struct nouveau_drm *drm = nouveau_drm(dev); 137 struct nouveau_drm *drm = nouveau_drm(dev);
137 uint8_t saved_seq1, saved_pi, saved_rpc1, saved_cr_mode; 138 uint8_t saved_seq1, saved_pi, saved_rpc1, saved_cr_mode;
138 uint8_t saved_palette0[3], saved_palette_mask; 139 uint8_t saved_palette0[3], saved_palette_mask;
@@ -235,8 +236,8 @@ uint32_t nv17_dac_sample_load(struct drm_encoder *encoder)
235{ 236{
236 struct drm_device *dev = encoder->dev; 237 struct drm_device *dev = encoder->dev;
237 struct nouveau_drm *drm = nouveau_drm(dev); 238 struct nouveau_drm *drm = nouveau_drm(dev);
238 struct nvif_device *device = &nouveau_drm(dev)->device; 239 struct nvif_object *device = &nouveau_drm(dev)->device.object;
239 struct nvkm_gpio *gpio = nvxx_gpio(device); 240 struct nvkm_gpio *gpio = nvxx_gpio(&drm->device);
240 struct dcb_output *dcb = nouveau_encoder(encoder)->dcb; 241 struct dcb_output *dcb = nouveau_encoder(encoder)->dcb;
241 uint32_t sample, testval, regoffset = nv04_dac_output_offset(encoder); 242 uint32_t sample, testval, regoffset = nv04_dac_output_offset(encoder);
242 uint32_t saved_powerctrl_2 = 0, saved_powerctrl_4 = 0, saved_routput, 243 uint32_t saved_powerctrl_2 = 0, saved_powerctrl_4 = 0, saved_routput,
diff --git a/drivers/gpu/drm/nouveau/dispnv04/dfp.c b/drivers/gpu/drm/nouveau/dispnv04/dfp.c
index a85e7251e0cb..522e91ab5360 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/dfp.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/dfp.c
@@ -281,7 +281,7 @@ static void nv04_dfp_mode_set(struct drm_encoder *encoder,
281 struct drm_display_mode *adjusted_mode) 281 struct drm_display_mode *adjusted_mode)
282{ 282{
283 struct drm_device *dev = encoder->dev; 283 struct drm_device *dev = encoder->dev;
284 struct nvif_device *device = &nouveau_drm(dev)->device; 284 struct nvif_object *device = &nouveau_drm(dev)->device.object;
285 struct nouveau_drm *drm = nouveau_drm(dev); 285 struct nouveau_drm *drm = nouveau_drm(dev);
286 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); 286 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
287 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; 287 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index];
diff --git a/drivers/gpu/drm/nouveau/dispnv04/disp.c b/drivers/gpu/drm/nouveau/dispnv04/disp.c
index 018a4480cfc5..9e650081c357 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/disp.c
@@ -47,7 +47,7 @@ nv04_display_create(struct drm_device *dev)
47 if (!disp) 47 if (!disp)
48 return -ENOMEM; 48 return -ENOMEM;
49 49
50 nvif_object_map(nvif_object(&drm->device)); 50 nvif_object_map(&drm->device.object);
51 51
52 nouveau_display(dev)->priv = disp; 52 nouveau_display(dev)->priv = disp;
53 nouveau_display(dev)->dtor = nv04_display_destroy; 53 nouveau_display(dev)->dtor = nv04_display_destroy;
@@ -153,7 +153,7 @@ nv04_display_destroy(struct drm_device *dev)
153 nouveau_display(dev)->priv = NULL; 153 nouveau_display(dev)->priv = NULL;
154 kfree(disp); 154 kfree(disp);
155 155
156 nvif_object_unmap(nvif_object(&drm->device)); 156 nvif_object_unmap(&drm->device.object);
157} 157}
158 158
159int 159int
diff --git a/drivers/gpu/drm/nouveau/dispnv04/hw.c b/drivers/gpu/drm/nouveau/dispnv04/hw.c
index 5039bb530523..956a833b8200 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/hw.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/hw.c
@@ -165,8 +165,8 @@ nouveau_hw_get_pllvals(struct drm_device *dev, enum nvbios_pll_type plltype,
165 struct nvkm_pll_vals *pllvals) 165 struct nvkm_pll_vals *pllvals)
166{ 166{
167 struct nouveau_drm *drm = nouveau_drm(dev); 167 struct nouveau_drm *drm = nouveau_drm(dev);
168 struct nvif_device *device = &drm->device; 168 struct nvif_object *device = &drm->device.object;
169 struct nvkm_bios *bios = nvxx_bios(device); 169 struct nvkm_bios *bios = nvxx_bios(&drm->device);
170 uint32_t reg1, pll1, pll2 = 0; 170 uint32_t reg1, pll1, pll2 = 0;
171 struct nvbios_pll pll_lim; 171 struct nvbios_pll pll_lim;
172 int ret; 172 int ret;
@@ -660,7 +660,7 @@ nv_load_state_ext(struct drm_device *dev, int head,
660 struct nv04_mode_state *state) 660 struct nv04_mode_state *state)
661{ 661{
662 struct nouveau_drm *drm = nouveau_drm(dev); 662 struct nouveau_drm *drm = nouveau_drm(dev);
663 struct nvif_device *device = &drm->device; 663 struct nvif_object *device = &drm->device.object;
664 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; 664 struct nv04_crtc_reg *regp = &state->crtc_reg[head];
665 uint32_t reg900; 665 uint32_t reg900;
666 int i; 666 int i;
@@ -677,10 +677,10 @@ nv_load_state_ext(struct drm_device *dev, int head,
677 nvif_wr32(device, NV_PVIDEO_INTR_EN, 0); 677 nvif_wr32(device, NV_PVIDEO_INTR_EN, 0);
678 nvif_wr32(device, NV_PVIDEO_OFFSET_BUFF(0), 0); 678 nvif_wr32(device, NV_PVIDEO_OFFSET_BUFF(0), 0);
679 nvif_wr32(device, NV_PVIDEO_OFFSET_BUFF(1), 0); 679 nvif_wr32(device, NV_PVIDEO_OFFSET_BUFF(1), 0);
680 nvif_wr32(device, NV_PVIDEO_LIMIT(0), device->info.ram_size - 1); 680 nvif_wr32(device, NV_PVIDEO_LIMIT(0), drm->device.info.ram_size - 1);
681 nvif_wr32(device, NV_PVIDEO_LIMIT(1), device->info.ram_size - 1); 681 nvif_wr32(device, NV_PVIDEO_LIMIT(1), drm->device.info.ram_size - 1);
682 nvif_wr32(device, NV_PVIDEO_UVPLANE_LIMIT(0), device->info.ram_size - 1); 682 nvif_wr32(device, NV_PVIDEO_UVPLANE_LIMIT(0), drm->device.info.ram_size - 1);
683 nvif_wr32(device, NV_PVIDEO_UVPLANE_LIMIT(1), device->info.ram_size - 1); 683 nvif_wr32(device, NV_PVIDEO_UVPLANE_LIMIT(1), drm->device.info.ram_size - 1);
684 nvif_wr32(device, NV_PBUS_POWERCTRL_2, 0); 684 nvif_wr32(device, NV_PBUS_POWERCTRL_2, 0);
685 685
686 NVWriteCRTC(dev, head, NV_PCRTC_CURSOR_CONFIG, regp->cursor_cfg); 686 NVWriteCRTC(dev, head, NV_PCRTC_CURSOR_CONFIG, regp->cursor_cfg);
@@ -740,11 +740,11 @@ nv_load_state_ext(struct drm_device *dev, int head,
740 if (drm->device.info.family < NV_DEVICE_INFO_V0_KELVIN) { 740 if (drm->device.info.family < NV_DEVICE_INFO_V0_KELVIN) {
741 /* Not waiting for vertical retrace before modifying 741 /* Not waiting for vertical retrace before modifying
742 CRE_53/CRE_54 causes lockups. */ 742 CRE_53/CRE_54 causes lockups. */
743 nvif_msec(device, 650, 743 nvif_msec(&drm->device, 650,
744 if ( (nvif_rd32(device, NV_PRMCIO_INP0__COLOR) & 8)) 744 if ( (nvif_rd32(device, NV_PRMCIO_INP0__COLOR) & 8))
745 break; 745 break;
746 ); 746 );
747 nvif_msec(device, 650, 747 nvif_msec(&drm->device, 650,
748 if (!(nvif_rd32(device, NV_PRMCIO_INP0__COLOR) & 8)) 748 if (!(nvif_rd32(device, NV_PRMCIO_INP0__COLOR) & 8))
749 break; 749 break;
750 ); 750 );
@@ -770,7 +770,7 @@ static void
770nv_save_state_palette(struct drm_device *dev, int head, 770nv_save_state_palette(struct drm_device *dev, int head,
771 struct nv04_mode_state *state) 771 struct nv04_mode_state *state)
772{ 772{
773 struct nvif_device *device = &nouveau_drm(dev)->device; 773 struct nvif_object *device = &nouveau_drm(dev)->device.object;
774 int head_offset = head * NV_PRMDIO_SIZE, i; 774 int head_offset = head * NV_PRMDIO_SIZE, i;
775 775
776 nvif_wr08(device, NV_PRMDIO_PIXEL_MASK + head_offset, 776 nvif_wr08(device, NV_PRMDIO_PIXEL_MASK + head_offset,
@@ -789,7 +789,7 @@ void
789nouveau_hw_load_state_palette(struct drm_device *dev, int head, 789nouveau_hw_load_state_palette(struct drm_device *dev, int head,
790 struct nv04_mode_state *state) 790 struct nv04_mode_state *state)
791{ 791{
792 struct nvif_device *device = &nouveau_drm(dev)->device; 792 struct nvif_object *device = &nouveau_drm(dev)->device.object;
793 int head_offset = head * NV_PRMDIO_SIZE, i; 793 int head_offset = head * NV_PRMDIO_SIZE, i;
794 794
795 nvif_wr08(device, NV_PRMDIO_PIXEL_MASK + head_offset, 795 nvif_wr08(device, NV_PRMDIO_PIXEL_MASK + head_offset,
diff --git a/drivers/gpu/drm/nouveau/dispnv04/hw.h b/drivers/gpu/drm/nouveau/dispnv04/hw.h
index 6c796178bf0c..3bded60c5596 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/hw.h
+++ b/drivers/gpu/drm/nouveau/dispnv04/hw.h
@@ -60,7 +60,7 @@ extern void nouveau_calc_arb(struct drm_device *, int vclk, int bpp,
60static inline uint32_t NVReadCRTC(struct drm_device *dev, 60static inline uint32_t NVReadCRTC(struct drm_device *dev,
61 int head, uint32_t reg) 61 int head, uint32_t reg)
62{ 62{
63 struct nvif_device *device = &nouveau_drm(dev)->device; 63 struct nvif_object *device = &nouveau_drm(dev)->device.object;
64 uint32_t val; 64 uint32_t val;
65 if (head) 65 if (head)
66 reg += NV_PCRTC0_SIZE; 66 reg += NV_PCRTC0_SIZE;
@@ -71,7 +71,7 @@ static inline uint32_t NVReadCRTC(struct drm_device *dev,
71static inline void NVWriteCRTC(struct drm_device *dev, 71static inline void NVWriteCRTC(struct drm_device *dev,
72 int head, uint32_t reg, uint32_t val) 72 int head, uint32_t reg, uint32_t val)
73{ 73{
74 struct nvif_device *device = &nouveau_drm(dev)->device; 74 struct nvif_object *device = &nouveau_drm(dev)->device.object;
75 if (head) 75 if (head)
76 reg += NV_PCRTC0_SIZE; 76 reg += NV_PCRTC0_SIZE;
77 nvif_wr32(device, reg, val); 77 nvif_wr32(device, reg, val);
@@ -80,7 +80,7 @@ static inline void NVWriteCRTC(struct drm_device *dev,
80static inline uint32_t NVReadRAMDAC(struct drm_device *dev, 80static inline uint32_t NVReadRAMDAC(struct drm_device *dev,
81 int head, uint32_t reg) 81 int head, uint32_t reg)
82{ 82{
83 struct nvif_device *device = &nouveau_drm(dev)->device; 83 struct nvif_object *device = &nouveau_drm(dev)->device.object;
84 uint32_t val; 84 uint32_t val;
85 if (head) 85 if (head)
86 reg += NV_PRAMDAC0_SIZE; 86 reg += NV_PRAMDAC0_SIZE;
@@ -91,7 +91,7 @@ static inline uint32_t NVReadRAMDAC(struct drm_device *dev,
91static inline void NVWriteRAMDAC(struct drm_device *dev, 91static inline void NVWriteRAMDAC(struct drm_device *dev,
92 int head, uint32_t reg, uint32_t val) 92 int head, uint32_t reg, uint32_t val)
93{ 93{
94 struct nvif_device *device = &nouveau_drm(dev)->device; 94 struct nvif_object *device = &nouveau_drm(dev)->device.object;
95 if (head) 95 if (head)
96 reg += NV_PRAMDAC0_SIZE; 96 reg += NV_PRAMDAC0_SIZE;
97 nvif_wr32(device, reg, val); 97 nvif_wr32(device, reg, val);
@@ -120,7 +120,7 @@ static inline void nv_write_tmds(struct drm_device *dev,
120static inline void NVWriteVgaCrtc(struct drm_device *dev, 120static inline void NVWriteVgaCrtc(struct drm_device *dev,
121 int head, uint8_t index, uint8_t value) 121 int head, uint8_t index, uint8_t value)
122{ 122{
123 struct nvif_device *device = &nouveau_drm(dev)->device; 123 struct nvif_object *device = &nouveau_drm(dev)->device.object;
124 nvif_wr08(device, NV_PRMCIO_CRX__COLOR + head * NV_PRMCIO_SIZE, index); 124 nvif_wr08(device, NV_PRMCIO_CRX__COLOR + head * NV_PRMCIO_SIZE, index);
125 nvif_wr08(device, NV_PRMCIO_CR__COLOR + head * NV_PRMCIO_SIZE, value); 125 nvif_wr08(device, NV_PRMCIO_CR__COLOR + head * NV_PRMCIO_SIZE, value);
126} 126}
@@ -128,7 +128,7 @@ static inline void NVWriteVgaCrtc(struct drm_device *dev,
128static inline uint8_t NVReadVgaCrtc(struct drm_device *dev, 128static inline uint8_t NVReadVgaCrtc(struct drm_device *dev,
129 int head, uint8_t index) 129 int head, uint8_t index)
130{ 130{
131 struct nvif_device *device = &nouveau_drm(dev)->device; 131 struct nvif_object *device = &nouveau_drm(dev)->device.object;
132 uint8_t val; 132 uint8_t val;
133 nvif_wr08(device, NV_PRMCIO_CRX__COLOR + head * NV_PRMCIO_SIZE, index); 133 nvif_wr08(device, NV_PRMCIO_CRX__COLOR + head * NV_PRMCIO_SIZE, index);
134 val = nvif_rd08(device, NV_PRMCIO_CR__COLOR + head * NV_PRMCIO_SIZE); 134 val = nvif_rd08(device, NV_PRMCIO_CR__COLOR + head * NV_PRMCIO_SIZE);
@@ -165,7 +165,7 @@ static inline uint8_t NVReadVgaCrtc5758(struct drm_device *dev, int head, uint8_
165static inline uint8_t NVReadPRMVIO(struct drm_device *dev, 165static inline uint8_t NVReadPRMVIO(struct drm_device *dev,
166 int head, uint32_t reg) 166 int head, uint32_t reg)
167{ 167{
168 struct nvif_device *device = &nouveau_drm(dev)->device; 168 struct nvif_object *device = &nouveau_drm(dev)->device.object;
169 struct nouveau_drm *drm = nouveau_drm(dev); 169 struct nouveau_drm *drm = nouveau_drm(dev);
170 uint8_t val; 170 uint8_t val;
171 171
@@ -181,7 +181,7 @@ static inline uint8_t NVReadPRMVIO(struct drm_device *dev,
181static inline void NVWritePRMVIO(struct drm_device *dev, 181static inline void NVWritePRMVIO(struct drm_device *dev,
182 int head, uint32_t reg, uint8_t value) 182 int head, uint32_t reg, uint8_t value)
183{ 183{
184 struct nvif_device *device = &nouveau_drm(dev)->device; 184 struct nvif_object *device = &nouveau_drm(dev)->device.object;
185 struct nouveau_drm *drm = nouveau_drm(dev); 185 struct nouveau_drm *drm = nouveau_drm(dev);
186 186
187 /* Only NV4x have two pvio ranges; other twoHeads cards MUST call 187 /* Only NV4x have two pvio ranges; other twoHeads cards MUST call
@@ -194,14 +194,14 @@ static inline void NVWritePRMVIO(struct drm_device *dev,
194 194
195static inline void NVSetEnablePalette(struct drm_device *dev, int head, bool enable) 195static inline void NVSetEnablePalette(struct drm_device *dev, int head, bool enable)
196{ 196{
197 struct nvif_device *device = &nouveau_drm(dev)->device; 197 struct nvif_object *device = &nouveau_drm(dev)->device.object;
198 nvif_rd08(device, NV_PRMCIO_INP0__COLOR + head * NV_PRMCIO_SIZE); 198 nvif_rd08(device, NV_PRMCIO_INP0__COLOR + head * NV_PRMCIO_SIZE);
199 nvif_wr08(device, NV_PRMCIO_ARX + head * NV_PRMCIO_SIZE, enable ? 0 : 0x20); 199 nvif_wr08(device, NV_PRMCIO_ARX + head * NV_PRMCIO_SIZE, enable ? 0 : 0x20);
200} 200}
201 201
202static inline bool NVGetEnablePalette(struct drm_device *dev, int head) 202static inline bool NVGetEnablePalette(struct drm_device *dev, int head)
203{ 203{
204 struct nvif_device *device = &nouveau_drm(dev)->device; 204 struct nvif_object *device = &nouveau_drm(dev)->device.object;
205 nvif_rd08(device, NV_PRMCIO_INP0__COLOR + head * NV_PRMCIO_SIZE); 205 nvif_rd08(device, NV_PRMCIO_INP0__COLOR + head * NV_PRMCIO_SIZE);
206 return !(nvif_rd08(device, NV_PRMCIO_ARX + head * NV_PRMCIO_SIZE) & 0x20); 206 return !(nvif_rd08(device, NV_PRMCIO_ARX + head * NV_PRMCIO_SIZE) & 0x20);
207} 207}
@@ -209,7 +209,7 @@ static inline bool NVGetEnablePalette(struct drm_device *dev, int head)
209static inline void NVWriteVgaAttr(struct drm_device *dev, 209static inline void NVWriteVgaAttr(struct drm_device *dev,
210 int head, uint8_t index, uint8_t value) 210 int head, uint8_t index, uint8_t value)
211{ 211{
212 struct nvif_device *device = &nouveau_drm(dev)->device; 212 struct nvif_object *device = &nouveau_drm(dev)->device.object;
213 if (NVGetEnablePalette(dev, head)) 213 if (NVGetEnablePalette(dev, head))
214 index &= ~0x20; 214 index &= ~0x20;
215 else 215 else
@@ -223,7 +223,7 @@ static inline void NVWriteVgaAttr(struct drm_device *dev,
223static inline uint8_t NVReadVgaAttr(struct drm_device *dev, 223static inline uint8_t NVReadVgaAttr(struct drm_device *dev,
224 int head, uint8_t index) 224 int head, uint8_t index)
225{ 225{
226 struct nvif_device *device = &nouveau_drm(dev)->device; 226 struct nvif_object *device = &nouveau_drm(dev)->device.object;
227 uint8_t val; 227 uint8_t val;
228 if (NVGetEnablePalette(dev, head)) 228 if (NVGetEnablePalette(dev, head))
229 index &= ~0x20; 229 index &= ~0x20;
@@ -259,7 +259,7 @@ static inline void NVVgaProtect(struct drm_device *dev, int head, bool protect)
259static inline bool 259static inline bool
260nv_heads_tied(struct drm_device *dev) 260nv_heads_tied(struct drm_device *dev)
261{ 261{
262 struct nvif_device *device = &nouveau_drm(dev)->device; 262 struct nvif_object *device = &nouveau_drm(dev)->device.object;
263 struct nouveau_drm *drm = nouveau_drm(dev); 263 struct nouveau_drm *drm = nouveau_drm(dev);
264 264
265 if (drm->device.info.chipset == 0x11) 265 if (drm->device.info.chipset == 0x11)
diff --git a/drivers/gpu/drm/nouveau/dispnv04/overlay.c b/drivers/gpu/drm/nouveau/dispnv04/overlay.c
index 5f6ea1873f51..aeebdd402478 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/overlay.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/overlay.c
@@ -96,7 +96,8 @@ nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
96 uint32_t src_x, uint32_t src_y, 96 uint32_t src_x, uint32_t src_y,
97 uint32_t src_w, uint32_t src_h) 97 uint32_t src_w, uint32_t src_h)
98{ 98{
99 struct nvif_device *dev = &nouveau_drm(plane->dev)->device; 99 struct nouveau_drm *drm = nouveau_drm(plane->dev);
100 struct nvif_object *dev = &drm->device.object;
100 struct nouveau_plane *nv_plane = 101 struct nouveau_plane *nv_plane =
101 container_of(plane, struct nouveau_plane, base); 102 container_of(plane, struct nouveau_plane, base);
102 struct nouveau_framebuffer *nv_fb = nouveau_framebuffer(fb); 103 struct nouveau_framebuffer *nv_fb = nouveau_framebuffer(fb);
@@ -118,7 +119,7 @@ nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
118 if (format > 0xffff) 119 if (format > 0xffff)
119 return -ERANGE; 120 return -ERANGE;
120 121
121 if (dev->info.chipset >= 0x30) { 122 if (drm->device.info.chipset >= 0x30) {
122 if (crtc_w < (src_w >> 1) || crtc_h < (src_h >> 1)) 123 if (crtc_w < (src_w >> 1) || crtc_h < (src_h >> 1))
123 return -ERANGE; 124 return -ERANGE;
124 } else { 125 } else {
@@ -173,7 +174,7 @@ nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
173static int 174static int
174nv10_disable_plane(struct drm_plane *plane) 175nv10_disable_plane(struct drm_plane *plane)
175{ 176{
176 struct nvif_device *dev = &nouveau_drm(plane->dev)->device; 177 struct nvif_object *dev = &nouveau_drm(plane->dev)->device.object;
177 struct nouveau_plane *nv_plane = 178 struct nouveau_plane *nv_plane =
178 container_of(plane, struct nouveau_plane, base); 179 container_of(plane, struct nouveau_plane, base);
179 180
@@ -197,7 +198,7 @@ nv_destroy_plane(struct drm_plane *plane)
197static void 198static void
198nv10_set_params(struct nouveau_plane *plane) 199nv10_set_params(struct nouveau_plane *plane)
199{ 200{
200 struct nvif_device *dev = &nouveau_drm(plane->base.dev)->device; 201 struct nvif_object *dev = &nouveau_drm(plane->base.dev)->device.object;
201 u32 luma = (plane->brightness - 512) << 16 | plane->contrast; 202 u32 luma = (plane->brightness - 512) << 16 | plane->contrast;
202 u32 chroma = ((sin_mul(plane->hue, plane->saturation) & 0xffff) << 16) | 203 u32 chroma = ((sin_mul(plane->hue, plane->saturation) & 0xffff) << 16) |
203 (cos_mul(plane->hue, plane->saturation) & 0xffff); 204 (cos_mul(plane->hue, plane->saturation) & 0xffff);
@@ -346,7 +347,7 @@ nv04_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
346 uint32_t src_x, uint32_t src_y, 347 uint32_t src_x, uint32_t src_y,
347 uint32_t src_w, uint32_t src_h) 348 uint32_t src_w, uint32_t src_h)
348{ 349{
349 struct nvif_device *dev = &nouveau_drm(plane->dev)->device; 350 struct nvif_object *dev = &nouveau_drm(plane->dev)->device.object;
350 struct nouveau_plane *nv_plane = 351 struct nouveau_plane *nv_plane =
351 container_of(plane, struct nouveau_plane, base); 352 container_of(plane, struct nouveau_plane, base);
352 struct nouveau_framebuffer *nv_fb = nouveau_framebuffer(fb); 353 struct nouveau_framebuffer *nv_fb = nouveau_framebuffer(fb);
@@ -426,7 +427,7 @@ nv04_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
426static int 427static int
427nv04_disable_plane(struct drm_plane *plane) 428nv04_disable_plane(struct drm_plane *plane)
428{ 429{
429 struct nvif_device *dev = &nouveau_drm(plane->dev)->device; 430 struct nvif_object *dev = &nouveau_drm(plane->dev)->device.object;
430 struct nouveau_plane *nv_plane = 431 struct nouveau_plane *nv_plane =
431 container_of(plane, struct nouveau_plane, base); 432 container_of(plane, struct nouveau_plane, base);
432 433
diff --git a/drivers/gpu/drm/nouveau/dispnv04/tvnv17.h b/drivers/gpu/drm/nouveau/dispnv04/tvnv17.h
index 225894cdcac2..459910b6bb32 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/tvnv17.h
+++ b/drivers/gpu/drm/nouveau/dispnv04/tvnv17.h
@@ -131,13 +131,13 @@ static inline void nv_write_ptv(struct drm_device *dev, uint32_t reg,
131 uint32_t val) 131 uint32_t val)
132{ 132{
133 struct nvif_device *device = &nouveau_drm(dev)->device; 133 struct nvif_device *device = &nouveau_drm(dev)->device;
134 nvif_wr32(device, reg, val); 134 nvif_wr32(&device->object, reg, val);
135} 135}
136 136
137static inline uint32_t nv_read_ptv(struct drm_device *dev, uint32_t reg) 137static inline uint32_t nv_read_ptv(struct drm_device *dev, uint32_t reg)
138{ 138{
139 struct nvif_device *device = &nouveau_drm(dev)->device; 139 struct nvif_device *device = &nouveau_drm(dev)->device;
140 return nvif_rd32(device, reg); 140 return nvif_rd32(&device->object, reg);
141} 141}
142 142
143static inline void nv_write_tv_enc(struct drm_device *dev, uint8_t reg, 143static inline void nv_write_tv_enc(struct drm_device *dev, uint8_t reg,
diff --git a/drivers/gpu/drm/nouveau/include/nvif/client.h b/drivers/gpu/drm/nouveau/include/nvif/client.h
index eca648ef0f7a..cd6fbfa88762 100644
--- a/drivers/gpu/drm/nouveau/include/nvif/client.h
+++ b/drivers/gpu/drm/nouveau/include/nvif/client.h
@@ -4,36 +4,24 @@
4#include <nvif/object.h> 4#include <nvif/object.h>
5 5
6struct nvif_client { 6struct nvif_client {
7 struct nvif_object base; 7 struct nvif_object object;
8 struct nvif_object *object; /*XXX: hack for nvif_object() */
9 const struct nvif_driver *driver; 8 const struct nvif_driver *driver;
9 u8 route;
10 bool super; 10 bool super;
11}; 11};
12 12
13static inline struct nvif_client * 13int nvif_client_init(const char *drv, const char *name, u64 device,
14nvif_client(struct nvif_object *object) 14 const char *cfg, const char *dbg,
15{
16 while (object && object->parent != object)
17 object = object->parent;
18 return (void *)object;
19}
20
21int nvif_client_init(void (*dtor)(struct nvif_client *), const char *,
22 const char *, u64, const char *, const char *,
23 struct nvif_client *); 15 struct nvif_client *);
24void nvif_client_fini(struct nvif_client *); 16void nvif_client_fini(struct nvif_client *);
25int nvif_client_new(const char *, const char *, u64, const char *,
26 const char *, struct nvif_client **);
27void nvif_client_ref(struct nvif_client *, struct nvif_client **);
28int nvif_client_ioctl(struct nvif_client *, void *, u32); 17int nvif_client_ioctl(struct nvif_client *, void *, u32);
29int nvif_client_suspend(struct nvif_client *); 18int nvif_client_suspend(struct nvif_client *);
30int nvif_client_resume(struct nvif_client *); 19int nvif_client_resume(struct nvif_client *);
31 20
32/*XXX*/ 21/*XXX*/
33#include <core/client.h> 22#include <core/client.h>
34#define nvxx_client(a) ({ \ 23#define nvxx_client(a) ({ \
35 struct nvif_client *_client = nvif_client(nvif_object(a)); \ 24 struct nvif_client *_client = (a); \
36 nvkm_client(_client->base.priv); \ 25 nvkm_client(_client->object.priv); \
37}) 26})
38
39#endif 27#endif
diff --git a/drivers/gpu/drm/nouveau/include/nvif/device.h b/drivers/gpu/drm/nouveau/include/nvif/device.h
index 077651f9b7e9..1973e65f21a6 100644
--- a/drivers/gpu/drm/nouveau/include/nvif/device.h
+++ b/drivers/gpu/drm/nouveau/include/nvif/device.h
@@ -5,26 +5,13 @@
5#include <nvif/class.h> 5#include <nvif/class.h>
6 6
7struct nvif_device { 7struct nvif_device {
8 struct nvif_object base; 8 struct nvif_object object;
9 struct nvif_object *object; /*XXX: hack for nvif_object() */
10 struct nv_device_info_v0 info; 9 struct nv_device_info_v0 info;
11}; 10};
12 11
13static inline struct nvif_device * 12int nvif_device_init(struct nvif_object *, u32 handle, u32 oclass, void *, u32,
14nvif_device(struct nvif_object *object)
15{
16 while (object && object->oclass != 0x0080 /*XXX: NV_DEVICE_CLASS*/ )
17 object = object->parent;
18 return (void *)object;
19}
20
21int nvif_device_init(struct nvif_object *, void (*dtor)(struct nvif_device *),
22 u32 handle, u32 oclass, void *, u32,
23 struct nvif_device *); 13 struct nvif_device *);
24void nvif_device_fini(struct nvif_device *); 14void nvif_device_fini(struct nvif_device *);
25int nvif_device_new(struct nvif_object *, u32 handle, u32 oclass,
26 void *, u32, struct nvif_device **);
27void nvif_device_ref(struct nvif_device *, struct nvif_device **);
28u64 nvif_device_time(struct nvif_device *); 15u64 nvif_device_time(struct nvif_device *);
29 16
30/* Delay based on GPU time (ie. PTIMER). 17/* Delay based on GPU time (ie. PTIMER).
@@ -59,7 +46,10 @@ u64 nvif_device_time(struct nvif_device *);
59#include <subdev/timer.h> 46#include <subdev/timer.h>
60#include <subdev/therm.h> 47#include <subdev/therm.h>
61 48
62#define nvxx_device(a) nv_device(nvxx_object((a))) 49#define nvxx_device(a) ({ \
50 struct nvif_device *_device = (a); \
51 nv_device(_device->object.priv); \
52})
63#define nvxx_bios(a) nvkm_bios(nvxx_device(a)) 53#define nvxx_bios(a) nvkm_bios(nvxx_device(a))
64#define nvxx_fb(a) nvkm_fb(nvxx_device(a)) 54#define nvxx_fb(a) nvkm_fb(nvxx_device(a))
65#define nvxx_mmu(a) nvkm_mmu(nvxx_device(a)) 55#define nvxx_mmu(a) nvkm_mmu(nvxx_device(a))
@@ -77,5 +67,5 @@ u64 nvif_device_time(struct nvif_device *);
77 67
78#define nvxx_fifo(a) nvkm_fifo(nvxx_device(a)) 68#define nvxx_fifo(a) nvkm_fifo(nvxx_device(a))
79#define nvxx_fifo_chan(a) ((struct nvkm_fifo_chan *)nvxx_object(a)) 69#define nvxx_fifo_chan(a) ((struct nvkm_fifo_chan *)nvxx_object(a))
80#define nvxx_gr(a) ((struct nvkm_gr *)nvkm_engine(nvxx_object(a), NVDEV_ENGINE_GR)) 70#define nvxx_gr(a) nvkm_gr(nvxx_device(a))
81#endif 71#endif
diff --git a/drivers/gpu/drm/nouveau/include/nvif/notify.h b/drivers/gpu/drm/nouveau/include/nvif/notify.h
index 9ebfa3b45e76..51e2eb580809 100644
--- a/drivers/gpu/drm/nouveau/include/nvif/notify.h
+++ b/drivers/gpu/drm/nouveau/include/nvif/notify.h
@@ -23,17 +23,11 @@ struct nvif_notify {
23 struct work_struct work; 23 struct work_struct work;
24}; 24};
25 25
26int nvif_notify_init(struct nvif_object *, void (*dtor)(struct nvif_notify *), 26int nvif_notify_init(struct nvif_object *, int (*func)(struct nvif_notify *),
27 int (*func)(struct nvif_notify *), bool work, u8 type, 27 bool work, u8 type, void *data, u32 size, u32 reply,
28 void *data, u32 size, u32 reply, struct nvif_notify *); 28 struct nvif_notify *);
29int nvif_notify_fini(struct nvif_notify *); 29int nvif_notify_fini(struct nvif_notify *);
30int nvif_notify_get(struct nvif_notify *); 30int nvif_notify_get(struct nvif_notify *);
31int nvif_notify_put(struct nvif_notify *); 31int nvif_notify_put(struct nvif_notify *);
32int nvif_notify(const void *, u32, const void *, u32); 32int nvif_notify(const void *, u32, const void *, u32);
33
34int nvif_notify_new(struct nvif_object *, int (*func)(struct nvif_notify *),
35 bool work, u8 type, void *data, u32 size, u32 reply,
36 struct nvif_notify **);
37void nvif_notify_ref(struct nvif_notify *, struct nvif_notify **);
38
39#endif 33#endif
diff --git a/drivers/gpu/drm/nouveau/include/nvif/object.h b/drivers/gpu/drm/nouveau/include/nvif/object.h
index 04c874707b96..66d94c74b351 100644
--- a/drivers/gpu/drm/nouveau/include/nvif/object.h
+++ b/drivers/gpu/drm/nouveau/include/nvif/object.h
@@ -4,28 +4,20 @@
4#include <nvif/os.h> 4#include <nvif/os.h>
5 5
6struct nvif_object { 6struct nvif_object {
7 struct nvif_client *client;
7 struct nvif_object *parent; 8 struct nvif_object *parent;
8 struct nvif_object *object; /*XXX: hack for nvif_object() */
9 struct kref refcount;
10 u32 handle; 9 u32 handle;
11 u32 oclass; 10 u32 oclass;
12 void *data;
13 u32 size;
14 void *priv; /*XXX: hack */ 11 void *priv; /*XXX: hack */
15 void (*dtor)(struct nvif_object *);
16 struct { 12 struct {
17 void __iomem *ptr; 13 void __iomem *ptr;
18 u32 size; 14 u32 size;
19 } map; 15 } map;
20}; 16};
21 17
22int nvif_object_init(struct nvif_object *, void (*dtor)(struct nvif_object *), 18int nvif_object_init(struct nvif_object *, u32 handle, u32 oclass, void *, u32,
23 u32 handle, u32 oclass, void *, u32,
24 struct nvif_object *); 19 struct nvif_object *);
25void nvif_object_fini(struct nvif_object *); 20void nvif_object_fini(struct nvif_object *);
26int nvif_object_new(struct nvif_object *, u32 handle, u32 oclass,
27 void *, u32, struct nvif_object **);
28void nvif_object_ref(struct nvif_object *, struct nvif_object **);
29int nvif_object_ioctl(struct nvif_object *, void *, u32, void **); 21int nvif_object_ioctl(struct nvif_object *, void *, u32, void **);
30int nvif_object_sclass(struct nvif_object *, u32 *, int); 22int nvif_object_sclass(struct nvif_object *, u32 *, int);
31u32 nvif_object_rd(struct nvif_object *, int, u64); 23u32 nvif_object_rd(struct nvif_object *, int, u64);
@@ -36,40 +28,41 @@ void nvif_object_unmap(struct nvif_object *);
36 28
37#define nvif_object(a) (a)->object 29#define nvif_object(a) (a)->object
38 30
39#define ioread8_native ioread8 31#define nvif_rd(a,f,b,c) ({ \
40#define iowrite8_native iowrite8 32 struct nvif_object *_object = (a); \
41#define nvif_rd(a,b,c) ({ \
42 struct nvif_object *_object = nvif_object(a); \
43 u32 _data; \ 33 u32 _data; \
44 if (likely(_object->map.ptr)) \ 34 if (likely(_object->map.ptr)) \
45 _data = ioread##b##_native((u8 __iomem *)_object->map.ptr + (c)); \ 35 _data = f((u8 __iomem *)_object->map.ptr + (c)); \
46 else \ 36 else \
47 _data = nvif_object_rd(_object, (b) / 8, (c)); \ 37 _data = nvif_object_rd(_object, (b), (c)); \
48 _data; \ 38 _data; \
49}) 39})
50#define nvif_wr(a,b,c,d) ({ \ 40#define nvif_wr(a,f,b,c,d) ({ \
51 struct nvif_object *_object = nvif_object(a); \ 41 struct nvif_object *_object = (a); \
52 if (likely(_object->map.ptr)) \ 42 if (likely(_object->map.ptr)) \
53 iowrite##b##_native((d), (u8 __iomem *)_object->map.ptr + (c)); \ 43 f((d), (u8 __iomem *)_object->map.ptr + (c)); \
54 else \ 44 else \
55 nvif_object_wr(_object, (b) / 8, (c), (d)); \ 45 nvif_object_wr(_object, (b), (c), (d)); \
56}) 46})
57#define nvif_rd08(a,b) ({ u8 _v = nvif_rd((a), 8, (b)); _v; }) 47#define nvif_rd08(a,b) ({ ((u8)nvif_rd((a), ioread8, 1, (b))); })
58#define nvif_rd16(a,b) ({ u16 _v = nvif_rd((a), 16, (b)); _v; }) 48#define nvif_rd16(a,b) ({ ((u16)nvif_rd((a), ioread16_native, 2, (b))); })
59#define nvif_rd32(a,b) ({ u32 _v = nvif_rd((a), 32, (b)); _v; }) 49#define nvif_rd32(a,b) ({ ((u32)nvif_rd((a), ioread32_native, 4, (b))); })
60#define nvif_wr08(a,b,c) nvif_wr((a), 8, (b), (u8)(c)) 50#define nvif_wr08(a,b,c) nvif_wr((a), iowrite8, 1, (b), (u8)(c))
61#define nvif_wr16(a,b,c) nvif_wr((a), 16, (b), (u16)(c)) 51#define nvif_wr16(a,b,c) nvif_wr((a), iowrite16_native, 2, (b), (u16)(c))
62#define nvif_wr32(a,b,c) nvif_wr((a), 32, (b), (u32)(c)) 52#define nvif_wr32(a,b,c) nvif_wr((a), iowrite32_native, 4, (b), (u32)(c))
63#define nvif_mask(a,b,c,d) ({ \ 53#define nvif_mask(a,b,c,d) ({ \
64 u32 _v = nvif_rd32(nvif_object(a), (b)); \ 54 struct nvif_object *__object = (a); \
65 nvif_wr32(nvif_object(a), (b), (_v & ~(c)) | (d)); \ 55 u32 _addr = (b), _data = nvif_rd32(__object, _addr); \
66 _v; \ 56 nvif_wr32(__object, _addr, (_data & ~(c)) | (d)); \
57 _data; \
67}) 58})
68 59
69#define nvif_mthd(a,b,c,d) nvif_object_mthd(nvif_object(a), (b), (c), (d)) 60#define nvif_mthd(a,b,c,d) nvif_object_mthd((a), (b), (c), (d))
70 61
71/*XXX*/ 62/*XXX*/
72#include <core/object.h> 63#include <core/object.h>
73#define nvxx_object(a) ((struct nvkm_object *)nvif_object(a)->priv) 64#define nvxx_object(a) ({ \
74 65 struct nvif_object *_object = (a); \
66 (struct nvkm_object *)_object->priv; \
67})
75#endif 68#endif
diff --git a/drivers/gpu/drm/nouveau/nouveau_abi16.c b/drivers/gpu/drm/nouveau/nouveau_abi16.c
index 01ffdb37a66b..76c363223e3f 100644
--- a/drivers/gpu/drm/nouveau/nouveau_abi16.c
+++ b/drivers/gpu/drm/nouveau/nouveau_abi16.c
@@ -51,7 +51,7 @@ nouveau_abi16_get(struct drm_file *file_priv, struct drm_device *dev)
51 * device (ie. the one that belongs to the fd it 51 * device (ie. the one that belongs to the fd it
52 * opened) 52 * opened)
53 */ 53 */
54 if (nvif_device_init(&cli->base.base, NULL, 54 if (nvif_device_init(&cli->base.object,
55 NOUVEAU_ABI16_DEVICE, NV_DEVICE, 55 NOUVEAU_ABI16_DEVICE, NV_DEVICE,
56 &args, sizeof(args), 56 &args, sizeof(args),
57 &abi16->device) == 0) 57 &abi16->device) == 0)
@@ -69,7 +69,7 @@ nouveau_abi16_get(struct drm_file *file_priv, struct drm_device *dev)
69int 69int
70nouveau_abi16_put(struct nouveau_abi16 *abi16, int ret) 70nouveau_abi16_put(struct nouveau_abi16 *abi16, int ret)
71{ 71{
72 struct nouveau_cli *cli = (void *)nvif_client(&abi16->device.base); 72 struct nouveau_cli *cli = (void *)abi16->device.object.client;
73 mutex_unlock(&cli->mutex); 73 mutex_unlock(&cli->mutex);
74 return ret; 74 return ret;
75} 75}
@@ -100,6 +100,7 @@ static void
100nouveau_abi16_ntfy_fini(struct nouveau_abi16_chan *chan, 100nouveau_abi16_ntfy_fini(struct nouveau_abi16_chan *chan,
101 struct nouveau_abi16_ntfy *ntfy) 101 struct nouveau_abi16_ntfy *ntfy)
102{ 102{
103 nvif_object_fini(&ntfy->object);
103 nvkm_mm_free(&chan->heap, &ntfy->node); 104 nvkm_mm_free(&chan->heap, &ntfy->node);
104 list_del(&ntfy->head); 105 list_del(&ntfy->head);
105 kfree(ntfy); 106 kfree(ntfy);
@@ -132,7 +133,7 @@ nouveau_abi16_chan_fini(struct nouveau_abi16 *abi16,
132 133
133 /* destroy channel object, all children will be killed too */ 134 /* destroy channel object, all children will be killed too */
134 if (chan->chan) { 135 if (chan->chan) {
135 abi16->handles &= ~(1ULL << (chan->chan->object->handle & 0xffff)); 136 abi16->handles &= ~(1ULL << (chan->chan->user.handle & 0xffff));
136 nouveau_channel_del(&chan->chan); 137 nouveau_channel_del(&chan->chan);
137 } 138 }
138 139
@@ -143,7 +144,7 @@ nouveau_abi16_chan_fini(struct nouveau_abi16 *abi16,
143void 144void
144nouveau_abi16_fini(struct nouveau_abi16 *abi16) 145nouveau_abi16_fini(struct nouveau_abi16 *abi16)
145{ 146{
146 struct nouveau_cli *cli = (void *)nvif_client(&abi16->device.base); 147 struct nouveau_cli *cli = (void *)abi16->device.object.client;
147 struct nouveau_abi16_chan *chan, *temp; 148 struct nouveau_abi16_chan *chan, *temp;
148 149
149 /* cleanup channels */ 150 /* cleanup channels */
@@ -336,7 +337,7 @@ nouveau_abi16_chan(struct nouveau_abi16 *abi16, int channel)
336 struct nouveau_abi16_chan *chan; 337 struct nouveau_abi16_chan *chan;
337 338
338 list_for_each_entry(chan, &abi16->channels, head) { 339 list_for_each_entry(chan, &abi16->channels, head) {
339 if (chan->chan->object->handle == NOUVEAU_ABI16_CHAN(channel)) 340 if (chan->chan->user.handle == NOUVEAU_ABI16_CHAN(channel))
340 return chan; 341 return chan;
341 } 342 }
342 343
@@ -364,21 +365,9 @@ int
364nouveau_abi16_ioctl_grobj_alloc(ABI16_IOCTL_ARGS) 365nouveau_abi16_ioctl_grobj_alloc(ABI16_IOCTL_ARGS)
365{ 366{
366 struct drm_nouveau_grobj_alloc *init = data; 367 struct drm_nouveau_grobj_alloc *init = data;
367 struct {
368 struct nvif_ioctl_v0 ioctl;
369 struct nvif_ioctl_new_v0 new;
370 } args = {
371 .ioctl.owner = NVIF_IOCTL_V0_OWNER_ANY,
372 .ioctl.type = NVIF_IOCTL_V0_NEW,
373 .ioctl.path_nr = 3,
374 .ioctl.path[2] = NOUVEAU_ABI16_CLIENT,
375 .ioctl.path[1] = NOUVEAU_ABI16_DEVICE,
376 .ioctl.path[0] = NOUVEAU_ABI16_CHAN(init->channel),
377 .new.route = NVDRM_OBJECT_ABI16,
378 .new.handle = init->handle,
379 .new.oclass = init->class,
380 };
381 struct nouveau_abi16 *abi16 = nouveau_abi16_get(file_priv, dev); 368 struct nouveau_abi16 *abi16 = nouveau_abi16_get(file_priv, dev);
369 struct nouveau_abi16_chan *chan;
370 struct nouveau_abi16_ntfy *ntfy;
382 struct nouveau_drm *drm = nouveau_drm(dev); 371 struct nouveau_drm *drm = nouveau_drm(dev);
383 struct nvif_client *client; 372 struct nvif_client *client;
384 int ret; 373 int ret;
@@ -388,7 +377,7 @@ nouveau_abi16_ioctl_grobj_alloc(ABI16_IOCTL_ARGS)
388 377
389 if (init->handle == ~0) 378 if (init->handle == ~0)
390 return nouveau_abi16_put(abi16, -EINVAL); 379 return nouveau_abi16_put(abi16, -EINVAL);
391 client = nvif_client(nvif_object(&abi16->device)); 380 client = abi16->device.object.client;
392 381
393 /* compatibility with userspace that assumes 506e for all chipsets */ 382 /* compatibility with userspace that assumes 506e for all chipsets */
394 if (init->class == 0x506e) { 383 if (init->class == 0x506e) {
@@ -397,7 +386,23 @@ nouveau_abi16_ioctl_grobj_alloc(ABI16_IOCTL_ARGS)
397 return nouveau_abi16_put(abi16, 0); 386 return nouveau_abi16_put(abi16, 0);
398 } 387 }
399 388
400 ret = nvif_client_ioctl(client, &args, sizeof(args)); 389 chan = nouveau_abi16_chan(abi16, init->channel);
390 if (!chan)
391 return nouveau_abi16_put(abi16, -ENOENT);
392
393 ntfy = kzalloc(sizeof(*ntfy), GFP_KERNEL);
394 if (!ntfy)
395 return nouveau_abi16_put(abi16, -ENOMEM);
396
397 list_add(&ntfy->head, &chan->notifiers);
398
399 client->route = NVDRM_OBJECT_ABI16;
400 ret = nvif_object_init(&chan->chan->user, init->handle, init->class,
401 NULL, 0, &ntfy->object);
402 client->route = NVDRM_OBJECT_NVIF;
403
404 if (ret)
405 nouveau_abi16_ntfy_fini(chan, ntfy);
401 return nouveau_abi16_put(abi16, ret); 406 return nouveau_abi16_put(abi16, ret);
402} 407}
403 408
@@ -405,27 +410,13 @@ int
405nouveau_abi16_ioctl_notifierobj_alloc(ABI16_IOCTL_ARGS) 410nouveau_abi16_ioctl_notifierobj_alloc(ABI16_IOCTL_ARGS)
406{ 411{
407 struct drm_nouveau_notifierobj_alloc *info = data; 412 struct drm_nouveau_notifierobj_alloc *info = data;
408 struct {
409 struct nvif_ioctl_v0 ioctl;
410 struct nvif_ioctl_new_v0 new;
411 struct nv_dma_v0 ctxdma;
412 } args = {
413 .ioctl.owner = NVIF_IOCTL_V0_OWNER_ANY,
414 .ioctl.type = NVIF_IOCTL_V0_NEW,
415 .ioctl.path_nr = 3,
416 .ioctl.path[2] = NOUVEAU_ABI16_CLIENT,
417 .ioctl.path[1] = NOUVEAU_ABI16_DEVICE,
418 .ioctl.path[0] = NOUVEAU_ABI16_CHAN(info->channel),
419 .new.route = NVDRM_OBJECT_ABI16,
420 .new.handle = info->handle,
421 .new.oclass = NV_DMA_IN_MEMORY,
422 };
423 struct nouveau_drm *drm = nouveau_drm(dev); 413 struct nouveau_drm *drm = nouveau_drm(dev);
424 struct nouveau_abi16 *abi16 = nouveau_abi16_get(file_priv, dev); 414 struct nouveau_abi16 *abi16 = nouveau_abi16_get(file_priv, dev);
425 struct nouveau_abi16_chan *chan; 415 struct nouveau_abi16_chan *chan;
426 struct nouveau_abi16_ntfy *ntfy; 416 struct nouveau_abi16_ntfy *ntfy;
427 struct nvif_device *device = &abi16->device; 417 struct nvif_device *device = &abi16->device;
428 struct nvif_client *client; 418 struct nvif_client *client;
419 struct nv_dma_v0 args = {};
429 int ret; 420 int ret;
430 421
431 if (unlikely(!abi16)) 422 if (unlikely(!abi16))
@@ -434,7 +425,7 @@ nouveau_abi16_ioctl_notifierobj_alloc(ABI16_IOCTL_ARGS)
434 /* completely unnecessary for these chipsets... */ 425 /* completely unnecessary for these chipsets... */
435 if (unlikely(device->info.family >= NV_DEVICE_INFO_V0_FERMI)) 426 if (unlikely(device->info.family >= NV_DEVICE_INFO_V0_FERMI))
436 return nouveau_abi16_put(abi16, -EINVAL); 427 return nouveau_abi16_put(abi16, -EINVAL);
437 client = nvif_client(nvif_object(&abi16->device)); 428 client = abi16->device.object.client;
438 429
439 chan = nouveau_abi16_chan(abi16, info->channel); 430 chan = nouveau_abi16_chan(abi16, info->channel);
440 if (!chan) 431 if (!chan)
@@ -445,41 +436,43 @@ nouveau_abi16_ioctl_notifierobj_alloc(ABI16_IOCTL_ARGS)
445 return nouveau_abi16_put(abi16, -ENOMEM); 436 return nouveau_abi16_put(abi16, -ENOMEM);
446 437
447 list_add(&ntfy->head, &chan->notifiers); 438 list_add(&ntfy->head, &chan->notifiers);
448 ntfy->handle = info->handle;
449 439
450 ret = nvkm_mm_head(&chan->heap, 0, 1, info->size, info->size, 1, 440 ret = nvkm_mm_head(&chan->heap, 0, 1, info->size, info->size, 1,
451 &ntfy->node); 441 &ntfy->node);
452 if (ret) 442 if (ret)
453 goto done; 443 goto done;
454 444
455 args.ctxdma.start = ntfy->node->offset; 445 args.start = ntfy->node->offset;
456 args.ctxdma.limit = ntfy->node->offset + ntfy->node->length - 1; 446 args.limit = ntfy->node->offset + ntfy->node->length - 1;
457 if (device->info.family >= NV_DEVICE_INFO_V0_TESLA) { 447 if (device->info.family >= NV_DEVICE_INFO_V0_TESLA) {
458 args.ctxdma.target = NV_DMA_V0_TARGET_VM; 448 args.target = NV_DMA_V0_TARGET_VM;
459 args.ctxdma.access = NV_DMA_V0_ACCESS_VM; 449 args.access = NV_DMA_V0_ACCESS_VM;
460 args.ctxdma.start += chan->ntfy_vma.offset; 450 args.start += chan->ntfy_vma.offset;
461 args.ctxdma.limit += chan->ntfy_vma.offset; 451 args.limit += chan->ntfy_vma.offset;
462 } else 452 } else
463 if (drm->agp.stat == ENABLED) { 453 if (drm->agp.stat == ENABLED) {
464 args.ctxdma.target = NV_DMA_V0_TARGET_AGP; 454 args.target = NV_DMA_V0_TARGET_AGP;
465 args.ctxdma.access = NV_DMA_V0_ACCESS_RDWR; 455 args.access = NV_DMA_V0_ACCESS_RDWR;
466 args.ctxdma.start += drm->agp.base + chan->ntfy->bo.offset; 456 args.start += drm->agp.base + chan->ntfy->bo.offset;
467 args.ctxdma.limit += drm->agp.base + chan->ntfy->bo.offset; 457 args.limit += drm->agp.base + chan->ntfy->bo.offset;
468 client->super = true;
469 } else { 458 } else {
470 args.ctxdma.target = NV_DMA_V0_TARGET_VM; 459 args.target = NV_DMA_V0_TARGET_VM;
471 args.ctxdma.access = NV_DMA_V0_ACCESS_RDWR; 460 args.access = NV_DMA_V0_ACCESS_RDWR;
472 args.ctxdma.start += chan->ntfy->bo.offset; 461 args.start += chan->ntfy->bo.offset;
473 args.ctxdma.limit += chan->ntfy->bo.offset; 462 args.limit += chan->ntfy->bo.offset;
474 } 463 }
475 464
476 ret = nvif_client_ioctl(client, &args, sizeof(args)); 465 client->route = NVDRM_OBJECT_ABI16;
466 client->super = true;
467 ret = nvif_object_init(&chan->chan->user, info->handle,
468 NV_DMA_IN_MEMORY, &args, sizeof(args),
469 &ntfy->object);
477 client->super = false; 470 client->super = false;
471 client->route = NVDRM_OBJECT_NVIF;
478 if (ret) 472 if (ret)
479 goto done; 473 goto done;
480 474
481 info->offset = ntfy->node->offset; 475 info->offset = ntfy->node->offset;
482
483done: 476done:
484 if (ret) 477 if (ret)
485 nouveau_abi16_ntfy_fini(chan, ntfy); 478 nouveau_abi16_ntfy_fini(chan, ntfy);
@@ -490,47 +483,28 @@ int
490nouveau_abi16_ioctl_gpuobj_free(ABI16_IOCTL_ARGS) 483nouveau_abi16_ioctl_gpuobj_free(ABI16_IOCTL_ARGS)
491{ 484{
492 struct drm_nouveau_gpuobj_free *fini = data; 485 struct drm_nouveau_gpuobj_free *fini = data;
493 struct {
494 struct nvif_ioctl_v0 ioctl;
495 struct nvif_ioctl_del del;
496 } args = {
497 .ioctl.owner = NVDRM_OBJECT_ABI16,
498 .ioctl.type = NVIF_IOCTL_V0_DEL,
499 .ioctl.path_nr = 4,
500 .ioctl.path[3] = NOUVEAU_ABI16_CLIENT,
501 .ioctl.path[2] = NOUVEAU_ABI16_DEVICE,
502 .ioctl.path[1] = NOUVEAU_ABI16_CHAN(fini->channel),
503 .ioctl.path[0] = fini->handle,
504 };
505 struct nouveau_abi16 *abi16 = nouveau_abi16_get(file_priv, dev); 486 struct nouveau_abi16 *abi16 = nouveau_abi16_get(file_priv, dev);
506 struct nouveau_abi16_chan *chan; 487 struct nouveau_abi16_chan *chan;
507 struct nouveau_abi16_ntfy *ntfy; 488 struct nouveau_abi16_ntfy *ntfy;
508 struct nvif_client *client; 489 int ret = -ENOENT;
509 int ret;
510 490
511 if (unlikely(!abi16)) 491 if (unlikely(!abi16))
512 return -ENOMEM; 492 return -ENOMEM;
513 493
514 chan = nouveau_abi16_chan(abi16, fini->channel); 494 chan = nouveau_abi16_chan(abi16, fini->channel);
515 if (!chan) 495 if (!chan)
516 return nouveau_abi16_put(abi16, -ENOENT); 496 return nouveau_abi16_put(abi16, -EINVAL);
517 client = nvif_client(nvif_object(&abi16->device));
518 497
519 /* synchronize with the user channel and destroy the gpu object */ 498 /* synchronize with the user channel and destroy the gpu object */
520 nouveau_channel_idle(chan->chan); 499 nouveau_channel_idle(chan->chan);
521 500
522 ret = nvif_client_ioctl(client, &args, sizeof(args));
523 if (ret)
524 return nouveau_abi16_put(abi16, ret);
525
526 /* cleanup extra state if this object was a notifier */
527 list_for_each_entry(ntfy, &chan->notifiers, head) { 501 list_for_each_entry(ntfy, &chan->notifiers, head) {
528 if (ntfy->handle == fini->handle) { 502 if (ntfy->object.handle == fini->handle) {
529 nvkm_mm_free(&chan->heap, &ntfy->node); 503 nouveau_abi16_ntfy_fini(chan, ntfy);
530 list_del(&ntfy->head); 504 ret = 0;
531 break; 505 break;
532 } 506 }
533 } 507 }
534 508
535 return nouveau_abi16_put(abi16, 0); 509 return nouveau_abi16_put(abi16, ret);
536} 510}
diff --git a/drivers/gpu/drm/nouveau/nouveau_abi16.h b/drivers/gpu/drm/nouveau/nouveau_abi16.h
index 86eb1caf4957..b8acfd787d54 100644
--- a/drivers/gpu/drm/nouveau/nouveau_abi16.h
+++ b/drivers/gpu/drm/nouveau/nouveau_abi16.h
@@ -13,9 +13,9 @@ int nouveau_abi16_ioctl_notifierobj_alloc(ABI16_IOCTL_ARGS);
13int nouveau_abi16_ioctl_gpuobj_free(ABI16_IOCTL_ARGS); 13int nouveau_abi16_ioctl_gpuobj_free(ABI16_IOCTL_ARGS);
14 14
15struct nouveau_abi16_ntfy { 15struct nouveau_abi16_ntfy {
16 struct nvif_object object;
16 struct list_head head; 17 struct list_head head;
17 struct nvkm_mm_node *node; 18 struct nvkm_mm_node *node;
18 u32 handle;
19}; 19};
20 20
21struct nouveau_abi16_chan { 21struct nouveau_abi16_chan {
diff --git a/drivers/gpu/drm/nouveau/nouveau_agp.c b/drivers/gpu/drm/nouveau/nouveau_agp.c
index 0b5970955604..320f48c41fe0 100644
--- a/drivers/gpu/drm/nouveau/nouveau_agp.c
+++ b/drivers/gpu/drm/nouveau/nouveau_agp.c
@@ -102,7 +102,7 @@ void
102nouveau_agp_reset(struct nouveau_drm *drm) 102nouveau_agp_reset(struct nouveau_drm *drm)
103{ 103{
104#if __OS_HAS_AGP 104#if __OS_HAS_AGP
105 struct nvif_device *device = &drm->device; 105 struct nvif_object *device = &drm->device.object;
106 struct drm_device *dev = drm->dev; 106 struct drm_device *dev = drm->dev;
107 u32 save[2]; 107 u32 save[2];
108 int ret; 108 int ret;
diff --git a/drivers/gpu/drm/nouveau/nouveau_backlight.c b/drivers/gpu/drm/nouveau/nouveau_backlight.c
index e566c5b53651..89eb46040b13 100644
--- a/drivers/gpu/drm/nouveau/nouveau_backlight.c
+++ b/drivers/gpu/drm/nouveau/nouveau_backlight.c
@@ -40,7 +40,7 @@ static int
40nv40_get_intensity(struct backlight_device *bd) 40nv40_get_intensity(struct backlight_device *bd)
41{ 41{
42 struct nouveau_drm *drm = bl_get_data(bd); 42 struct nouveau_drm *drm = bl_get_data(bd);
43 struct nvif_device *device = &drm->device; 43 struct nvif_object *device = &drm->device.object;
44 int val = (nvif_rd32(device, NV40_PMC_BACKLIGHT) & 44 int val = (nvif_rd32(device, NV40_PMC_BACKLIGHT) &
45 NV40_PMC_BACKLIGHT_MASK) >> 16; 45 NV40_PMC_BACKLIGHT_MASK) >> 16;
46 46
@@ -51,7 +51,7 @@ static int
51nv40_set_intensity(struct backlight_device *bd) 51nv40_set_intensity(struct backlight_device *bd)
52{ 52{
53 struct nouveau_drm *drm = bl_get_data(bd); 53 struct nouveau_drm *drm = bl_get_data(bd);
54 struct nvif_device *device = &drm->device; 54 struct nvif_object *device = &drm->device.object;
55 int val = bd->props.brightness; 55 int val = bd->props.brightness;
56 int reg = nvif_rd32(device, NV40_PMC_BACKLIGHT); 56 int reg = nvif_rd32(device, NV40_PMC_BACKLIGHT);
57 57
@@ -71,7 +71,7 @@ static int
71nv40_backlight_init(struct drm_connector *connector) 71nv40_backlight_init(struct drm_connector *connector)
72{ 72{
73 struct nouveau_drm *drm = nouveau_drm(connector->dev); 73 struct nouveau_drm *drm = nouveau_drm(connector->dev);
74 struct nvif_device *device = &drm->device; 74 struct nvif_object *device = &drm->device.object;
75 struct backlight_properties props; 75 struct backlight_properties props;
76 struct backlight_device *bd; 76 struct backlight_device *bd;
77 77
@@ -97,7 +97,7 @@ nv50_get_intensity(struct backlight_device *bd)
97{ 97{
98 struct nouveau_encoder *nv_encoder = bl_get_data(bd); 98 struct nouveau_encoder *nv_encoder = bl_get_data(bd);
99 struct nouveau_drm *drm = nouveau_drm(nv_encoder->base.base.dev); 99 struct nouveau_drm *drm = nouveau_drm(nv_encoder->base.base.dev);
100 struct nvif_device *device = &drm->device; 100 struct nvif_object *device = &drm->device.object;
101 int or = nv_encoder->or; 101 int or = nv_encoder->or;
102 u32 div = 1025; 102 u32 div = 1025;
103 u32 val; 103 u32 val;
@@ -112,7 +112,7 @@ nv50_set_intensity(struct backlight_device *bd)
112{ 112{
113 struct nouveau_encoder *nv_encoder = bl_get_data(bd); 113 struct nouveau_encoder *nv_encoder = bl_get_data(bd);
114 struct nouveau_drm *drm = nouveau_drm(nv_encoder->base.base.dev); 114 struct nouveau_drm *drm = nouveau_drm(nv_encoder->base.base.dev);
115 struct nvif_device *device = &drm->device; 115 struct nvif_object *device = &drm->device.object;
116 int or = nv_encoder->or; 116 int or = nv_encoder->or;
117 u32 div = 1025; 117 u32 div = 1025;
118 u32 val = (bd->props.brightness * div) / 100; 118 u32 val = (bd->props.brightness * div) / 100;
@@ -133,7 +133,7 @@ nva3_get_intensity(struct backlight_device *bd)
133{ 133{
134 struct nouveau_encoder *nv_encoder = bl_get_data(bd); 134 struct nouveau_encoder *nv_encoder = bl_get_data(bd);
135 struct nouveau_drm *drm = nouveau_drm(nv_encoder->base.base.dev); 135 struct nouveau_drm *drm = nouveau_drm(nv_encoder->base.base.dev);
136 struct nvif_device *device = &drm->device; 136 struct nvif_object *device = &drm->device.object;
137 int or = nv_encoder->or; 137 int or = nv_encoder->or;
138 u32 div, val; 138 u32 div, val;
139 139
@@ -151,7 +151,7 @@ nva3_set_intensity(struct backlight_device *bd)
151{ 151{
152 struct nouveau_encoder *nv_encoder = bl_get_data(bd); 152 struct nouveau_encoder *nv_encoder = bl_get_data(bd);
153 struct nouveau_drm *drm = nouveau_drm(nv_encoder->base.base.dev); 153 struct nouveau_drm *drm = nouveau_drm(nv_encoder->base.base.dev);
154 struct nvif_device *device = &drm->device; 154 struct nvif_object *device = &drm->device.object;
155 int or = nv_encoder->or; 155 int or = nv_encoder->or;
156 u32 div, val; 156 u32 div, val;
157 157
@@ -177,7 +177,7 @@ static int
177nv50_backlight_init(struct drm_connector *connector) 177nv50_backlight_init(struct drm_connector *connector)
178{ 178{
179 struct nouveau_drm *drm = nouveau_drm(connector->dev); 179 struct nouveau_drm *drm = nouveau_drm(connector->dev);
180 struct nvif_device *device = &drm->device; 180 struct nvif_object *device = &drm->device.object;
181 struct nouveau_encoder *nv_encoder; 181 struct nouveau_encoder *nv_encoder;
182 struct backlight_properties props; 182 struct backlight_properties props;
183 struct backlight_device *bd; 183 struct backlight_device *bd;
@@ -193,9 +193,9 @@ nv50_backlight_init(struct drm_connector *connector)
193 if (!nvif_rd32(device, NV50_PDISP_SOR_PWM_CTL(nv_encoder->or))) 193 if (!nvif_rd32(device, NV50_PDISP_SOR_PWM_CTL(nv_encoder->or)))
194 return 0; 194 return 0;
195 195
196 if (device->info.chipset <= 0xa0 || 196 if (drm->device.info.chipset <= 0xa0 ||
197 device->info.chipset == 0xaa || 197 drm->device.info.chipset == 0xaa ||
198 device->info.chipset == 0xac) 198 drm->device.info.chipset == 0xac)
199 ops = &nv50_bl_ops; 199 ops = &nv50_bl_ops;
200 else 200 else
201 ops = &nva3_bl_ops; 201 ops = &nva3_bl_ops;
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c
index 3199479ac5b3..4dca65a63b92 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bios.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bios.c
@@ -215,7 +215,7 @@ int call_lvds_script(struct drm_device *dev, struct dcb_output *dcbent, int head
215 */ 215 */
216 216
217 struct nouveau_drm *drm = nouveau_drm(dev); 217 struct nouveau_drm *drm = nouveau_drm(dev);
218 struct nvif_device *device = &drm->device; 218 struct nvif_object *device = &drm->device.object;
219 struct nvbios *bios = &drm->vbios; 219 struct nvbios *bios = &drm->vbios;
220 uint8_t lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer]; 220 uint8_t lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer];
221 uint32_t sel_clk_binding, sel_clk; 221 uint32_t sel_clk_binding, sel_clk;
@@ -318,7 +318,8 @@ static int parse_lvds_manufacturer_table_header(struct drm_device *dev, struct n
318static int 318static int
319get_fp_strap(struct drm_device *dev, struct nvbios *bios) 319get_fp_strap(struct drm_device *dev, struct nvbios *bios)
320{ 320{
321 struct nvif_device *device = &nouveau_drm(dev)->device; 321 struct nouveau_drm *drm = nouveau_drm(dev);
322 struct nvif_object *device = &drm->device.object;
322 323
323 /* 324 /*
324 * The fp strap is normally dictated by the "User Strap" in 325 * The fp strap is normally dictated by the "User Strap" in
@@ -332,7 +333,7 @@ get_fp_strap(struct drm_device *dev, struct nvbios *bios)
332 if (bios->major_version < 5 && bios->data[0x48] & 0x4) 333 if (bios->major_version < 5 && bios->data[0x48] & 0x4)
333 return NVReadVgaCrtc5758(dev, 0, 0xf) & 0xf; 334 return NVReadVgaCrtc5758(dev, 0, 0xf) & 0xf;
334 335
335 if (device->info.family >= NV_DEVICE_INFO_V0_TESLA) 336 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA)
336 return (nvif_rd32(device, NV_PEXTDEV_BOOT_0) >> 24) & 0xf; 337 return (nvif_rd32(device, NV_PEXTDEV_BOOT_0) >> 24) & 0xf;
337 else 338 else
338 return (nvif_rd32(device, NV_PEXTDEV_BOOT_0) >> 16) & 0xf; 339 return (nvif_rd32(device, NV_PEXTDEV_BOOT_0) >> 16) & 0xf;
@@ -634,7 +635,7 @@ int run_tmds_table(struct drm_device *dev, struct dcb_output *dcbent, int head,
634 */ 635 */
635 636
636 struct nouveau_drm *drm = nouveau_drm(dev); 637 struct nouveau_drm *drm = nouveau_drm(dev);
637 struct nvif_device *device = &drm->device; 638 struct nvif_object *device = &drm->device.object;
638 struct nvbios *bios = &drm->vbios; 639 struct nvbios *bios = &drm->vbios;
639 int cv = bios->chip_version; 640 int cv = bios->chip_version;
640 uint16_t clktable = 0, scriptptr; 641 uint16_t clktable = 0, scriptptr;
@@ -1914,7 +1915,7 @@ static int load_nv17_hwsq_ucode_entry(struct drm_device *dev, struct nvbios *bio
1914 */ 1915 */
1915 1916
1916 struct nouveau_drm *drm = nouveau_drm(dev); 1917 struct nouveau_drm *drm = nouveau_drm(dev);
1917 struct nvif_device *device = &drm->device; 1918 struct nvif_object *device = &drm->device.object;
1918 uint8_t bytes_to_write; 1919 uint8_t bytes_to_write;
1919 uint16_t hwsq_entry_offset; 1920 uint16_t hwsq_entry_offset;
1920 int i; 1921 int i;
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index 37ed3b250ac5..5529fc479d8a 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -1064,7 +1064,7 @@ nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr,
1064{ 1064{
1065 struct nouveau_drm *drm = nouveau_bdev(bo->bdev); 1065 struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
1066 struct nouveau_channel *chan = drm->ttm.chan; 1066 struct nouveau_channel *chan = drm->ttm.chan;
1067 struct nouveau_cli *cli = (void *)nvif_client(&chan->device->base); 1067 struct nouveau_cli *cli = (void *)chan->user.client;
1068 struct nouveau_fence *fence; 1068 struct nouveau_fence *fence;
1069 int ret; 1069 int ret;
1070 1070
@@ -1137,7 +1137,7 @@ nouveau_bo_move_init(struct nouveau_drm *drm)
1137 if (chan == NULL) 1137 if (chan == NULL)
1138 continue; 1138 continue;
1139 1139
1140 ret = nvif_object_init(chan->object, NULL, 1140 ret = nvif_object_init(&chan->user,
1141 mthd->oclass | (mthd->engine << 16), 1141 mthd->oclass | (mthd->engine << 16),
1142 mthd->oclass, NULL, 0, 1142 mthd->oclass, NULL, 0,
1143 &drm->ttm.copy); 1143 &drm->ttm.copy);
diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.c b/drivers/gpu/drm/nouveau/nouveau_chan.c
index 694b135e27c9..302713821f08 100644
--- a/drivers/gpu/drm/nouveau/nouveau_chan.c
+++ b/drivers/gpu/drm/nouveau/nouveau_chan.c
@@ -42,7 +42,7 @@ module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
42int 42int
43nouveau_channel_idle(struct nouveau_channel *chan) 43nouveau_channel_idle(struct nouveau_channel *chan)
44{ 44{
45 struct nouveau_cli *cli = (void *)nvif_client(chan->object); 45 struct nouveau_cli *cli = (void *)chan->user.client;
46 struct nouveau_fence *fence = NULL; 46 struct nouveau_fence *fence = NULL;
47 int ret; 47 int ret;
48 48
@@ -54,7 +54,7 @@ nouveau_channel_idle(struct nouveau_channel *chan)
54 54
55 if (ret) 55 if (ret)
56 NV_PRINTK(err, cli, "failed to idle channel 0x%08x [%s]\n", 56 NV_PRINTK(err, cli, "failed to idle channel 0x%08x [%s]\n",
57 chan->object->handle, nvxx_client(&cli->base)->name); 57 chan->user.handle, nvxx_client(&cli->base)->name);
58 return ret; 58 return ret;
59} 59}
60 60
@@ -70,14 +70,13 @@ nouveau_channel_del(struct nouveau_channel **pchan)
70 nvif_object_fini(&chan->nvsw); 70 nvif_object_fini(&chan->nvsw);
71 nvif_object_fini(&chan->gart); 71 nvif_object_fini(&chan->gart);
72 nvif_object_fini(&chan->vram); 72 nvif_object_fini(&chan->vram);
73 nvif_object_ref(NULL, &chan->object); 73 nvif_object_fini(&chan->user);
74 nvif_object_fini(&chan->push.ctxdma); 74 nvif_object_fini(&chan->push.ctxdma);
75 nouveau_bo_vma_del(chan->push.buffer, &chan->push.vma); 75 nouveau_bo_vma_del(chan->push.buffer, &chan->push.vma);
76 nouveau_bo_unmap(chan->push.buffer); 76 nouveau_bo_unmap(chan->push.buffer);
77 if (chan->push.buffer && chan->push.buffer->pin_refcnt) 77 if (chan->push.buffer && chan->push.buffer->pin_refcnt)
78 nouveau_bo_unpin(chan->push.buffer); 78 nouveau_bo_unpin(chan->push.buffer);
79 nouveau_bo_ref(NULL, &chan->push.buffer); 79 nouveau_bo_ref(NULL, &chan->push.buffer);
80 nvif_device_ref(NULL, &chan->device);
81 kfree(chan); 80 kfree(chan);
82 } 81 }
83 *pchan = NULL; 82 *pchan = NULL;
@@ -87,7 +86,7 @@ static int
87nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device, 86nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device,
88 u32 handle, u32 size, struct nouveau_channel **pchan) 87 u32 handle, u32 size, struct nouveau_channel **pchan)
89{ 88{
90 struct nouveau_cli *cli = (void *)nvif_client(&device->base); 89 struct nouveau_cli *cli = (void *)device->object.client;
91 struct nvkm_mmu *mmu = nvxx_mmu(device); 90 struct nvkm_mmu *mmu = nvxx_mmu(device);
92 struct nv_dma_v0 args = {}; 91 struct nv_dma_v0 args = {};
93 struct nouveau_channel *chan; 92 struct nouveau_channel *chan;
@@ -98,7 +97,7 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device,
98 if (!chan) 97 if (!chan)
99 return -ENOMEM; 98 return -ENOMEM;
100 99
101 nvif_device_ref(device, &chan->device); 100 chan->device = device;
102 chan->drm = drm; 101 chan->drm = drm;
103 102
104 /* allocate memory for dma push buffer */ 103 /* allocate memory for dma push buffer */
@@ -169,7 +168,7 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device,
169 } 168 }
170 } 169 }
171 170
172 ret = nvif_object_init(nvif_object(device), NULL, NVDRM_PUSH | 171 ret = nvif_object_init(&device->object, NVDRM_PUSH |
173 (handle & 0xffff), NV_DMA_FROM_MEMORY, 172 (handle & 0xffff), NV_DMA_FROM_MEMORY,
174 &args, sizeof(args), &chan->push.ctxdma); 173 &args, sizeof(args), &chan->push.ctxdma);
175 if (ret) { 174 if (ret) {
@@ -194,7 +193,7 @@ nouveau_channel_ind(struct nouveau_drm *drm, struct nvif_device *device,
194 union { 193 union {
195 struct nv50_channel_gpfifo_v0 nv50; 194 struct nv50_channel_gpfifo_v0 nv50;
196 struct kepler_channel_gpfifo_a_v0 kepler; 195 struct kepler_channel_gpfifo_a_v0 kepler;
197 } args, *retn; 196 } args;
198 struct nouveau_channel *chan; 197 struct nouveau_channel *chan;
199 u32 size; 198 u32 size;
200 int ret; 199 int ret;
@@ -222,14 +221,13 @@ nouveau_channel_ind(struct nouveau_drm *drm, struct nvif_device *device,
222 size = sizeof(args.nv50); 221 size = sizeof(args.nv50);
223 } 222 }
224 223
225 ret = nvif_object_new(nvif_object(device), handle, *oclass++, 224 ret = nvif_object_init(&device->object, handle, *oclass++,
226 &args, size, &chan->object); 225 &args, size, &chan->user);
227 if (ret == 0) { 226 if (ret == 0) {
228 retn = chan->object->data; 227 if (chan->user.oclass >= KEPLER_CHANNEL_GPFIFO_A)
229 if (chan->object->oclass >= KEPLER_CHANNEL_GPFIFO_A) 228 chan->chid = args.kepler.chid;
230 chan->chid = retn->kepler.chid;
231 else 229 else
232 chan->chid = retn->nv50.chid; 230 chan->chid = args.nv50.chid;
233 return ret; 231 return ret;
234 } 232 }
235 } while (*oclass); 233 } while (*oclass);
@@ -248,7 +246,7 @@ nouveau_channel_dma(struct nouveau_drm *drm, struct nvif_device *device,
248 NV03_CHANNEL_DMA, 246 NV03_CHANNEL_DMA,
249 0 }; 247 0 };
250 const u16 *oclass = oclasses; 248 const u16 *oclass = oclasses;
251 struct nv03_channel_dma_v0 args, *retn; 249 struct nv03_channel_dma_v0 args;
252 struct nouveau_channel *chan; 250 struct nouveau_channel *chan;
253 int ret; 251 int ret;
254 252
@@ -264,11 +262,10 @@ nouveau_channel_dma(struct nouveau_drm *drm, struct nvif_device *device,
264 args.offset = chan->push.vma.offset; 262 args.offset = chan->push.vma.offset;
265 263
266 do { 264 do {
267 ret = nvif_object_new(nvif_object(device), handle, *oclass++, 265 ret = nvif_object_init(&device->object, handle, *oclass++,
268 &args, sizeof(args), &chan->object); 266 &args, sizeof(args), &chan->user);
269 if (ret == 0) { 267 if (ret == 0) {
270 retn = chan->object->data; 268 chan->chid = args.chid;
271 chan->chid = retn->chid;
272 return ret; 269 return ret;
273 } 270 }
274 } while (ret && *oclass); 271 } while (ret && *oclass);
@@ -281,13 +278,13 @@ static int
281nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart) 278nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart)
282{ 279{
283 struct nvif_device *device = chan->device; 280 struct nvif_device *device = chan->device;
284 struct nouveau_cli *cli = (void *)nvif_client(&device->base); 281 struct nouveau_cli *cli = (void *)chan->user.client;
285 struct nvkm_mmu *mmu = nvxx_mmu(device); 282 struct nvkm_mmu *mmu = nvxx_mmu(device);
286 struct nvkm_sw_chan *swch; 283 struct nvkm_sw_chan *swch;
287 struct nv_dma_v0 args = {}; 284 struct nv_dma_v0 args = {};
288 int ret, i; 285 int ret, i;
289 286
290 nvif_object_map(chan->object); 287 nvif_object_map(&chan->user);
291 288
292 /* allocate dma objects to cover all allowed vram, and gart */ 289 /* allocate dma objects to cover all allowed vram, and gart */
293 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { 290 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
@@ -303,9 +300,8 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart)
303 args.limit = device->info.ram_user - 1; 300 args.limit = device->info.ram_user - 1;
304 } 301 }
305 302
306 ret = nvif_object_init(chan->object, NULL, vram, 303 ret = nvif_object_init(&chan->user, vram, NV_DMA_IN_MEMORY,
307 NV_DMA_IN_MEMORY, &args, 304 &args, sizeof(args), &chan->vram);
308 sizeof(args), &chan->vram);
309 if (ret) 305 if (ret)
310 return ret; 306 return ret;
311 307
@@ -328,15 +324,14 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart)
328 args.limit = mmu->limit - 1; 324 args.limit = mmu->limit - 1;
329 } 325 }
330 326
331 ret = nvif_object_init(chan->object, NULL, gart, 327 ret = nvif_object_init(&chan->user, gart, NV_DMA_IN_MEMORY,
332 NV_DMA_IN_MEMORY, &args, 328 &args, sizeof(args), &chan->gart);
333 sizeof(args), &chan->gart);
334 if (ret) 329 if (ret)
335 return ret; 330 return ret;
336 } 331 }
337 332
338 /* initialise dma tracking parameters */ 333 /* initialise dma tracking parameters */
339 switch (chan->object->oclass & 0x00ff) { 334 switch (chan->user.oclass & 0x00ff) {
340 case 0x006b: 335 case 0x006b:
341 case 0x006e: 336 case 0x006e:
342 chan->user_put = 0x40; 337 chan->user_put = 0x40;
@@ -368,7 +363,7 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart)
368 363
369 /* allocate software object class (used for fences on <= nv05) */ 364 /* allocate software object class (used for fences on <= nv05) */
370 if (device->info.family < NV_DEVICE_INFO_V0_CELSIUS) { 365 if (device->info.family < NV_DEVICE_INFO_V0_CELSIUS) {
371 ret = nvif_object_init(chan->object, NULL, 0x006e, 0x006e, 366 ret = nvif_object_init(&chan->user, 0x006e, 0x006e,
372 NULL, 0, &chan->nvsw); 367 NULL, 0, &chan->nvsw);
373 if (ret) 368 if (ret)
374 return ret; 369 return ret;
@@ -395,7 +390,7 @@ nouveau_channel_new(struct nouveau_drm *drm, struct nvif_device *device,
395 u32 handle, u32 arg0, u32 arg1, 390 u32 handle, u32 arg0, u32 arg1,
396 struct nouveau_channel **pchan) 391 struct nouveau_channel **pchan)
397{ 392{
398 struct nouveau_cli *cli = (void *)nvif_client(&device->base); 393 struct nouveau_cli *cli = (void *)device->object.client;
399 bool super; 394 bool super;
400 int ret; 395 int ret;
401 396
diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.h b/drivers/gpu/drm/nouveau/nouveau_chan.h
index 8b3640f69e4f..2ed32414cb69 100644
--- a/drivers/gpu/drm/nouveau/nouveau_chan.h
+++ b/drivers/gpu/drm/nouveau/nouveau_chan.h
@@ -37,7 +37,7 @@ struct nouveau_channel {
37 u32 user_get; 37 u32 user_get;
38 u32 user_put; 38 u32 user_put;
39 39
40 struct nvif_object *object; 40 struct nvif_object user;
41}; 41};
42 42
43 43
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c
index 054f0f25c8be..309c20b086d4 100644
--- a/drivers/gpu/drm/nouveau/nouveau_connector.c
+++ b/drivers/gpu/drm/nouveau/nouveau_connector.c
@@ -1256,8 +1256,8 @@ nouveau_connector_create(struct drm_device *dev, int index)
1256 break; 1256 break;
1257 } 1257 }
1258 1258
1259 ret = nvif_notify_init(&disp->disp, NULL, nouveau_connector_hotplug, 1259 ret = nvif_notify_init(&disp->disp, nouveau_connector_hotplug, true,
1260 true, NV04_DISP_NTFY_CONN, 1260 NV04_DISP_NTFY_CONN,
1261 &(struct nvif_notify_conn_req_v0) { 1261 &(struct nvif_notify_conn_req_v0) {
1262 .mask = NVIF_NOTIFY_CONN_V0_ANY, 1262 .mask = NVIF_NOTIFY_CONN_V0_ANY,
1263 .conn = index, 1263 .conn = index,
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c
index 8670d90cdc11..d913074c952f 100644
--- a/drivers/gpu/drm/nouveau/nouveau_display.c
+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
@@ -185,7 +185,7 @@ nouveau_display_vblank_init(struct drm_device *dev)
185 185
186 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 186 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
187 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); 187 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
188 ret = nvif_notify_init(&disp->disp, NULL, 188 ret = nvif_notify_init(&disp->disp,
189 nouveau_display_vblank_handler, false, 189 nouveau_display_vblank_handler, false,
190 NV04_DISP_NTFY_VBLANK, 190 NV04_DISP_NTFY_VBLANK,
191 &(struct nvif_notify_head_req_v0) { 191 &(struct nvif_notify_head_req_v0) {
@@ -494,7 +494,7 @@ nouveau_display_create(struct drm_device *dev)
494 int i; 494 int i;
495 495
496 for (i = 0, ret = -ENODEV; ret && i < ARRAY_SIZE(oclass); i++) { 496 for (i = 0, ret = -ENODEV; ret && i < ARRAY_SIZE(oclass); i++) {
497 ret = nvif_object_init(nvif_object(&drm->device), NULL, 497 ret = nvif_object_init(&drm->device.object,
498 NVDRM_DISPLAY, oclass[i], 498 NVDRM_DISPLAY, oclass[i],
499 NULL, 0, &disp->disp); 499 NULL, 0, &disp->disp);
500 } 500 }
@@ -711,7 +711,7 @@ nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
711 chan = drm->channel; 711 chan = drm->channel;
712 if (!chan) 712 if (!chan)
713 return -ENODEV; 713 return -ENODEV;
714 cli = (void *)nvif_client(&chan->device->base); 714 cli = (void *)chan->user.client;
715 715
716 s = kzalloc(sizeof(*s), GFP_KERNEL); 716 s = kzalloc(sizeof(*s), GFP_KERNEL);
717 if (!s) 717 if (!s)
diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.c b/drivers/gpu/drm/nouveau/nouveau_dma.c
index 6d9245aa81a6..d168c63533c1 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dma.c
+++ b/drivers/gpu/drm/nouveau/nouveau_dma.c
@@ -52,9 +52,9 @@ READ_GET(struct nouveau_channel *chan, uint64_t *prev_get, int *timeout)
52{ 52{
53 uint64_t val; 53 uint64_t val;
54 54
55 val = nvif_rd32(chan, chan->user_get); 55 val = nvif_rd32(&chan->user, chan->user_get);
56 if (chan->user_get_hi) 56 if (chan->user_get_hi)
57 val |= (uint64_t)nvif_rd32(chan, chan->user_get_hi) << 32; 57 val |= (uint64_t)nvif_rd32(&chan->user, chan->user_get_hi) << 32;
58 58
59 /* reset counter as long as GET is still advancing, this is 59 /* reset counter as long as GET is still advancing, this is
60 * to avoid misdetecting a GPU lockup if the GPU happens to 60 * to avoid misdetecting a GPU lockup if the GPU happens to
@@ -82,7 +82,7 @@ void
82nv50_dma_push(struct nouveau_channel *chan, struct nouveau_bo *bo, 82nv50_dma_push(struct nouveau_channel *chan, struct nouveau_bo *bo,
83 int delta, int length) 83 int delta, int length)
84{ 84{
85 struct nouveau_cli *cli = (void *)nvif_client(&chan->device->base); 85 struct nouveau_cli *cli = (void *)chan->user.client;
86 struct nouveau_bo *pb = chan->push.buffer; 86 struct nouveau_bo *pb = chan->push.buffer;
87 struct nvkm_vma *vma; 87 struct nvkm_vma *vma;
88 int ip = (chan->dma.ib_put * 2) + chan->dma.ib_base; 88 int ip = (chan->dma.ib_put * 2) + chan->dma.ib_base;
@@ -103,7 +103,7 @@ nv50_dma_push(struct nouveau_channel *chan, struct nouveau_bo *bo,
103 /* Flush writes. */ 103 /* Flush writes. */
104 nouveau_bo_rd32(pb, 0); 104 nouveau_bo_rd32(pb, 0);
105 105
106 nvif_wr32(chan, 0x8c, chan->dma.ib_put); 106 nvif_wr32(&chan->user, 0x8c, chan->dma.ib_put);
107 chan->dma.ib_free--; 107 chan->dma.ib_free--;
108} 108}
109 109
@@ -113,7 +113,7 @@ nv50_dma_push_wait(struct nouveau_channel *chan, int count)
113 uint32_t cnt = 0, prev_get = 0; 113 uint32_t cnt = 0, prev_get = 0;
114 114
115 while (chan->dma.ib_free < count) { 115 while (chan->dma.ib_free < count) {
116 uint32_t get = nvif_rd32(chan, 0x88); 116 uint32_t get = nvif_rd32(&chan->user, 0x88);
117 if (get != prev_get) { 117 if (get != prev_get) {
118 prev_get = get; 118 prev_get = get;
119 cnt = 0; 119 cnt = 0;
diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.h b/drivers/gpu/drm/nouveau/nouveau_dma.h
index 8da0a272c45a..aff3a9d0a1fc 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dma.h
+++ b/drivers/gpu/drm/nouveau/nouveau_dma.h
@@ -140,7 +140,7 @@ BEGIN_IMC0(struct nouveau_channel *chan, int subc, int mthd, u16 data)
140#define WRITE_PUT(val) do { \ 140#define WRITE_PUT(val) do { \
141 mb(); \ 141 mb(); \
142 nouveau_bo_rd32(chan->push.buffer, 0); \ 142 nouveau_bo_rd32(chan->push.buffer, 0); \
143 nvif_wr32(chan, chan->user_put, ((val) << 2) + chan->push.vma.offset); \ 143 nvif_wr32(&chan->user, chan->user_put, ((val) << 2) + chan->push.vma.offset); \
144} while (0) 144} while (0)
145 145
146static inline void 146static inline void
diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c b/drivers/gpu/drm/nouveau/nouveau_drm.c
index 86f567d4e5cd..11cf52a7ff75 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drm.c
+++ b/drivers/gpu/drm/nouveau/nouveau_drm.c
@@ -114,7 +114,7 @@ nouveau_cli_create(struct drm_device *dev, const char *sname,
114 snprintf(cli->name, sizeof(cli->name), "%s", sname); 114 snprintf(cli->name, sizeof(cli->name), "%s", sname);
115 cli->dev = dev; 115 cli->dev = dev;
116 116
117 ret = nvif_client_init(NULL, NULL, cli->name, nouveau_name(dev), 117 ret = nvif_client_init(NULL, cli->name, nouveau_name(dev),
118 nouveau_config, nouveau_debug, 118 nouveau_config, nouveau_debug,
119 &cli->base); 119 &cli->base);
120 if (ret == 0) { 120 if (ret == 0) {
@@ -163,7 +163,7 @@ nouveau_accel_init(struct nouveau_drm *drm)
163 /*XXX: this is crap, but the fence/channel stuff is a little 163 /*XXX: this is crap, but the fence/channel stuff is a little
164 * backwards in some places. this will be fixed. 164 * backwards in some places. this will be fixed.
165 */ 165 */
166 ret = nvif_object_sclass(&device->base, sclass, ARRAY_SIZE(sclass)); 166 ret = nvif_object_sclass(&device->object, sclass, ARRAY_SIZE(sclass));
167 if (ret < 0) 167 if (ret < 0)
168 return; 168 return;
169 169
@@ -235,7 +235,7 @@ nouveau_accel_init(struct nouveau_drm *drm)
235 return; 235 return;
236 } 236 }
237 237
238 ret = nvif_object_init(drm->channel->object, NULL, NVDRM_NVSW, 238 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
239 nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw); 239 nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw);
240 if (ret == 0) { 240 if (ret == 0) {
241 struct nvkm_sw_chan *swch; 241 struct nvkm_sw_chan *swch;
@@ -262,7 +262,7 @@ nouveau_accel_init(struct nouveau_drm *drm)
262 } 262 }
263 263
264 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { 264 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
265 ret = nvkm_gpuobj_new(nvxx_object(&drm->device), NULL, 32, 265 ret = nvkm_gpuobj_new(nvxx_object(&drm->device.object), NULL, 32,
266 0, 0, &drm->notify); 266 0, 0, &drm->notify);
267 if (ret) { 267 if (ret) {
268 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); 268 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
@@ -270,7 +270,7 @@ nouveau_accel_init(struct nouveau_drm *drm)
270 return; 270 return;
271 } 271 }
272 272
273 ret = nvif_object_init(drm->channel->object, NULL, NvNotify0, 273 ret = nvif_object_init(&drm->channel->user, NvNotify0,
274 NV_DMA_IN_MEMORY, 274 NV_DMA_IN_MEMORY,
275 &(struct nv_dma_v0) { 275 &(struct nv_dma_v0) {
276 .target = NV_DMA_V0_TARGET_VRAM, 276 .target = NV_DMA_V0_TARGET_VRAM,
@@ -392,8 +392,8 @@ nouveau_drm_load(struct drm_device *dev, unsigned long flags)
392 392
393 nouveau_get_hdmi_dev(drm); 393 nouveau_get_hdmi_dev(drm);
394 394
395 ret = nvif_device_init(&drm->client.base.base, NULL, NVDRM_DEVICE, 395 ret = nvif_device_init(&drm->client.base.object,
396 NV_DEVICE, 396 NVDRM_DEVICE, NV_DEVICE,
397 &(struct nv_device_v0) { 397 &(struct nv_device_v0) {
398 .device = ~0, 398 .device = ~0,
399 }, sizeof(struct nv_device_v0), 399 }, sizeof(struct nv_device_v0),
@@ -408,7 +408,7 @@ nouveau_drm_load(struct drm_device *dev, unsigned long flags)
408 * better fix is found - assuming there is one... 408 * better fix is found - assuming there is one...
409 */ 409 */
410 if (drm->device.info.chipset == 0xc1) 410 if (drm->device.info.chipset == 0xc1)
411 nvif_mask(&drm->device, 0x00088080, 0x00000800, 0x00000000); 411 nvif_mask(&drm->device.object, 0x00088080, 0x00000800, 0x00000000);
412 412
413 nouveau_vga_init(drm); 413 nouveau_vga_init(drm);
414 nouveau_agp_init(drm); 414 nouveau_agp_init(drm);
@@ -736,7 +736,7 @@ nouveau_pmops_runtime_resume(struct device *dev)
736 ret = nouveau_do_resume(drm_dev, true); 736 ret = nouveau_do_resume(drm_dev, true);
737 drm_kms_helper_poll_enable(drm_dev); 737 drm_kms_helper_poll_enable(drm_dev);
738 /* do magic */ 738 /* do magic */
739 nvif_mask(device, 0x88488, (1 << 25), (1 << 25)); 739 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
740 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON); 740 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
741 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; 741 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
742 return ret; 742 return ret;
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c
index c6d56bef5823..574c36b492ee 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fence.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fence.c
@@ -169,7 +169,7 @@ void
169nouveau_fence_context_new(struct nouveau_channel *chan, struct nouveau_fence_chan *fctx) 169nouveau_fence_context_new(struct nouveau_channel *chan, struct nouveau_fence_chan *fctx)
170{ 170{
171 struct nouveau_fence_priv *priv = (void*)chan->drm->fence; 171 struct nouveau_fence_priv *priv = (void*)chan->drm->fence;
172 struct nouveau_cli *cli = (void *)nvif_client(chan->object); 172 struct nouveau_cli *cli = (void *)chan->user.client;
173 int ret; 173 int ret;
174 174
175 INIT_LIST_HEAD(&fctx->flip); 175 INIT_LIST_HEAD(&fctx->flip);
@@ -188,13 +188,12 @@ nouveau_fence_context_new(struct nouveau_channel *chan, struct nouveau_fence_cha
188 if (!priv->uevent) 188 if (!priv->uevent)
189 return; 189 return;
190 190
191 ret = nvif_notify_init(chan->object, NULL, 191 ret = nvif_notify_init(&chan->user, nouveau_fence_wait_uevent_handler,
192 nouveau_fence_wait_uevent_handler, false, 192 false, G82_CHANNEL_DMA_V0_NTFY_UEVENT,
193 G82_CHANNEL_DMA_V0_NTFY_UEVENT, 193 &(struct nvif_notify_uevent_req) { },
194 &(struct nvif_notify_uevent_req) { }, 194 sizeof(struct nvif_notify_uevent_req),
195 sizeof(struct nvif_notify_uevent_req), 195 sizeof(struct nvif_notify_uevent_rep),
196 sizeof(struct nvif_notify_uevent_rep), 196 &fctx->notify);
197 &fctx->notify);
198 197
199 WARN_ON(ret); 198 WARN_ON(ret);
200} 199}
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c
index dc5845ee2fa0..dc2378c01b6d 100644
--- a/drivers/gpu/drm/nouveau/nouveau_gem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
@@ -681,7 +681,7 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data,
681 return -ENOMEM; 681 return -ENOMEM;
682 682
683 list_for_each_entry(temp, &abi16->channels, head) { 683 list_for_each_entry(temp, &abi16->channels, head) {
684 if (temp->chan->object->handle == (NVDRM_CHAN | req->channel)) { 684 if (temp->chan->user.handle == (NVDRM_CHAN | req->channel)) {
685 chan = temp->chan; 685 chan = temp->chan;
686 break; 686 break;
687 } 687 }
diff --git a/drivers/gpu/drm/nouveau/nouveau_sysfs.c b/drivers/gpu/drm/nouveau/nouveau_sysfs.c
index 1ec8f38ae69a..ce612064fa6a 100644
--- a/drivers/gpu/drm/nouveau/nouveau_sysfs.c
+++ b/drivers/gpu/drm/nouveau/nouveau_sysfs.c
@@ -188,9 +188,9 @@ nouveau_sysfs_init(struct drm_device *dev)
188 if (!sysfs) 188 if (!sysfs)
189 return -ENOMEM; 189 return -ENOMEM;
190 190
191 ret = nvif_object_init(nvif_object(device), NULL, NVDRM_CONTROL, 191 ret = nvif_object_init(&device->object, NVDRM_CONTROL,
192 NVIF_IOCTL_NEW_V0_CONTROL, NULL, 0, 192 NVIF_IOCTL_NEW_V0_CONTROL, NULL, 0,
193 &sysfs->ctrl); 193 &sysfs->ctrl);
194 if (ret == 0) 194 if (ret == 0)
195 device_create_file(nv_device_base(nvxx_device(device)), &dev_attr_pstate); 195 device_create_file(nv_device_base(nvxx_device(device)), &dev_attr_pstate);
196 196
diff --git a/drivers/gpu/drm/nouveau/nouveau_vga.c b/drivers/gpu/drm/nouveau/nouveau_vga.c
index c7592ec8ecb8..af89c3665b2a 100644
--- a/drivers/gpu/drm/nouveau/nouveau_vga.c
+++ b/drivers/gpu/drm/nouveau/nouveau_vga.c
@@ -12,13 +12,14 @@
12static unsigned int 12static unsigned int
13nouveau_vga_set_decode(void *priv, bool state) 13nouveau_vga_set_decode(void *priv, bool state)
14{ 14{
15 struct nvif_device *device = &nouveau_drm(priv)->device; 15 struct nouveau_drm *drm = nouveau_drm(priv);
16 struct nvif_object *device = &drm->device.object;
16 17
17 if (device->info.family == NV_DEVICE_INFO_V0_CURIE && 18 if (drm->device.info.family == NV_DEVICE_INFO_V0_CURIE &&
18 device->info.chipset >= 0x4c) 19 drm->device.info.chipset >= 0x4c)
19 nvif_wr32(device, 0x088060, state); 20 nvif_wr32(device, 0x088060, state);
20 else 21 else
21 if (device->info.chipset >= 0x40) 22 if (drm->device.info.chipset >= 0x40)
22 nvif_wr32(device, 0x088054, state); 23 nvif_wr32(device, 0x088054, state);
23 else 24 else
24 nvif_wr32(device, 0x001854, state); 25 nvif_wr32(device, 0x001854, state);
diff --git a/drivers/gpu/drm/nouveau/nv04_fbcon.c b/drivers/gpu/drm/nouveau/nv04_fbcon.c
index 495c57644ced..789dc2993b0d 100644
--- a/drivers/gpu/drm/nouveau/nv04_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nv04_fbcon.c
@@ -171,33 +171,33 @@ nv04_fbcon_accel_init(struct fb_info *info)
171 return -EINVAL; 171 return -EINVAL;
172 } 172 }
173 173
174 ret = nvif_object_init(chan->object, NULL, 0x0062, 174 ret = nvif_object_init(&chan->user, 0x0062,
175 device->info.family >= NV_DEVICE_INFO_V0_CELSIUS ? 175 device->info.family >= NV_DEVICE_INFO_V0_CELSIUS ?
176 0x0062 : 0x0042, NULL, 0, &nfbdev->surf2d); 176 0x0062 : 0x0042, NULL, 0, &nfbdev->surf2d);
177 if (ret) 177 if (ret)
178 return ret; 178 return ret;
179 179
180 ret = nvif_object_init(chan->object, NULL, 0x0019, 0x0019, NULL, 0, 180 ret = nvif_object_init(&chan->user, 0x0019, 0x0019, NULL, 0,
181 &nfbdev->clip); 181 &nfbdev->clip);
182 if (ret) 182 if (ret)
183 return ret; 183 return ret;
184 184
185 ret = nvif_object_init(chan->object, NULL, 0x0043, 0x0043, NULL, 0, 185 ret = nvif_object_init(&chan->user, 0x0043, 0x0043, NULL, 0,
186 &nfbdev->rop); 186 &nfbdev->rop);
187 if (ret) 187 if (ret)
188 return ret; 188 return ret;
189 189
190 ret = nvif_object_init(chan->object, NULL, 0x0044, 0x0044, NULL, 0, 190 ret = nvif_object_init(&chan->user, 0x0044, 0x0044, NULL, 0,
191 &nfbdev->patt); 191 &nfbdev->patt);
192 if (ret) 192 if (ret)
193 return ret; 193 return ret;
194 194
195 ret = nvif_object_init(chan->object, NULL, 0x004a, 0x004a, NULL, 0, 195 ret = nvif_object_init(&chan->user, 0x004a, 0x004a, NULL, 0,
196 &nfbdev->gdi); 196 &nfbdev->gdi);
197 if (ret) 197 if (ret)
198 return ret; 198 return ret;
199 199
200 ret = nvif_object_init(chan->object, NULL, 0x005f, 200 ret = nvif_object_init(&chan->user, 0x005f,
201 device->info.chipset >= 0x11 ? 0x009f : 0x005f, 201 device->info.chipset >= 0x11 ? 0x009f : 0x005f,
202 NULL, 0, &nfbdev->blit); 202 NULL, 0, &nfbdev->blit);
203 if (ret) 203 if (ret)
diff --git a/drivers/gpu/drm/nouveau/nv04_fence.c b/drivers/gpu/drm/nouveau/nv04_fence.c
index c2e05e64cd6f..f4a26224ac68 100644
--- a/drivers/gpu/drm/nouveau/nv04_fence.c
+++ b/drivers/gpu/drm/nouveau/nv04_fence.c
@@ -57,7 +57,7 @@ nv04_fence_sync(struct nouveau_fence *fence,
57static u32 57static u32
58nv04_fence_read(struct nouveau_channel *chan) 58nv04_fence_read(struct nouveau_channel *chan)
59{ 59{
60 struct nvkm_fifo_chan *fifo = nvxx_fifo_chan(chan);; 60 struct nvkm_fifo_chan *fifo = nvxx_fifo_chan(&chan->user);
61 return atomic_read(&fifo->refcnt); 61 return atomic_read(&fifo->refcnt);
62} 62}
63 63
diff --git a/drivers/gpu/drm/nouveau/nv10_fence.c b/drivers/gpu/drm/nouveau/nv10_fence.c
index 5e1ea1cdce75..2c35213da275 100644
--- a/drivers/gpu/drm/nouveau/nv10_fence.c
+++ b/drivers/gpu/drm/nouveau/nv10_fence.c
@@ -50,7 +50,7 @@ nv10_fence_sync(struct nouveau_fence *fence,
50u32 50u32
51nv10_fence_read(struct nouveau_channel *chan) 51nv10_fence_read(struct nouveau_channel *chan)
52{ 52{
53 return nvif_rd32(chan, 0x0048); 53 return nvif_rd32(&chan->user, 0x0048);
54} 54}
55 55
56void 56void
diff --git a/drivers/gpu/drm/nouveau/nv17_fence.c b/drivers/gpu/drm/nouveau/nv17_fence.c
index 57860cfa1de5..80b6eb8b3d02 100644
--- a/drivers/gpu/drm/nouveau/nv17_fence.c
+++ b/drivers/gpu/drm/nouveau/nv17_fence.c
@@ -33,7 +33,7 @@ int
33nv17_fence_sync(struct nouveau_fence *fence, 33nv17_fence_sync(struct nouveau_fence *fence,
34 struct nouveau_channel *prev, struct nouveau_channel *chan) 34 struct nouveau_channel *prev, struct nouveau_channel *chan)
35{ 35{
36 struct nouveau_cli *cli = (void *)nvif_client(&prev->device->base); 36 struct nouveau_cli *cli = (void *)prev->user.client;
37 struct nv10_fence_priv *priv = chan->drm->fence; 37 struct nv10_fence_priv *priv = chan->drm->fence;
38 struct nv10_fence_chan *fctx = chan->fence; 38 struct nv10_fence_chan *fctx = chan->fence;
39 u32 value; 39 u32 value;
@@ -89,7 +89,7 @@ nv17_fence_context_new(struct nouveau_channel *chan)
89 fctx->base.read = nv10_fence_read; 89 fctx->base.read = nv10_fence_read;
90 fctx->base.sync = nv17_fence_sync; 90 fctx->base.sync = nv17_fence_sync;
91 91
92 ret = nvif_object_init(chan->object, NULL, NvSema, NV_DMA_FROM_MEMORY, 92 ret = nvif_object_init(&chan->user, NvSema, NV_DMA_FROM_MEMORY,
93 &(struct nv_dma_v0) { 93 &(struct nv_dma_v0) {
94 .target = NV_DMA_V0_TARGET_VRAM, 94 .target = NV_DMA_V0_TARGET_VRAM,
95 .access = NV_DMA_V0_ACCESS_RDWR, 95 .access = NV_DMA_V0_ACCESS_RDWR,
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
index c56775f5aff3..794a20ea71fe 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -60,16 +60,20 @@
60 60
61struct nv50_chan { 61struct nv50_chan {
62 struct nvif_object user; 62 struct nvif_object user;
63 struct nvif_device *device;
63}; 64};
64 65
65static int 66static int
66nv50_chan_create(struct nvif_object *disp, const u32 *oclass, u8 head, 67nv50_chan_create(struct nvif_device *device, struct nvif_object *disp,
67 void *data, u32 size, struct nv50_chan *chan) 68 const u32 *oclass, u8 head, void *data, u32 size,
69 struct nv50_chan *chan)
68{ 70{
69 const u32 handle = (oclass[0] << 16) | head; 71 const u32 handle = (oclass[0] << 16) | head;
70 u32 sclass[8]; 72 u32 sclass[8];
71 int ret, i; 73 int ret, i;
72 74
75 chan->device = device;
76
73 ret = nvif_object_sclass(disp, sclass, ARRAY_SIZE(sclass)); 77 ret = nvif_object_sclass(disp, sclass, ARRAY_SIZE(sclass));
74 WARN_ON(ret > ARRAY_SIZE(sclass)); 78 WARN_ON(ret > ARRAY_SIZE(sclass));
75 if (ret < 0) 79 if (ret < 0)
@@ -78,9 +82,8 @@ nv50_chan_create(struct nvif_object *disp, const u32 *oclass, u8 head,
78 while (oclass[0]) { 82 while (oclass[0]) {
79 for (i = 0; i < ARRAY_SIZE(sclass); i++) { 83 for (i = 0; i < ARRAY_SIZE(sclass); i++) {
80 if (sclass[i] == oclass[0]) { 84 if (sclass[i] == oclass[0]) {
81 ret = nvif_object_init(disp, NULL, handle, 85 ret = nvif_object_init(disp, handle, oclass[0],
82 oclass[0], data, size, 86 data, size, &chan->user);
83 &chan->user);
84 if (ret == 0) 87 if (ret == 0)
85 nvif_object_map(&chan->user); 88 nvif_object_map(&chan->user);
86 return ret; 89 return ret;
@@ -113,10 +116,12 @@ nv50_pioc_destroy(struct nv50_pioc *pioc)
113} 116}
114 117
115static int 118static int
116nv50_pioc_create(struct nvif_object *disp, const u32 *oclass, u8 head, 119nv50_pioc_create(struct nvif_device *device, struct nvif_object *disp,
117 void *data, u32 size, struct nv50_pioc *pioc) 120 const u32 *oclass, u8 head, void *data, u32 size,
121 struct nv50_pioc *pioc)
118{ 122{
119 return nv50_chan_create(disp, oclass, head, data, size, &pioc->base); 123 return nv50_chan_create(device, disp, oclass, head, data, size,
124 &pioc->base);
120} 125}
121 126
122/****************************************************************************** 127/******************************************************************************
@@ -128,7 +133,8 @@ struct nv50_curs {
128}; 133};
129 134
130static int 135static int
131nv50_curs_create(struct nvif_object *disp, int head, struct nv50_curs *curs) 136nv50_curs_create(struct nvif_device *device, struct nvif_object *disp,
137 int head, struct nv50_curs *curs)
132{ 138{
133 struct nv50_disp_cursor_v0 args = { 139 struct nv50_disp_cursor_v0 args = {
134 .head = head, 140 .head = head,
@@ -142,8 +148,8 @@ nv50_curs_create(struct nvif_object *disp, int head, struct nv50_curs *curs)
142 0 148 0
143 }; 149 };
144 150
145 return nv50_pioc_create(disp, oclass, head, &args, sizeof(args), 151 return nv50_pioc_create(device, disp, oclass, head, &args, sizeof(args),
146 &curs->base); 152 &curs->base);
147} 153}
148 154
149/****************************************************************************** 155/******************************************************************************
@@ -155,7 +161,8 @@ struct nv50_oimm {
155}; 161};
156 162
157static int 163static int
158nv50_oimm_create(struct nvif_object *disp, int head, struct nv50_oimm *oimm) 164nv50_oimm_create(struct nvif_device *device, struct nvif_object *disp,
165 int head, struct nv50_oimm *oimm)
159{ 166{
160 struct nv50_disp_cursor_v0 args = { 167 struct nv50_disp_cursor_v0 args = {
161 .head = head, 168 .head = head,
@@ -169,8 +176,8 @@ nv50_oimm_create(struct nvif_object *disp, int head, struct nv50_oimm *oimm)
169 0 176 0
170 }; 177 };
171 178
172 return nv50_pioc_create(disp, oclass, head, &args, sizeof(args), 179 return nv50_pioc_create(device, disp, oclass, head, &args, sizeof(args),
173 &oimm->base); 180 &oimm->base);
174} 181}
175 182
176/****************************************************************************** 183/******************************************************************************
@@ -194,23 +201,24 @@ struct nv50_dmac {
194static void 201static void
195nv50_dmac_destroy(struct nv50_dmac *dmac, struct nvif_object *disp) 202nv50_dmac_destroy(struct nv50_dmac *dmac, struct nvif_object *disp)
196{ 203{
204 struct nvif_device *device = dmac->base.device;
205
197 nvif_object_fini(&dmac->vram); 206 nvif_object_fini(&dmac->vram);
198 nvif_object_fini(&dmac->sync); 207 nvif_object_fini(&dmac->sync);
199 208
200 nv50_chan_destroy(&dmac->base); 209 nv50_chan_destroy(&dmac->base);
201 210
202 if (dmac->ptr) { 211 if (dmac->ptr) {
203 struct pci_dev *pdev = nvxx_device(nvif_device(disp))->pdev; 212 struct pci_dev *pdev = nvxx_device(device)->pdev;
204 pci_free_consistent(pdev, PAGE_SIZE, dmac->ptr, dmac->handle); 213 pci_free_consistent(pdev, PAGE_SIZE, dmac->ptr, dmac->handle);
205 } 214 }
206} 215}
207 216
208static int 217static int
209nv50_dmac_create(struct nvif_object *disp, const u32 *oclass, u8 head, 218nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp,
210 void *data, u32 size, u64 syncbuf, 219 const u32 *oclass, u8 head, void *data, u32 size, u64 syncbuf,
211 struct nv50_dmac *dmac) 220 struct nv50_dmac *dmac)
212{ 221{
213 struct nvif_device *device = nvif_device(disp);
214 struct nv50_disp_core_channel_dma_v0 *args = data; 222 struct nv50_disp_core_channel_dma_v0 *args = data;
215 struct nvif_object pushbuf; 223 struct nvif_object pushbuf;
216 int ret; 224 int ret;
@@ -222,9 +230,8 @@ nv50_dmac_create(struct nvif_object *disp, const u32 *oclass, u8 head,
222 if (!dmac->ptr) 230 if (!dmac->ptr)
223 return -ENOMEM; 231 return -ENOMEM;
224 232
225 ret = nvif_object_init(nvif_object(device), NULL, 233 ret = nvif_object_init(&device->object, args->pushbuf,
226 args->pushbuf, NV_DMA_FROM_MEMORY, 234 NV_DMA_FROM_MEMORY, &(struct nv_dma_v0) {
227 &(struct nv_dma_v0) {
228 .target = NV_DMA_V0_TARGET_PCI_US, 235 .target = NV_DMA_V0_TARGET_PCI_US,
229 .access = NV_DMA_V0_ACCESS_RD, 236 .access = NV_DMA_V0_ACCESS_RD,
230 .start = dmac->handle + 0x0000, 237 .start = dmac->handle + 0x0000,
@@ -233,13 +240,13 @@ nv50_dmac_create(struct nvif_object *disp, const u32 *oclass, u8 head,
233 if (ret) 240 if (ret)
234 return ret; 241 return ret;
235 242
236 ret = nv50_chan_create(disp, oclass, head, data, size, &dmac->base); 243 ret = nv50_chan_create(device, disp, oclass, head, data, size,
244 &dmac->base);
237 nvif_object_fini(&pushbuf); 245 nvif_object_fini(&pushbuf);
238 if (ret) 246 if (ret)
239 return ret; 247 return ret;
240 248
241 ret = nvif_object_init(&dmac->base.user, NULL, 0xf0000000, 249 ret = nvif_object_init(&dmac->base.user, 0xf0000000, NV_DMA_IN_MEMORY,
242 NV_DMA_IN_MEMORY,
243 &(struct nv_dma_v0) { 250 &(struct nv_dma_v0) {
244 .target = NV_DMA_V0_TARGET_VRAM, 251 .target = NV_DMA_V0_TARGET_VRAM,
245 .access = NV_DMA_V0_ACCESS_RDWR, 252 .access = NV_DMA_V0_ACCESS_RDWR,
@@ -250,8 +257,7 @@ nv50_dmac_create(struct nvif_object *disp, const u32 *oclass, u8 head,
250 if (ret) 257 if (ret)
251 return ret; 258 return ret;
252 259
253 ret = nvif_object_init(&dmac->base.user, NULL, 0xf0000001, 260 ret = nvif_object_init(&dmac->base.user, 0xf0000001, NV_DMA_IN_MEMORY,
254 NV_DMA_IN_MEMORY,
255 &(struct nv_dma_v0) { 261 &(struct nv_dma_v0) {
256 .target = NV_DMA_V0_TARGET_VRAM, 262 .target = NV_DMA_V0_TARGET_VRAM,
257 .access = NV_DMA_V0_ACCESS_RDWR, 263 .access = NV_DMA_V0_ACCESS_RDWR,
@@ -274,7 +280,8 @@ struct nv50_mast {
274}; 280};
275 281
276static int 282static int
277nv50_core_create(struct nvif_object *disp, u64 syncbuf, struct nv50_mast *core) 283nv50_core_create(struct nvif_device *device, struct nvif_object *disp,
284 u64 syncbuf, struct nv50_mast *core)
278{ 285{
279 struct nv50_disp_core_channel_dma_v0 args = { 286 struct nv50_disp_core_channel_dma_v0 args = {
280 .pushbuf = 0xb0007d00, 287 .pushbuf = 0xb0007d00,
@@ -293,8 +300,8 @@ nv50_core_create(struct nvif_object *disp, u64 syncbuf, struct nv50_mast *core)
293 0 300 0
294 }; 301 };
295 302
296 return nv50_dmac_create(disp, oclass, 0, &args, sizeof(args), syncbuf, 303 return nv50_dmac_create(device, disp, oclass, 0, &args, sizeof(args),
297 &core->base); 304 syncbuf, &core->base);
298} 305}
299 306
300/****************************************************************************** 307/******************************************************************************
@@ -308,8 +315,8 @@ struct nv50_sync {
308}; 315};
309 316
310static int 317static int
311nv50_base_create(struct nvif_object *disp, int head, u64 syncbuf, 318nv50_base_create(struct nvif_device *device, struct nvif_object *disp,
312 struct nv50_sync *base) 319 int head, u64 syncbuf, struct nv50_sync *base)
313{ 320{
314 struct nv50_disp_base_channel_dma_v0 args = { 321 struct nv50_disp_base_channel_dma_v0 args = {
315 .pushbuf = 0xb0007c00 | head, 322 .pushbuf = 0xb0007c00 | head,
@@ -326,7 +333,7 @@ nv50_base_create(struct nvif_object *disp, int head, u64 syncbuf,
326 0 333 0
327 }; 334 };
328 335
329 return nv50_dmac_create(disp, oclass, head, &args, sizeof(args), 336 return nv50_dmac_create(device, disp, oclass, head, &args, sizeof(args),
330 syncbuf, &base->base); 337 syncbuf, &base->base);
331} 338}
332 339
@@ -339,8 +346,8 @@ struct nv50_ovly {
339}; 346};
340 347
341static int 348static int
342nv50_ovly_create(struct nvif_object *disp, int head, u64 syncbuf, 349nv50_ovly_create(struct nvif_device *device, struct nvif_object *disp,
343 struct nv50_ovly *ovly) 350 int head, u64 syncbuf, struct nv50_ovly *ovly)
344{ 351{
345 struct nv50_disp_overlay_channel_dma_v0 args = { 352 struct nv50_disp_overlay_channel_dma_v0 args = {
346 .pushbuf = 0xb0007e00 | head, 353 .pushbuf = 0xb0007e00 | head,
@@ -356,7 +363,7 @@ nv50_ovly_create(struct nvif_object *disp, int head, u64 syncbuf,
356 0 363 0
357 }; 364 };
358 365
359 return nv50_dmac_create(disp, oclass, head, &args, sizeof(args), 366 return nv50_dmac_create(device, disp, oclass, head, &args, sizeof(args),
360 syncbuf, &ovly->base); 367 syncbuf, &ovly->base);
361} 368}
362 369
@@ -413,7 +420,7 @@ static u32 *
413evo_wait(void *evoc, int nr) 420evo_wait(void *evoc, int nr)
414{ 421{
415 struct nv50_dmac *dmac = evoc; 422 struct nv50_dmac *dmac = evoc;
416 struct nvif_device *device = nvif_device(&dmac->base.user); 423 struct nvif_device *device = dmac->base.device;
417 u32 put = nvif_rd32(&dmac->base.user, 0x0000) / 4; 424 u32 put = nvif_rd32(&dmac->base.user, 0x0000) / 4;
418 425
419 mutex_lock(&dmac->lock); 426 mutex_lock(&dmac->lock);
@@ -573,7 +580,7 @@ nv50_display_flip_next(struct drm_crtc *crtc, struct drm_framebuffer *fb,
573 if (unlikely(push == NULL)) 580 if (unlikely(push == NULL))
574 return -EBUSY; 581 return -EBUSY;
575 582
576 if (chan && chan->object->oclass < G82_CHANNEL_GPFIFO) { 583 if (chan && chan->user.oclass < G82_CHANNEL_GPFIFO) {
577 ret = RING_SPACE(chan, 8); 584 ret = RING_SPACE(chan, 8);
578 if (ret) 585 if (ret)
579 return ret; 586 return ret;
@@ -587,7 +594,7 @@ nv50_display_flip_next(struct drm_crtc *crtc, struct drm_framebuffer *fb,
587 OUT_RING (chan, sync->addr); 594 OUT_RING (chan, sync->addr);
588 OUT_RING (chan, sync->data); 595 OUT_RING (chan, sync->data);
589 } else 596 } else
590 if (chan && chan->object->oclass < FERMI_CHANNEL_GPFIFO) { 597 if (chan && chan->user.oclass < FERMI_CHANNEL_GPFIFO) {
591 u64 addr = nv84_fence_crtc(chan, nv_crtc->index) + sync->addr; 598 u64 addr = nv84_fence_crtc(chan, nv_crtc->index) + sync->addr;
592 ret = RING_SPACE(chan, 12); 599 ret = RING_SPACE(chan, 12);
593 if (ret) 600 if (ret)
@@ -1418,6 +1425,8 @@ static const struct drm_crtc_funcs nv50_crtc_func = {
1418static int 1425static int
1419nv50_crtc_create(struct drm_device *dev, int index) 1426nv50_crtc_create(struct drm_device *dev, int index)
1420{ 1427{
1428 struct nouveau_drm *drm = nouveau_drm(dev);
1429 struct nvif_device *device = &drm->device;
1421 struct nv50_disp *disp = nv50_disp(dev); 1430 struct nv50_disp *disp = nv50_disp(dev);
1422 struct nv50_head *head; 1431 struct nv50_head *head;
1423 struct drm_crtc *crtc; 1432 struct drm_crtc *crtc;
@@ -1462,13 +1471,13 @@ nv50_crtc_create(struct drm_device *dev, int index)
1462 goto out; 1471 goto out;
1463 1472
1464 /* allocate cursor resources */ 1473 /* allocate cursor resources */
1465 ret = nv50_curs_create(disp->disp, index, &head->curs); 1474 ret = nv50_curs_create(device, disp->disp, index, &head->curs);
1466 if (ret) 1475 if (ret)
1467 goto out; 1476 goto out;
1468 1477
1469 /* allocate page flip / sync resources */ 1478 /* allocate page flip / sync resources */
1470 ret = nv50_base_create(disp->disp, index, disp->sync->bo.offset, 1479 ret = nv50_base_create(device, disp->disp, index, disp->sync->bo.offset,
1471 &head->sync); 1480 &head->sync);
1472 if (ret) 1481 if (ret)
1473 goto out; 1482 goto out;
1474 1483
@@ -1476,12 +1485,12 @@ nv50_crtc_create(struct drm_device *dev, int index)
1476 head->sync.data = 0x00000000; 1485 head->sync.data = 0x00000000;
1477 1486
1478 /* allocate overlay resources */ 1487 /* allocate overlay resources */
1479 ret = nv50_oimm_create(disp->disp, index, &head->oimm); 1488 ret = nv50_oimm_create(device, disp->disp, index, &head->oimm);
1480 if (ret) 1489 if (ret)
1481 goto out; 1490 goto out;
1482 1491
1483 ret = nv50_ovly_create(disp->disp, index, disp->sync->bo.offset, 1492 ret = nv50_ovly_create(device, disp->disp, index, disp->sync->bo.offset,
1484 &head->ovly); 1493 &head->ovly);
1485 if (ret) 1494 if (ret)
1486 goto out; 1495 goto out;
1487 1496
@@ -2370,8 +2379,8 @@ nv50_fbdma_init(struct drm_device *dev, u32 name, u64 offset, u64 length, u8 kin
2370 2379
2371 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 2380 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
2372 struct nv50_head *head = nv50_head(crtc); 2381 struct nv50_head *head = nv50_head(crtc);
2373 int ret = nvif_object_init(&head->sync.base.base.user, NULL, 2382 int ret = nvif_object_init(&head->sync.base.base.user, name,
2374 name, NV_DMA_IN_MEMORY, &args, size, 2383 NV_DMA_IN_MEMORY, &args, size,
2375 &fbdma->base[head->base.index]); 2384 &fbdma->base[head->base.index]);
2376 if (ret) { 2385 if (ret) {
2377 nv50_fbdma_fini(fbdma); 2386 nv50_fbdma_fini(fbdma);
@@ -2379,9 +2388,8 @@ nv50_fbdma_init(struct drm_device *dev, u32 name, u64 offset, u64 length, u8 kin
2379 } 2388 }
2380 } 2389 }
2381 2390
2382 ret = nvif_object_init(&mast->base.base.user, NULL, name, 2391 ret = nvif_object_init(&mast->base.base.user, name, NV_DMA_IN_MEMORY,
2383 NV_DMA_IN_MEMORY, &args, size, 2392 &args, size, &fbdma->core);
2384 &fbdma->core);
2385 if (ret) { 2393 if (ret) {
2386 nv50_fbdma_fini(fbdma); 2394 nv50_fbdma_fini(fbdma);
2387 return ret; 2395 return ret;
@@ -2534,14 +2542,14 @@ nv50_display_create(struct drm_device *dev)
2534 goto out; 2542 goto out;
2535 2543
2536 /* allocate master evo channel */ 2544 /* allocate master evo channel */
2537 ret = nv50_core_create(disp->disp, disp->sync->bo.offset, 2545 ret = nv50_core_create(device, disp->disp, disp->sync->bo.offset,
2538 &disp->mast); 2546 &disp->mast);
2539 if (ret) 2547 if (ret)
2540 goto out; 2548 goto out;
2541 2549
2542 /* create crtc objects to represent the hw heads */ 2550 /* create crtc objects to represent the hw heads */
2543 if (disp->disp->oclass >= GF110_DISP) 2551 if (disp->disp->oclass >= GF110_DISP)
2544 crtcs = nvif_rd32(device, 0x022448); 2552 crtcs = nvif_rd32(&device->object, 0x022448);
2545 else 2553 else
2546 crtcs = 2; 2554 crtcs = 2;
2547 2555
diff --git a/drivers/gpu/drm/nouveau/nv50_fbcon.c b/drivers/gpu/drm/nouveau/nv50_fbcon.c
index 901130b06072..e05499d6ed83 100644
--- a/drivers/gpu/drm/nouveau/nv50_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nv50_fbcon.c
@@ -183,7 +183,7 @@ nv50_fbcon_accel_init(struct fb_info *info)
183 return -EINVAL; 183 return -EINVAL;
184 } 184 }
185 185
186 ret = nvif_object_init(chan->object, NULL, 0x502d, 0x502d, NULL, 0, 186 ret = nvif_object_init(&chan->user, 0x502d, 0x502d, NULL, 0,
187 &nfbdev->twod); 187 &nfbdev->twod);
188 if (ret) 188 if (ret)
189 return ret; 189 return ret;
diff --git a/drivers/gpu/drm/nouveau/nv50_fence.c b/drivers/gpu/drm/nouveau/nv50_fence.c
index a82d9ea7c6fd..f0d96e5da6b4 100644
--- a/drivers/gpu/drm/nouveau/nv50_fence.c
+++ b/drivers/gpu/drm/nouveau/nv50_fence.c
@@ -51,7 +51,7 @@ nv50_fence_context_new(struct nouveau_channel *chan)
51 fctx->base.read = nv10_fence_read; 51 fctx->base.read = nv10_fence_read;
52 fctx->base.sync = nv17_fence_sync; 52 fctx->base.sync = nv17_fence_sync;
53 53
54 ret = nvif_object_init(chan->object, NULL, NvSema, NV_DMA_IN_MEMORY, 54 ret = nvif_object_init(&chan->user, NvSema, NV_DMA_IN_MEMORY,
55 &(struct nv_dma_v0) { 55 &(struct nv_dma_v0) {
56 .target = NV_DMA_V0_TARGET_VRAM, 56 .target = NV_DMA_V0_TARGET_VRAM,
57 .access = NV_DMA_V0_ACCESS_RDWR, 57 .access = NV_DMA_V0_ACCESS_RDWR,
@@ -66,7 +66,7 @@ nv50_fence_context_new(struct nouveau_channel *chan)
66 u32 start = bo->bo.mem.start * PAGE_SIZE; 66 u32 start = bo->bo.mem.start * PAGE_SIZE;
67 u32 limit = start + bo->bo.mem.size - 1; 67 u32 limit = start + bo->bo.mem.size - 1;
68 68
69 ret = nvif_object_init(chan->object, NULL, NvEvoSema0 + i, 69 ret = nvif_object_init(&chan->user, NvEvoSema0 + i,
70 NV_DMA_IN_MEMORY, &(struct nv_dma_v0) { 70 NV_DMA_IN_MEMORY, &(struct nv_dma_v0) {
71 .target = NV_DMA_V0_TARGET_VRAM, 71 .target = NV_DMA_V0_TARGET_VRAM,
72 .access = NV_DMA_V0_ACCESS_RDWR, 72 .access = NV_DMA_V0_ACCESS_RDWR,
diff --git a/drivers/gpu/drm/nouveau/nv84_fence.c b/drivers/gpu/drm/nouveau/nv84_fence.c
index 76098a58e2fa..4d7ad6d3fbd4 100644
--- a/drivers/gpu/drm/nouveau/nv84_fence.c
+++ b/drivers/gpu/drm/nouveau/nv84_fence.c
@@ -131,7 +131,7 @@ nv84_fence_context_del(struct nouveau_channel *chan)
131int 131int
132nv84_fence_context_new(struct nouveau_channel *chan) 132nv84_fence_context_new(struct nouveau_channel *chan)
133{ 133{
134 struct nouveau_cli *cli = (void *)nvif_client(&chan->device->base); 134 struct nouveau_cli *cli = (void *)chan->user.client;
135 struct nv84_fence_priv *priv = chan->drm->fence; 135 struct nv84_fence_priv *priv = chan->drm->fence;
136 struct nv84_fence_chan *fctx; 136 struct nv84_fence_chan *fctx;
137 int ret, i; 137 int ret, i;
diff --git a/drivers/gpu/drm/nouveau/nvc0_fbcon.c b/drivers/gpu/drm/nouveau/nvc0_fbcon.c
index fcd2e5f27bb9..c97395b4a312 100644
--- a/drivers/gpu/drm/nouveau/nvc0_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nvc0_fbcon.c
@@ -156,7 +156,7 @@ nvc0_fbcon_accel_init(struct fb_info *info)
156 struct nouveau_channel *chan = drm->channel; 156 struct nouveau_channel *chan = drm->channel;
157 int ret, format; 157 int ret, format;
158 158
159 ret = nvif_object_init(chan->object, NULL, 0x902d, 0x902d, NULL, 0, 159 ret = nvif_object_init(&chan->user, 0x902d, 0x902d, NULL, 0,
160 &nfbdev->twod); 160 &nfbdev->twod);
161 if (ret) 161 if (ret)
162 return ret; 162 return ret;
diff --git a/drivers/gpu/drm/nouveau/nvif/client.c b/drivers/gpu/drm/nouveau/nvif/client.c
index 80b96844221e..4a830ebf9661 100644
--- a/drivers/gpu/drm/nouveau/nvif/client.c
+++ b/drivers/gpu/drm/nouveau/nvif/client.c
@@ -29,29 +29,30 @@
29int 29int
30nvif_client_ioctl(struct nvif_client *client, void *data, u32 size) 30nvif_client_ioctl(struct nvif_client *client, void *data, u32 size)
31{ 31{
32 return client->driver->ioctl(client->base.priv, client->super, data, size, NULL); 32 return client->driver->ioctl(client->object.priv, client->super, data, size, NULL);
33} 33}
34 34
35int 35int
36nvif_client_suspend(struct nvif_client *client) 36nvif_client_suspend(struct nvif_client *client)
37{ 37{
38 return client->driver->suspend(client->base.priv); 38 return client->driver->suspend(client->object.priv);
39} 39}
40 40
41int 41int
42nvif_client_resume(struct nvif_client *client) 42nvif_client_resume(struct nvif_client *client)
43{ 43{
44 return client->driver->resume(client->base.priv); 44 return client->driver->resume(client->object.priv);
45} 45}
46 46
47void 47void
48nvif_client_fini(struct nvif_client *client) 48nvif_client_fini(struct nvif_client *client)
49{ 49{
50 if (client->driver) { 50 if (client->driver) {
51 client->driver->fini(client->base.priv); 51 client->driver->fini(client->object.priv);
52 client->driver = NULL; 52 client->driver = NULL;
53 client->base.parent = NULL; 53 client->object.parent = NULL;
54 nvif_object_fini(&client->base); 54 client->object.client = NULL;
55 nvif_object_fini(&client->object);
55 } 56 }
56} 57}
57 58
@@ -68,25 +69,25 @@ nvif_drivers[] = {
68}; 69};
69 70
70int 71int
71nvif_client_init(void (*dtor)(struct nvif_client *), const char *driver, 72nvif_client_init(const char *driver, const char *name, u64 device,
72 const char *name, u64 device, const char *cfg, const char *dbg, 73 const char *cfg, const char *dbg, struct nvif_client *client)
73 struct nvif_client *client)
74{ 74{
75 int ret, i; 75 int ret, i;
76 76
77 ret = nvif_object_init(NULL, (void*)dtor, 0, 0, NULL, 0, &client->base); 77 ret = nvif_object_init(NULL, 0, 0, NULL, 0, &client->object);
78 if (ret) 78 if (ret)
79 return ret; 79 return ret;
80 80
81 client->base.parent = &client->base; 81 client->object.client = client;
82 client->base.handle = ~0; 82 client->object.parent = &client->object;
83 client->object = &client->base; 83 client->object.handle = ~0;
84 client->route = NVIF_IOCTL_V0_ROUTE_NVIF;
84 client->super = true; 85 client->super = true;
85 86
86 for (i = 0, ret = -EINVAL; (client->driver = nvif_drivers[i]); i++) { 87 for (i = 0, ret = -EINVAL; (client->driver = nvif_drivers[i]); i++) {
87 if (!driver || !strcmp(client->driver->name, driver)) { 88 if (!driver || !strcmp(client->driver->name, driver)) {
88 ret = client->driver->init(name, device, cfg, dbg, 89 ret = client->driver->init(name, device, cfg, dbg,
89 &client->base.priv); 90 &client->object.priv);
90 if (!ret || driver) 91 if (!ret || driver)
91 break; 92 break;
92 } 93 }
@@ -96,35 +97,3 @@ nvif_client_init(void (*dtor)(struct nvif_client *), const char *driver,
96 nvif_client_fini(client); 97 nvif_client_fini(client);
97 return ret; 98 return ret;
98} 99}
99
100static void
101nvif_client_del(struct nvif_client *client)
102{
103 nvif_client_fini(client);
104 kfree(client);
105}
106
107int
108nvif_client_new(const char *driver, const char *name, u64 device,
109 const char *cfg, const char *dbg,
110 struct nvif_client **pclient)
111{
112 struct nvif_client *client = kzalloc(sizeof(*client), GFP_KERNEL);
113 if (client) {
114 int ret = nvif_client_init(nvif_client_del, driver, name,
115 device, cfg, dbg, client);
116 if (ret) {
117 kfree(client);
118 client = NULL;
119 }
120 *pclient = client;
121 return ret;
122 }
123 return -ENOMEM;
124}
125
126void
127nvif_client_ref(struct nvif_client *client, struct nvif_client **pclient)
128{
129 nvif_object_ref(&client->base, (struct nvif_object **)pclient);
130}
diff --git a/drivers/gpu/drm/nouveau/nvif/device.c b/drivers/gpu/drm/nouveau/nvif/device.c
index 837442c69a5d..f15d51a69df2 100644
--- a/drivers/gpu/drm/nouveau/nvif/device.c
+++ b/drivers/gpu/drm/nouveau/nvif/device.c
@@ -33,52 +33,19 @@ nvif_device_time(struct nvif_device *device)
33void 33void
34nvif_device_fini(struct nvif_device *device) 34nvif_device_fini(struct nvif_device *device)
35{ 35{
36 nvif_object_fini(&device->base); 36 nvif_object_fini(&device->object);
37} 37}
38 38
39int 39int
40nvif_device_init(struct nvif_object *parent, void (*dtor)(struct nvif_device *), 40nvif_device_init(struct nvif_object *parent, u32 handle, u32 oclass,
41 u32 handle, u32 oclass, void *data, u32 size, 41 void *data, u32 size, struct nvif_device *device)
42 struct nvif_device *device)
43{ 42{
44 int ret = nvif_object_init(parent, (void *)dtor, handle, oclass, 43 int ret = nvif_object_init(parent, handle, oclass, data, size,
45 data, size, &device->base); 44 &device->object);
46 if (ret == 0) { 45 if (ret == 0) {
47 device->object = &device->base;
48 device->info.version = 0; 46 device->info.version = 0;
49 ret = nvif_object_mthd(&device->base, NV_DEVICE_V0_INFO, 47 ret = nvif_object_mthd(&device->object, NV_DEVICE_V0_INFO,
50 &device->info, sizeof(device->info)); 48 &device->info, sizeof(device->info));
51 } 49 }
52 return ret; 50 return ret;
53} 51}
54
55static void
56nvif_device_del(struct nvif_device *device)
57{
58 nvif_device_fini(device);
59 kfree(device);
60}
61
62int
63nvif_device_new(struct nvif_object *parent, u32 handle, u32 oclass,
64 void *data, u32 size, struct nvif_device **pdevice)
65{
66 struct nvif_device *device = kzalloc(sizeof(*device), GFP_KERNEL);
67 if (device) {
68 int ret = nvif_device_init(parent, nvif_device_del, handle,
69 oclass, data, size, device);
70 if (ret) {
71 kfree(device);
72 device = NULL;
73 }
74 *pdevice = device;
75 return ret;
76 }
77 return -ENOMEM;
78}
79
80void
81nvif_device_ref(struct nvif_device *device, struct nvif_device **pdevice)
82{
83 nvif_object_ref(&device->base, (struct nvif_object **)pdevice);
84}
diff --git a/drivers/gpu/drm/nouveau/nvif/notify.c b/drivers/gpu/drm/nouveau/nvif/notify.c
index 8e34748709a0..b0787ff833ef 100644
--- a/drivers/gpu/drm/nouveau/nvif/notify.c
+++ b/drivers/gpu/drm/nouveau/nvif/notify.c
@@ -124,7 +124,7 @@ nvif_notify(const void *header, u32 length, const void *data, u32 size)
124 } 124 }
125 125
126 if (!WARN_ON(notify == NULL)) { 126 if (!WARN_ON(notify == NULL)) {
127 struct nvif_client *client = nvif_client(notify->object); 127 struct nvif_client *client = notify->object->client;
128 if (!WARN_ON(notify->size != size)) { 128 if (!WARN_ON(notify->size != size)) {
129 atomic_inc(&notify->putcnt); 129 atomic_inc(&notify->putcnt);
130 if (test_bit(NVIF_NOTIFY_WORK, &notify->flags)) { 130 if (test_bit(NVIF_NOTIFY_WORK, &notify->flags)) {
@@ -156,7 +156,7 @@ nvif_notify_fini(struct nvif_notify *notify)
156 if (ret >= 0 && object) { 156 if (ret >= 0 && object) {
157 ret = nvif_object_ioctl(object, &args, sizeof(args), NULL); 157 ret = nvif_object_ioctl(object, &args, sizeof(args), NULL);
158 if (ret == 0) { 158 if (ret == 0) {
159 nvif_object_ref(NULL, &notify->object); 159 notify->object = NULL;
160 kfree((void *)notify->data); 160 kfree((void *)notify->data);
161 } 161 }
162 } 162 }
@@ -164,9 +164,9 @@ nvif_notify_fini(struct nvif_notify *notify)
164} 164}
165 165
166int 166int
167nvif_notify_init(struct nvif_object *object, void (*dtor)(struct nvif_notify *), 167nvif_notify_init(struct nvif_object *object, int (*func)(struct nvif_notify *),
168 int (*func)(struct nvif_notify *), bool work, u8 event, 168 bool work, u8 event, void *data, u32 size, u32 reply,
169 void *data, u32 size, u32 reply, struct nvif_notify *notify) 169 struct nvif_notify *notify)
170{ 170{
171 struct { 171 struct {
172 struct nvif_ioctl_v0 ioctl; 172 struct nvif_ioctl_v0 ioctl;
@@ -175,11 +175,9 @@ nvif_notify_init(struct nvif_object *object, void (*dtor)(struct nvif_notify *),
175 } *args; 175 } *args;
176 int ret = -ENOMEM; 176 int ret = -ENOMEM;
177 177
178 notify->object = NULL; 178 notify->object = object;
179 nvif_object_ref(object, &notify->object);
180 notify->flags = 0; 179 notify->flags = 0;
181 atomic_set(&notify->putcnt, 1); 180 atomic_set(&notify->putcnt, 1);
182 notify->dtor = dtor;
183 notify->func = func; 181 notify->func = func;
184 notify->data = NULL; 182 notify->data = NULL;
185 notify->size = reply; 183 notify->size = reply;
@@ -211,38 +209,3 @@ done:
211 nvif_notify_fini(notify); 209 nvif_notify_fini(notify);
212 return ret; 210 return ret;
213} 211}
214
215static void
216nvif_notify_del(struct nvif_notify *notify)
217{
218 nvif_notify_fini(notify);
219 kfree(notify);
220}
221
222void
223nvif_notify_ref(struct nvif_notify *notify, struct nvif_notify **pnotify)
224{
225 BUG_ON(notify != NULL);
226 if (*pnotify)
227 (*pnotify)->dtor(*pnotify);
228 *pnotify = notify;
229}
230
231int
232nvif_notify_new(struct nvif_object *object, int (*func)(struct nvif_notify *),
233 bool work, u8 type, void *data, u32 size, u32 reply,
234 struct nvif_notify **pnotify)
235{
236 struct nvif_notify *notify = kzalloc(sizeof(*notify), GFP_KERNEL);
237 if (notify) {
238 int ret = nvif_notify_init(object, nvif_notify_del, func, work,
239 type, data, size, reply, notify);
240 if (ret) {
241 kfree(notify);
242 notify = NULL;
243 }
244 *pnotify = notify;
245 return ret;
246 }
247 return -ENOMEM;
248}
diff --git a/drivers/gpu/drm/nouveau/nvif/object.c b/drivers/gpu/drm/nouveau/nvif/object.c
index 3ab4e2f8cc12..a727f72ca234 100644
--- a/drivers/gpu/drm/nouveau/nvif/object.c
+++ b/drivers/gpu/drm/nouveau/nvif/object.c
@@ -30,7 +30,7 @@
30int 30int
31nvif_object_ioctl(struct nvif_object *object, void *data, u32 size, void **hack) 31nvif_object_ioctl(struct nvif_object *object, void *data, u32 size, void **hack)
32{ 32{
33 struct nvif_client *client = nvif_client(object); 33 struct nvif_client *client = object->client;
34 union { 34 union {
35 struct nvif_ioctl_v0 v0; 35 struct nvif_ioctl_v0 v0;
36 } *args = data; 36 } *args = data;
@@ -47,7 +47,8 @@ nvif_object_ioctl(struct nvif_object *object, void *data, u32 size, void **hack)
47 } else 47 } else
48 return -ENOSYS; 48 return -ENOSYS;
49 49
50 return client->driver->ioctl(client->base.priv, client->super, data, size, hack); 50 return client->driver->ioctl(client->object.priv, client->super,
51 data, size, hack);
51} 52}
52 53
53int 54int
@@ -145,7 +146,7 @@ void
145nvif_object_unmap(struct nvif_object *object) 146nvif_object_unmap(struct nvif_object *object)
146{ 147{
147 if (object->map.size) { 148 if (object->map.size) {
148 struct nvif_client *client = nvif_client(object); 149 struct nvif_client *client = object->client;
149 struct { 150 struct {
150 struct nvif_ioctl_v0 ioctl; 151 struct nvif_ioctl_v0 ioctl;
151 struct nvif_ioctl_unmap unmap; 152 struct nvif_ioctl_unmap unmap;
@@ -167,7 +168,7 @@ nvif_object_unmap(struct nvif_object *object)
167int 168int
168nvif_object_map(struct nvif_object *object) 169nvif_object_map(struct nvif_object *object)
169{ 170{
170 struct nvif_client *client = nvif_client(object); 171 struct nvif_client *client = object->client;
171 struct { 172 struct {
172 struct nvif_ioctl_v0 ioctl; 173 struct nvif_ioctl_v0 ioctl;
173 struct nvif_ioctl_map_v0 map; 174 struct nvif_ioctl_map_v0 map;
@@ -186,119 +187,65 @@ nvif_object_map(struct nvif_object *object)
186 return ret; 187 return ret;
187} 188}
188 189
189struct ctor {
190 struct nvif_ioctl_v0 ioctl;
191 struct nvif_ioctl_new_v0 new;
192};
193
194void 190void
195nvif_object_fini(struct nvif_object *object) 191nvif_object_fini(struct nvif_object *object)
196{ 192{
197 struct ctor *ctor = container_of(object->data, typeof(*ctor), new.data); 193 struct {
198 if (object->parent) { 194 struct nvif_ioctl_v0 ioctl;
199 struct { 195 struct nvif_ioctl_del del;
200 struct nvif_ioctl_v0 ioctl; 196 } args = {
201 struct nvif_ioctl_del del; 197 .ioctl.type = NVIF_IOCTL_V0_DEL,
202 } args = { 198 };
203 .ioctl.type = NVIF_IOCTL_V0_DEL,
204 };
205 199
206 nvif_object_unmap(object); 200 if (!object->client)
207 nvif_object_ioctl(object, &args, sizeof(args), NULL); 201 return;
208 if (object->data) { 202
209 object->size = 0; 203 nvif_object_unmap(object);
210 object->data = NULL; 204 nvif_object_ioctl(object, &args, sizeof(args), NULL);
211 kfree(ctor); 205 object->client = NULL;
212 }
213 nvif_object_ref(NULL, &object->parent);
214 }
215} 206}
216 207
217int 208int
218nvif_object_init(struct nvif_object *parent, void (*dtor)(struct nvif_object *), 209nvif_object_init(struct nvif_object *parent, u32 handle, u32 oclass,
219 u32 handle, u32 oclass, void *data, u32 size, 210 void *data, u32 size, struct nvif_object *object)
220 struct nvif_object *object)
221{ 211{
222 struct ctor *ctor; 212 struct {
213 struct nvif_ioctl_v0 ioctl;
214 struct nvif_ioctl_new_v0 new;
215 } *args;
223 int ret = 0; 216 int ret = 0;
224 217
225 object->parent = NULL; 218 object->client = NULL;
226 object->object = object; 219 object->parent = parent;
227 nvif_object_ref(parent, &object->parent);
228 kref_init(&object->refcount);
229 object->handle = handle; 220 object->handle = handle;
230 object->oclass = oclass; 221 object->oclass = oclass;
231 object->data = NULL;
232 object->size = 0;
233 object->dtor = dtor;
234 object->map.ptr = NULL; 222 object->map.ptr = NULL;
235 object->map.size = 0; 223 object->map.size = 0;
236 224
237 if (object->parent) { 225 if (object->parent) {
238 if (!(ctor = kmalloc(sizeof(*ctor) + size, GFP_KERNEL))) { 226 if (!(args = kmalloc(sizeof(*args) + size, GFP_KERNEL))) {
239 nvif_object_fini(object); 227 nvif_object_fini(object);
240 return -ENOMEM; 228 return -ENOMEM;
241 } 229 }
242 object->data = ctor->new.data;
243 object->size = size;
244 memcpy(object->data, data, size);
245 230
246 ctor->ioctl.version = 0; 231 args->ioctl.version = 0;
247 ctor->ioctl.type = NVIF_IOCTL_V0_NEW; 232 args->ioctl.type = NVIF_IOCTL_V0_NEW;
248 ctor->new.version = 0; 233 args->new.version = 0;
249 ctor->new.route = NVIF_IOCTL_V0_ROUTE_NVIF; 234 args->new.route = parent->client->route;
250 ctor->new.token = (unsigned long)(void *)object; 235 args->new.token = (unsigned long)(void *)object;
251 ctor->new.handle = handle; 236 args->new.handle = handle;
252 ctor->new.oclass = oclass; 237 args->new.oclass = oclass;
253 238
254 ret = nvif_object_ioctl(parent, ctor, sizeof(*ctor) + 239 memcpy(args->new.data, data, size);
255 object->size, &object->priv); 240 ret = nvif_object_ioctl(parent, args, sizeof(*args) + size,
241 &object->priv);
242 memcpy(data, args->new.data, size);
243 kfree(args);
244 if (ret == 0)
245 object->client = parent->client;
256 } 246 }
257 247
258 if (ret) 248 if (ret)
259 nvif_object_fini(object); 249 nvif_object_fini(object);
260 return ret; 250 return ret;
261} 251}
262
263static void
264nvif_object_del(struct nvif_object *object)
265{
266 nvif_object_fini(object);
267 kfree(object);
268}
269
270int
271nvif_object_new(struct nvif_object *parent, u32 handle, u32 oclass,
272 void *data, u32 size, struct nvif_object **pobject)
273{
274 struct nvif_object *object = kzalloc(sizeof(*object), GFP_KERNEL);
275 if (object) {
276 int ret = nvif_object_init(parent, nvif_object_del, handle,
277 oclass, data, size, object);
278 if (ret) {
279 kfree(object);
280 object = NULL;
281 }
282 *pobject = object;
283 return ret;
284 }
285 return -ENOMEM;
286}
287
288static void
289nvif_object_put(struct kref *kref)
290{
291 struct nvif_object *object =
292 container_of(kref, typeof(*object), refcount);
293 object->dtor(object);
294}
295
296void
297nvif_object_ref(struct nvif_object *object, struct nvif_object **pobject)
298{
299 if (object)
300 kref_get(&object->refcount);
301 if (*pobject)
302 kref_put(&(*pobject)->refcount, nvif_object_put);
303 *pobject = object;
304}
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-24 01:01:57 -0500