diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2011-07-03 23:25:17 -0400 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2011-09-20 02:05:20 -0400 |
commit | d9f61c2d2847fb2889ed01d2240db38927ab7e18 (patch) | |
tree | 86f4363ad036c5a5e0c6c9b54c6cfe77dd72d510 /drivers/gpu/drm | |
parent | 03bc9675d358ded9db07ba966f2f3f3c2fba2a9c (diff) |
drm/nouveau: initial chipset description for nvdX chipsets
All the non-stubbed functions should be okay for this chipset, the rest
will be added back as they're figured out.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_state.c | 48 |
1 files changed, 46 insertions, 2 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c index d3b026125af1..10b201102231 100644 --- a/drivers/gpu/drm/nouveau/nouveau_state.c +++ b/drivers/gpu/drm/nouveau/nouveau_state.c | |||
@@ -299,7 +299,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev) | |||
299 | case 0x50: | 299 | case 0x50: |
300 | case 0x80: /* gotta love NVIDIA's consistency.. */ | 300 | case 0x80: /* gotta love NVIDIA's consistency.. */ |
301 | case 0x90: | 301 | case 0x90: |
302 | case 0xA0: | 302 | case 0xa0: |
303 | engine->instmem.init = nv50_instmem_init; | 303 | engine->instmem.init = nv50_instmem_init; |
304 | engine->instmem.takedown = nv50_instmem_takedown; | 304 | engine->instmem.takedown = nv50_instmem_takedown; |
305 | engine->instmem.suspend = nv50_instmem_suspend; | 305 | engine->instmem.suspend = nv50_instmem_suspend; |
@@ -376,7 +376,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev) | |||
376 | engine->vram.put = nv50_vram_del; | 376 | engine->vram.put = nv50_vram_del; |
377 | engine->vram.flags_valid = nv50_vram_flags_valid; | 377 | engine->vram.flags_valid = nv50_vram_flags_valid; |
378 | break; | 378 | break; |
379 | case 0xC0: | 379 | case 0xc0: |
380 | engine->instmem.init = nvc0_instmem_init; | 380 | engine->instmem.init = nvc0_instmem_init; |
381 | engine->instmem.takedown = nvc0_instmem_takedown; | 381 | engine->instmem.takedown = nvc0_instmem_takedown; |
382 | engine->instmem.suspend = nvc0_instmem_suspend; | 382 | engine->instmem.suspend = nvc0_instmem_suspend; |
@@ -426,6 +426,47 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev) | |||
426 | engine->pm.voltage_get = nouveau_voltage_gpio_get; | 426 | engine->pm.voltage_get = nouveau_voltage_gpio_get; |
427 | engine->pm.voltage_set = nouveau_voltage_gpio_set; | 427 | engine->pm.voltage_set = nouveau_voltage_gpio_set; |
428 | break; | 428 | break; |
429 | case 0xd0: | ||
430 | engine->instmem.init = nvc0_instmem_init; | ||
431 | engine->instmem.takedown = nvc0_instmem_takedown; | ||
432 | engine->instmem.suspend = nvc0_instmem_suspend; | ||
433 | engine->instmem.resume = nvc0_instmem_resume; | ||
434 | engine->instmem.get = nv50_instmem_get; | ||
435 | engine->instmem.put = nv50_instmem_put; | ||
436 | engine->instmem.map = nv50_instmem_map; | ||
437 | engine->instmem.unmap = nv50_instmem_unmap; | ||
438 | engine->instmem.flush = nv84_instmem_flush; | ||
439 | engine->mc.init = nv50_mc_init; | ||
440 | engine->mc.takedown = nv50_mc_takedown; | ||
441 | engine->timer.init = nv04_timer_init; | ||
442 | engine->timer.read = nv04_timer_read; | ||
443 | engine->timer.takedown = nv04_timer_takedown; | ||
444 | engine->fb.init = nvc0_fb_init; | ||
445 | engine->fb.takedown = nvc0_fb_takedown; | ||
446 | engine->fifo.channels = 128; | ||
447 | engine->fifo.init = nvc0_fifo_init; | ||
448 | engine->fifo.takedown = nvc0_fifo_takedown; | ||
449 | engine->fifo.disable = nvc0_fifo_disable; | ||
450 | engine->fifo.enable = nvc0_fifo_enable; | ||
451 | engine->fifo.reassign = nvc0_fifo_reassign; | ||
452 | engine->fifo.channel_id = nvc0_fifo_channel_id; | ||
453 | engine->fifo.create_context = nvc0_fifo_create_context; | ||
454 | engine->fifo.destroy_context = nvc0_fifo_destroy_context; | ||
455 | engine->fifo.load_context = nvc0_fifo_load_context; | ||
456 | engine->fifo.unload_context = nvc0_fifo_unload_context; | ||
457 | engine->display.early_init = nouveau_stub_init; | ||
458 | engine->display.late_takedown = nouveau_stub_takedown; | ||
459 | engine->display.create = nouveau_stub_init; | ||
460 | engine->display.init = nouveau_stub_init; | ||
461 | engine->display.destroy = nouveau_stub_takedown; | ||
462 | engine->gpio.init = nouveau_stub_init; | ||
463 | engine->gpio.takedown = nouveau_stub_takedown; | ||
464 | engine->vram.init = nvc0_vram_init; | ||
465 | engine->vram.takedown = nv50_vram_fini; | ||
466 | engine->vram.get = nvc0_vram_new; | ||
467 | engine->vram.put = nv50_vram_del; | ||
468 | engine->vram.flags_valid = nvc0_vram_flags_valid; | ||
469 | break; | ||
429 | default: | 470 | default: |
430 | NV_ERROR(dev, "NV%02x unsupported\n", dev_priv->chipset); | 471 | NV_ERROR(dev, "NV%02x unsupported\n", dev_priv->chipset); |
431 | return 1; | 472 | return 1; |
@@ -1015,6 +1056,9 @@ int nouveau_load(struct drm_device *dev, unsigned long flags) | |||
1015 | case 0xc0: | 1056 | case 0xc0: |
1016 | dev_priv->card_type = NV_C0; | 1057 | dev_priv->card_type = NV_C0; |
1017 | break; | 1058 | break; |
1059 | case 0xd0: | ||
1060 | dev_priv->card_type = NV_D0; | ||
1061 | break; | ||
1018 | default: | 1062 | default: |
1019 | NV_INFO(dev, "Unsupported chipset 0x%08x\n", reg0); | 1063 | NV_INFO(dev, "Unsupported chipset 0x%08x\n", reg0); |
1020 | ret = -EINVAL; | 1064 | ret = -EINVAL; |