diff options
author | Christian König <christian.koenig@amd.com> | 2014-05-27 10:49:20 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2014-06-02 10:25:11 -0400 |
commit | 157fa14dc4065ce7536473e643c95385d87bd580 (patch) | |
tree | 5b8dc7b22503c1e8009a9a01b39e54b1ece9bf1a /drivers/gpu/drm | |
parent | 75f36d861957cb05b7889af24c8cd4a789398304 (diff) |
drm/radeon: split page flip and pending callback
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 18 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r100.c | 21 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_asic.c | 22 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_asic.h | 15 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_display.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rs600.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rv770.c | 10 |
8 files changed, 88 insertions, 15 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index ec31a8220836..336f0a56edce 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -1313,7 +1313,7 @@ void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc) | |||
1313 | * double buffered update to take place. | 1313 | * double buffered update to take place. |
1314 | * Returns the current update pending status. | 1314 | * Returns the current update pending status. |
1315 | */ | 1315 | */ |
1316 | u32 evergreen_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) | 1316 | void evergreen_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) |
1317 | { | 1317 | { |
1318 | struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; | 1318 | struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; |
1319 | u32 tmp = RREG32(EVERGREEN_GRPH_UPDATE + radeon_crtc->crtc_offset); | 1319 | u32 tmp = RREG32(EVERGREEN_GRPH_UPDATE + radeon_crtc->crtc_offset); |
@@ -1345,9 +1345,23 @@ u32 evergreen_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) | |||
1345 | /* Unlock the lock, so double-buffering can take place inside vblank */ | 1345 | /* Unlock the lock, so double-buffering can take place inside vblank */ |
1346 | tmp &= ~EVERGREEN_GRPH_UPDATE_LOCK; | 1346 | tmp &= ~EVERGREEN_GRPH_UPDATE_LOCK; |
1347 | WREG32(EVERGREEN_GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); | 1347 | WREG32(EVERGREEN_GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); |
1348 | } | ||
1349 | |||
1350 | /** | ||
1351 | * evergreen_page_flip_pending - check if page flip is still pending | ||
1352 | * | ||
1353 | * @rdev: radeon_device pointer | ||
1354 | * @crtc_id: crtc to check | ||
1355 | * | ||
1356 | * Returns the current update pending status. | ||
1357 | */ | ||
1358 | bool evergreen_page_flip_pending(struct radeon_device *rdev, int crtc_id) | ||
1359 | { | ||
1360 | struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; | ||
1348 | 1361 | ||
1349 | /* Return current update_pending status: */ | 1362 | /* Return current update_pending status: */ |
1350 | return RREG32(EVERGREEN_GRPH_UPDATE + radeon_crtc->crtc_offset) & EVERGREEN_GRPH_SURFACE_UPDATE_PENDING; | 1363 | return !!(RREG32(EVERGREEN_GRPH_UPDATE + radeon_crtc->crtc_offset) & |
1364 | EVERGREEN_GRPH_SURFACE_UPDATE_PENDING); | ||
1351 | } | 1365 | } |
1352 | 1366 | ||
1353 | /* get temperature in millidegrees */ | 1367 | /* get temperature in millidegrees */ |
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 840651f33610..52548f7bbb5a 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c | |||
@@ -152,9 +152,8 @@ void r100_wait_for_vblank(struct radeon_device *rdev, int crtc) | |||
152 | * During vblank we take the crtc lock and wait for the update_pending | 152 | * During vblank we take the crtc lock and wait for the update_pending |
153 | * bit to go high, when it does, we release the lock, and allow the | 153 | * bit to go high, when it does, we release the lock, and allow the |
154 | * double buffered update to take place. | 154 | * double buffered update to take place. |
155 | * Returns the current update pending status. | ||
156 | */ | 155 | */ |
157 | u32 r100_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) | 156 | void r100_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) |
158 | { | 157 | { |
159 | struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; | 158 | struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; |
160 | u32 tmp = ((u32)crtc_base) | RADEON_CRTC_OFFSET__OFFSET_LOCK; | 159 | u32 tmp = ((u32)crtc_base) | RADEON_CRTC_OFFSET__OFFSET_LOCK; |
@@ -176,8 +175,24 @@ u32 r100_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) | |||
176 | tmp &= ~RADEON_CRTC_OFFSET__OFFSET_LOCK; | 175 | tmp &= ~RADEON_CRTC_OFFSET__OFFSET_LOCK; |
177 | WREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset, tmp); | 176 | WREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset, tmp); |
178 | 177 | ||
178 | } | ||
179 | |||
180 | /** | ||
181 | * r100_page_flip_pending - check if page flip is still pending | ||
182 | * | ||
183 | * @rdev: radeon_device pointer | ||
184 | * @crtc_id: crtc to check | ||
185 | * | ||
186 | * Check if the last pagefilp is still pending (r1xx-r4xx). | ||
187 | * Returns the current update pending status. | ||
188 | */ | ||
189 | bool r100_page_flip_pending(struct radeon_device *rdev, int crtc_id) | ||
190 | { | ||
191 | struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; | ||
192 | |||
179 | /* Return current update_pending status: */ | 193 | /* Return current update_pending status: */ |
180 | return RREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset) & RADEON_CRTC_OFFSET__GUI_TRIG_OFFSET; | 194 | return !!(RREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset) & |
195 | RADEON_CRTC_OFFSET__GUI_TRIG_OFFSET); | ||
181 | } | 196 | } |
182 | 197 | ||
183 | /** | 198 | /** |
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 2b919afd7d4c..4ae304d7e932 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -1881,7 +1881,8 @@ struct radeon_asic { | |||
1881 | } dpm; | 1881 | } dpm; |
1882 | /* pageflipping */ | 1882 | /* pageflipping */ |
1883 | struct { | 1883 | struct { |
1884 | u32 (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base); | 1884 | void (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base); |
1885 | bool (*page_flip_pending)(struct radeon_device *rdev, int crtc); | ||
1885 | } pflip; | 1886 | } pflip; |
1886 | }; | 1887 | }; |
1887 | 1888 | ||
@@ -2741,6 +2742,7 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v); | |||
2741 | #define radeon_pm_init_profile(rdev) (rdev)->asic->pm.init_profile((rdev)) | 2742 | #define radeon_pm_init_profile(rdev) (rdev)->asic->pm.init_profile((rdev)) |
2742 | #define radeon_pm_get_dynpm_state(rdev) (rdev)->asic->pm.get_dynpm_state((rdev)) | 2743 | #define radeon_pm_get_dynpm_state(rdev) (rdev)->asic->pm.get_dynpm_state((rdev)) |
2743 | #define radeon_page_flip(rdev, crtc, base) (rdev)->asic->pflip.page_flip((rdev), (crtc), (base)) | 2744 | #define radeon_page_flip(rdev, crtc, base) (rdev)->asic->pflip.page_flip((rdev), (crtc), (base)) |
2745 | #define radeon_page_flip_pending(rdev, crtc) (rdev)->asic->pflip.page_flip_pending((rdev), (crtc)) | ||
2744 | #define radeon_wait_for_vblank(rdev, crtc) (rdev)->asic->display.wait_for_vblank((rdev), (crtc)) | 2746 | #define radeon_wait_for_vblank(rdev, crtc) (rdev)->asic->display.wait_for_vblank((rdev), (crtc)) |
2745 | #define radeon_mc_wait_for_idle(rdev) (rdev)->asic->mc_wait_for_idle((rdev)) | 2747 | #define radeon_mc_wait_for_idle(rdev) (rdev)->asic->mc_wait_for_idle((rdev)) |
2746 | #define radeon_get_xclk(rdev) (rdev)->asic->get_xclk((rdev)) | 2748 | #define radeon_get_xclk(rdev) (rdev)->asic->get_xclk((rdev)) |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index cb7a0eafadfc..d8e1587d89cf 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c | |||
@@ -249,6 +249,7 @@ static struct radeon_asic r100_asic = { | |||
249 | }, | 249 | }, |
250 | .pflip = { | 250 | .pflip = { |
251 | .page_flip = &r100_page_flip, | 251 | .page_flip = &r100_page_flip, |
252 | .page_flip_pending = &r100_page_flip_pending, | ||
252 | }, | 253 | }, |
253 | }; | 254 | }; |
254 | 255 | ||
@@ -314,6 +315,7 @@ static struct radeon_asic r200_asic = { | |||
314 | }, | 315 | }, |
315 | .pflip = { | 316 | .pflip = { |
316 | .page_flip = &r100_page_flip, | 317 | .page_flip = &r100_page_flip, |
318 | .page_flip_pending = &r100_page_flip_pending, | ||
317 | }, | 319 | }, |
318 | }; | 320 | }; |
319 | 321 | ||
@@ -393,6 +395,7 @@ static struct radeon_asic r300_asic = { | |||
393 | }, | 395 | }, |
394 | .pflip = { | 396 | .pflip = { |
395 | .page_flip = &r100_page_flip, | 397 | .page_flip = &r100_page_flip, |
398 | .page_flip_pending = &r100_page_flip_pending, | ||
396 | }, | 399 | }, |
397 | }; | 400 | }; |
398 | 401 | ||
@@ -458,6 +461,7 @@ static struct radeon_asic r300_asic_pcie = { | |||
458 | }, | 461 | }, |
459 | .pflip = { | 462 | .pflip = { |
460 | .page_flip = &r100_page_flip, | 463 | .page_flip = &r100_page_flip, |
464 | .page_flip_pending = &r100_page_flip_pending, | ||
461 | }, | 465 | }, |
462 | }; | 466 | }; |
463 | 467 | ||
@@ -523,6 +527,7 @@ static struct radeon_asic r420_asic = { | |||
523 | }, | 527 | }, |
524 | .pflip = { | 528 | .pflip = { |
525 | .page_flip = &r100_page_flip, | 529 | .page_flip = &r100_page_flip, |
530 | .page_flip_pending = &r100_page_flip_pending, | ||
526 | }, | 531 | }, |
527 | }; | 532 | }; |
528 | 533 | ||
@@ -588,6 +593,7 @@ static struct radeon_asic rs400_asic = { | |||
588 | }, | 593 | }, |
589 | .pflip = { | 594 | .pflip = { |
590 | .page_flip = &r100_page_flip, | 595 | .page_flip = &r100_page_flip, |
596 | .page_flip_pending = &r100_page_flip_pending, | ||
591 | }, | 597 | }, |
592 | }; | 598 | }; |
593 | 599 | ||
@@ -655,6 +661,7 @@ static struct radeon_asic rs600_asic = { | |||
655 | }, | 661 | }, |
656 | .pflip = { | 662 | .pflip = { |
657 | .page_flip = &rs600_page_flip, | 663 | .page_flip = &rs600_page_flip, |
664 | .page_flip_pending = &rs600_page_flip_pending, | ||
658 | }, | 665 | }, |
659 | }; | 666 | }; |
660 | 667 | ||
@@ -722,6 +729,7 @@ static struct radeon_asic rs690_asic = { | |||
722 | }, | 729 | }, |
723 | .pflip = { | 730 | .pflip = { |
724 | .page_flip = &rs600_page_flip, | 731 | .page_flip = &rs600_page_flip, |
732 | .page_flip_pending = &rs600_page_flip_pending, | ||
725 | }, | 733 | }, |
726 | }; | 734 | }; |
727 | 735 | ||
@@ -787,6 +795,7 @@ static struct radeon_asic rv515_asic = { | |||
787 | }, | 795 | }, |
788 | .pflip = { | 796 | .pflip = { |
789 | .page_flip = &rs600_page_flip, | 797 | .page_flip = &rs600_page_flip, |
798 | .page_flip_pending = &rs600_page_flip_pending, | ||
790 | }, | 799 | }, |
791 | }; | 800 | }; |
792 | 801 | ||
@@ -852,6 +861,7 @@ static struct radeon_asic r520_asic = { | |||
852 | }, | 861 | }, |
853 | .pflip = { | 862 | .pflip = { |
854 | .page_flip = &rs600_page_flip, | 863 | .page_flip = &rs600_page_flip, |
864 | .page_flip_pending = &rs600_page_flip_pending, | ||
855 | }, | 865 | }, |
856 | }; | 866 | }; |
857 | 867 | ||
@@ -949,6 +959,7 @@ static struct radeon_asic r600_asic = { | |||
949 | }, | 959 | }, |
950 | .pflip = { | 960 | .pflip = { |
951 | .page_flip = &rs600_page_flip, | 961 | .page_flip = &rs600_page_flip, |
962 | .page_flip_pending = &rs600_page_flip_pending, | ||
952 | }, | 963 | }, |
953 | }; | 964 | }; |
954 | 965 | ||
@@ -1038,6 +1049,7 @@ static struct radeon_asic rv6xx_asic = { | |||
1038 | }, | 1049 | }, |
1039 | .pflip = { | 1050 | .pflip = { |
1040 | .page_flip = &rs600_page_flip, | 1051 | .page_flip = &rs600_page_flip, |
1052 | .page_flip_pending = &rs600_page_flip_pending, | ||
1041 | }, | 1053 | }, |
1042 | }; | 1054 | }; |
1043 | 1055 | ||
@@ -1127,6 +1139,7 @@ static struct radeon_asic rs780_asic = { | |||
1127 | }, | 1139 | }, |
1128 | .pflip = { | 1140 | .pflip = { |
1129 | .page_flip = &rs600_page_flip, | 1141 | .page_flip = &rs600_page_flip, |
1142 | .page_flip_pending = &rs600_page_flip_pending, | ||
1130 | }, | 1143 | }, |
1131 | }; | 1144 | }; |
1132 | 1145 | ||
@@ -1231,6 +1244,7 @@ static struct radeon_asic rv770_asic = { | |||
1231 | }, | 1244 | }, |
1232 | .pflip = { | 1245 | .pflip = { |
1233 | .page_flip = &rv770_page_flip, | 1246 | .page_flip = &rv770_page_flip, |
1247 | .page_flip_pending = &rv770_page_flip_pending, | ||
1234 | }, | 1248 | }, |
1235 | }; | 1249 | }; |
1236 | 1250 | ||
@@ -1348,6 +1362,7 @@ static struct radeon_asic evergreen_asic = { | |||
1348 | }, | 1362 | }, |
1349 | .pflip = { | 1363 | .pflip = { |
1350 | .page_flip = &evergreen_page_flip, | 1364 | .page_flip = &evergreen_page_flip, |
1365 | .page_flip_pending = &evergreen_page_flip_pending, | ||
1351 | }, | 1366 | }, |
1352 | }; | 1367 | }; |
1353 | 1368 | ||
@@ -1438,6 +1453,7 @@ static struct radeon_asic sumo_asic = { | |||
1438 | }, | 1453 | }, |
1439 | .pflip = { | 1454 | .pflip = { |
1440 | .page_flip = &evergreen_page_flip, | 1455 | .page_flip = &evergreen_page_flip, |
1456 | .page_flip_pending = &evergreen_page_flip_pending, | ||
1441 | }, | 1457 | }, |
1442 | }; | 1458 | }; |
1443 | 1459 | ||
@@ -1529,6 +1545,7 @@ static struct radeon_asic btc_asic = { | |||
1529 | }, | 1545 | }, |
1530 | .pflip = { | 1546 | .pflip = { |
1531 | .page_flip = &evergreen_page_flip, | 1547 | .page_flip = &evergreen_page_flip, |
1548 | .page_flip_pending = &evergreen_page_flip_pending, | ||
1532 | }, | 1549 | }, |
1533 | }; | 1550 | }; |
1534 | 1551 | ||
@@ -1671,6 +1688,7 @@ static struct radeon_asic cayman_asic = { | |||
1671 | }, | 1688 | }, |
1672 | .pflip = { | 1689 | .pflip = { |
1673 | .page_flip = &evergreen_page_flip, | 1690 | .page_flip = &evergreen_page_flip, |
1691 | .page_flip_pending = &evergreen_page_flip_pending, | ||
1674 | }, | 1692 | }, |
1675 | }; | 1693 | }; |
1676 | 1694 | ||
@@ -1770,6 +1788,7 @@ static struct radeon_asic trinity_asic = { | |||
1770 | }, | 1788 | }, |
1771 | .pflip = { | 1789 | .pflip = { |
1772 | .page_flip = &evergreen_page_flip, | 1790 | .page_flip = &evergreen_page_flip, |
1791 | .page_flip_pending = &evergreen_page_flip_pending, | ||
1773 | }, | 1792 | }, |
1774 | }; | 1793 | }; |
1775 | 1794 | ||
@@ -1899,6 +1918,7 @@ static struct radeon_asic si_asic = { | |||
1899 | }, | 1918 | }, |
1900 | .pflip = { | 1919 | .pflip = { |
1901 | .page_flip = &evergreen_page_flip, | 1920 | .page_flip = &evergreen_page_flip, |
1921 | .page_flip_pending = &evergreen_page_flip_pending, | ||
1902 | }, | 1922 | }, |
1903 | }; | 1923 | }; |
1904 | 1924 | ||
@@ -2060,6 +2080,7 @@ static struct radeon_asic ci_asic = { | |||
2060 | }, | 2080 | }, |
2061 | .pflip = { | 2081 | .pflip = { |
2062 | .page_flip = &evergreen_page_flip, | 2082 | .page_flip = &evergreen_page_flip, |
2083 | .page_flip_pending = &evergreen_page_flip_pending, | ||
2063 | }, | 2084 | }, |
2064 | }; | 2085 | }; |
2065 | 2086 | ||
@@ -2163,6 +2184,7 @@ static struct radeon_asic kv_asic = { | |||
2163 | }, | 2184 | }, |
2164 | .pflip = { | 2185 | .pflip = { |
2165 | .page_flip = &evergreen_page_flip, | 2186 | .page_flip = &evergreen_page_flip, |
2187 | .page_flip_pending = &evergreen_page_flip_pending, | ||
2166 | }, | 2188 | }, |
2167 | }; | 2189 | }; |
2168 | 2190 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h index 953607d69eb1..0eab015b2cfb 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.h +++ b/drivers/gpu/drm/radeon/radeon_asic.h | |||
@@ -135,7 +135,9 @@ extern void r100_pm_prepare(struct radeon_device *rdev); | |||
135 | extern void r100_pm_finish(struct radeon_device *rdev); | 135 | extern void r100_pm_finish(struct radeon_device *rdev); |
136 | extern void r100_pm_init_profile(struct radeon_device *rdev); | 136 | extern void r100_pm_init_profile(struct radeon_device *rdev); |
137 | extern void r100_pm_get_dynpm_state(struct radeon_device *rdev); | 137 | extern void r100_pm_get_dynpm_state(struct radeon_device *rdev); |
138 | extern u32 r100_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); | 138 | extern void r100_page_flip(struct radeon_device *rdev, int crtc, |
139 | u64 crtc_base); | ||
140 | extern bool r100_page_flip_pending(struct radeon_device *rdev, int crtc); | ||
139 | extern void r100_wait_for_vblank(struct radeon_device *rdev, int crtc); | 141 | extern void r100_wait_for_vblank(struct radeon_device *rdev, int crtc); |
140 | extern int r100_mc_wait_for_idle(struct radeon_device *rdev); | 142 | extern int r100_mc_wait_for_idle(struct radeon_device *rdev); |
141 | 143 | ||
@@ -239,7 +241,9 @@ void rs600_hpd_set_polarity(struct radeon_device *rdev, | |||
239 | extern void rs600_pm_misc(struct radeon_device *rdev); | 241 | extern void rs600_pm_misc(struct radeon_device *rdev); |
240 | extern void rs600_pm_prepare(struct radeon_device *rdev); | 242 | extern void rs600_pm_prepare(struct radeon_device *rdev); |
241 | extern void rs600_pm_finish(struct radeon_device *rdev); | 243 | extern void rs600_pm_finish(struct radeon_device *rdev); |
242 | extern u32 rs600_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); | 244 | extern void rs600_page_flip(struct radeon_device *rdev, int crtc, |
245 | u64 crtc_base); | ||
246 | extern bool rs600_page_flip_pending(struct radeon_device *rdev, int crtc); | ||
243 | void rs600_set_safe_registers(struct radeon_device *rdev); | 247 | void rs600_set_safe_registers(struct radeon_device *rdev); |
244 | extern void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc); | 248 | extern void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc); |
245 | extern int rs600_mc_wait_for_idle(struct radeon_device *rdev); | 249 | extern int rs600_mc_wait_for_idle(struct radeon_device *rdev); |
@@ -448,7 +452,8 @@ void rv770_fini(struct radeon_device *rdev); | |||
448 | int rv770_suspend(struct radeon_device *rdev); | 452 | int rv770_suspend(struct radeon_device *rdev); |
449 | int rv770_resume(struct radeon_device *rdev); | 453 | int rv770_resume(struct radeon_device *rdev); |
450 | void rv770_pm_misc(struct radeon_device *rdev); | 454 | void rv770_pm_misc(struct radeon_device *rdev); |
451 | u32 rv770_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); | 455 | void rv770_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); |
456 | bool rv770_page_flip_pending(struct radeon_device *rdev, int crtc); | ||
452 | void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc); | 457 | void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc); |
453 | void r700_cp_stop(struct radeon_device *rdev); | 458 | void r700_cp_stop(struct radeon_device *rdev); |
454 | void r700_cp_fini(struct radeon_device *rdev); | 459 | void r700_cp_fini(struct radeon_device *rdev); |
@@ -516,7 +521,9 @@ extern void sumo_pm_init_profile(struct radeon_device *rdev); | |||
516 | extern void btc_pm_init_profile(struct radeon_device *rdev); | 521 | extern void btc_pm_init_profile(struct radeon_device *rdev); |
517 | int sumo_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); | 522 | int sumo_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
518 | int evergreen_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); | 523 | int evergreen_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
519 | extern u32 evergreen_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); | 524 | extern void evergreen_page_flip(struct radeon_device *rdev, int crtc, |
525 | u64 crtc_base); | ||
526 | extern bool evergreen_page_flip_pending(struct radeon_device *rdev, int crtc); | ||
520 | extern void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc); | 527 | extern void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc); |
521 | void evergreen_disable_interrupt_state(struct radeon_device *rdev); | 528 | void evergreen_disable_interrupt_state(struct radeon_device *rdev); |
522 | int evergreen_mc_wait_for_idle(struct radeon_device *rdev); | 529 | int evergreen_mc_wait_for_idle(struct radeon_device *rdev); |
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index d597d08bdaaa..c52c18246ed7 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c | |||
@@ -294,7 +294,8 @@ void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id) | |||
294 | /* New pageflip, or just completion of a previous one? */ | 294 | /* New pageflip, or just completion of a previous one? */ |
295 | if (!radeon_crtc->deferred_flip_completion) { | 295 | if (!radeon_crtc->deferred_flip_completion) { |
296 | /* do the flip (mmio) */ | 296 | /* do the flip (mmio) */ |
297 | update_pending = radeon_page_flip(rdev, crtc_id, work->new_crtc_base); | 297 | radeon_page_flip(rdev, crtc_id, work->new_crtc_base); |
298 | update_pending = radeon_page_flip_pending(rdev, crtc_id); | ||
298 | } else { | 299 | } else { |
299 | /* This is just a completion of a flip queued in crtc | 300 | /* This is just a completion of a flip queued in crtc |
300 | * at last invocation. Make sure we go directly to | 301 | * at last invocation. Make sure we go directly to |
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c index e005bd74a807..9922ee5bd497 100644 --- a/drivers/gpu/drm/radeon/rs600.c +++ b/drivers/gpu/drm/radeon/rs600.c | |||
@@ -109,7 +109,7 @@ void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc) | |||
109 | } | 109 | } |
110 | } | 110 | } |
111 | 111 | ||
112 | u32 rs600_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) | 112 | void rs600_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) |
113 | { | 113 | { |
114 | struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; | 114 | struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; |
115 | u32 tmp = RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset); | 115 | u32 tmp = RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset); |
@@ -136,9 +136,15 @@ u32 rs600_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) | |||
136 | /* Unlock the lock, so double-buffering can take place inside vblank */ | 136 | /* Unlock the lock, so double-buffering can take place inside vblank */ |
137 | tmp &= ~AVIVO_D1GRPH_UPDATE_LOCK; | 137 | tmp &= ~AVIVO_D1GRPH_UPDATE_LOCK; |
138 | WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); | 138 | WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); |
139 | } | ||
140 | |||
141 | bool rs600_page_flip_pending(struct radeon_device *rdev, int crtc_id) | ||
142 | { | ||
143 | struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; | ||
139 | 144 | ||
140 | /* Return current update_pending status: */ | 145 | /* Return current update_pending status: */ |
141 | return RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & AVIVO_D1GRPH_SURFACE_UPDATE_PENDING; | 146 | return !!(RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & |
147 | AVIVO_D1GRPH_SURFACE_UPDATE_PENDING); | ||
142 | } | 148 | } |
143 | 149 | ||
144 | void avivo_program_fmt(struct drm_encoder *encoder) | 150 | void avivo_program_fmt(struct drm_encoder *encoder) |
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index fef310773aad..97b776666b75 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c | |||
@@ -801,7 +801,7 @@ u32 rv770_get_xclk(struct radeon_device *rdev) | |||
801 | return reference_clock; | 801 | return reference_clock; |
802 | } | 802 | } |
803 | 803 | ||
804 | u32 rv770_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) | 804 | void rv770_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) |
805 | { | 805 | { |
806 | struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; | 806 | struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; |
807 | u32 tmp = RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset); | 807 | u32 tmp = RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset); |
@@ -835,9 +835,15 @@ u32 rv770_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) | |||
835 | /* Unlock the lock, so double-buffering can take place inside vblank */ | 835 | /* Unlock the lock, so double-buffering can take place inside vblank */ |
836 | tmp &= ~AVIVO_D1GRPH_UPDATE_LOCK; | 836 | tmp &= ~AVIVO_D1GRPH_UPDATE_LOCK; |
837 | WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); | 837 | WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); |
838 | } | ||
839 | |||
840 | bool rv770_page_flip_pending(struct radeon_device *rdev, int crtc_id) | ||
841 | { | ||
842 | struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; | ||
838 | 843 | ||
839 | /* Return current update_pending status: */ | 844 | /* Return current update_pending status: */ |
840 | return RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & AVIVO_D1GRPH_SURFACE_UPDATE_PENDING; | 845 | return !!(RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & |
846 | AVIVO_D1GRPH_SURFACE_UPDATE_PENDING); | ||
841 | } | 847 | } |
842 | 848 | ||
843 | /* get temperature in millidegrees */ | 849 | /* get temperature in millidegrees */ |