diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2015-01-13 19:09:24 -0500 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2015-01-21 21:17:44 -0500 |
commit | eccf7e8ad28e64401519e49f56abc7c799f809b5 (patch) | |
tree | bb899e91abe12135b0c8877e9d418e071dfc4544 /drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c | |
parent | 5ce3bf3c72436c49fbd9a5b71d7d278665f4bf55 (diff) |
drm/nouveau/msvld: separate from bsp
Switch to NVIDIA's name for the device.
The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver. This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).
Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c index a565bc8b6636..1460a1650d0e 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c | |||
@@ -50,6 +50,7 @@ | |||
50 | #include <engine/disp.h> | 50 | #include <engine/disp.h> |
51 | #include <engine/copy.h> | 51 | #include <engine/copy.h> |
52 | #include <engine/bsp.h> | 52 | #include <engine/bsp.h> |
53 | #include <engine/msvld.h> | ||
53 | #include <engine/vp.h> | 54 | #include <engine/vp.h> |
54 | #include <engine/ppp.h> | 55 | #include <engine/ppp.h> |
55 | #include <engine/perfmon.h> | 56 | #include <engine/perfmon.h> |
@@ -87,7 +88,7 @@ nve0_identify(struct nouveau_device *device) | |||
87 | device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass; | 88 | device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass; |
88 | device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass; | 89 | device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass; |
89 | device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass; | 90 | device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass; |
90 | device->oclass[NVDEV_ENGINE_BSP ] = &nve0_bsp_oclass; | 91 | device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass; |
91 | device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass; | 92 | device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass; |
92 | device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; | 93 | device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; |
93 | device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass; | 94 | device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass; |
@@ -121,7 +122,7 @@ nve0_identify(struct nouveau_device *device) | |||
121 | device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass; | 122 | device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass; |
122 | device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass; | 123 | device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass; |
123 | device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass; | 124 | device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass; |
124 | device->oclass[NVDEV_ENGINE_BSP ] = &nve0_bsp_oclass; | 125 | device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass; |
125 | device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass; | 126 | device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass; |
126 | device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; | 127 | device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; |
127 | device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass; | 128 | device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass; |
@@ -155,7 +156,7 @@ nve0_identify(struct nouveau_device *device) | |||
155 | device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass; | 156 | device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass; |
156 | device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass; | 157 | device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass; |
157 | device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass; | 158 | device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass; |
158 | device->oclass[NVDEV_ENGINE_BSP ] = &nve0_bsp_oclass; | 159 | device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass; |
159 | device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass; | 160 | device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass; |
160 | device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; | 161 | device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; |
161 | device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass; | 162 | device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass; |
@@ -211,7 +212,7 @@ nve0_identify(struct nouveau_device *device) | |||
211 | device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass; | 212 | device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass; |
212 | device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass; | 213 | device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass; |
213 | device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass; | 214 | device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass; |
214 | device->oclass[NVDEV_ENGINE_BSP ] = &nve0_bsp_oclass; | 215 | device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass; |
215 | device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass; | 216 | device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass; |
216 | device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; | 217 | device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; |
217 | device->oclass[NVDEV_ENGINE_PERFMON] = &nvf0_perfmon_oclass; | 218 | device->oclass[NVDEV_ENGINE_PERFMON] = &nvf0_perfmon_oclass; |
@@ -245,7 +246,7 @@ nve0_identify(struct nouveau_device *device) | |||
245 | device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass; | 246 | device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass; |
246 | device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass; | 247 | device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass; |
247 | device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass; | 248 | device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass; |
248 | device->oclass[NVDEV_ENGINE_BSP ] = &nve0_bsp_oclass; | 249 | device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass; |
249 | device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass; | 250 | device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass; |
250 | device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; | 251 | device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; |
251 | device->oclass[NVDEV_ENGINE_PERFMON] = &nvf0_perfmon_oclass; | 252 | device->oclass[NVDEV_ENGINE_PERFMON] = &nvf0_perfmon_oclass; |
@@ -279,7 +280,7 @@ nve0_identify(struct nouveau_device *device) | |||
279 | device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass; | 280 | device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass; |
280 | device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass; | 281 | device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass; |
281 | device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass; | 282 | device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass; |
282 | device->oclass[NVDEV_ENGINE_BSP ] = &nve0_bsp_oclass; | 283 | device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass; |
283 | device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass; | 284 | device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass; |
284 | device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; | 285 | device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; |
285 | break; | 286 | break; |
@@ -312,7 +313,7 @@ nve0_identify(struct nouveau_device *device) | |||
312 | device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass; | 313 | device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass; |
313 | device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass; | 314 | device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass; |
314 | device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass; | 315 | device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass; |
315 | device->oclass[NVDEV_ENGINE_BSP ] = &nve0_bsp_oclass; | 316 | device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass; |
316 | device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass; | 317 | device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass; |
317 | device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; | 318 | device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; |
318 | break; | 319 | break; |