diff options
| author | Ben Skeggs <bskeggs@redhat.com> | 2010-10-18 23:05:51 -0400 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2010-12-03 00:10:52 -0500 |
| commit | b7bc613a4cc08d867b43189c2af0bb83b1fa1dc6 (patch) | |
| tree | 9f82aa99db8499a5f0eca1db4ae1b34352e92584 /drivers/gpu/drm/nouveau/nouveau_reg.h | |
| parent | 106ddad5aa8e8e03503cea05f9a64611f849952f (diff) | |
drm/nv50: move evo handling to nv50_evo.c
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_reg.h')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_reg.h | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_reg.h b/drivers/gpu/drm/nouveau/nouveau_reg.h index 5e28bc63c41e..d0ce86c24ebf 100644 --- a/drivers/gpu/drm/nouveau/nouveau_reg.h +++ b/drivers/gpu/drm/nouveau/nouveau_reg.h | |||
| @@ -729,17 +729,17 @@ | |||
| 729 | #define NV50_PDISPLAY_UNK30_CTRL_PENDING 0x80000000 | 729 | #define NV50_PDISPLAY_UNK30_CTRL_PENDING 0x80000000 |
| 730 | #define NV50_PDISPLAY_TRAPPED_ADDR 0x00610080 | 730 | #define NV50_PDISPLAY_TRAPPED_ADDR 0x00610080 |
| 731 | #define NV50_PDISPLAY_TRAPPED_DATA 0x00610084 | 731 | #define NV50_PDISPLAY_TRAPPED_DATA 0x00610084 |
| 732 | #define NV50_PDISPLAY_CHANNEL_STAT(i) ((i) * 0x10 + 0x00610200) | 732 | #define NV50_PDISPLAY_EVO_CTRL(i) ((i) * 0x10 + 0x00610200) |
| 733 | #define NV50_PDISPLAY_CHANNEL_STAT_DMA 0x00000010 | 733 | #define NV50_PDISPLAY_EVO_CTRL_DMA 0x00000010 |
| 734 | #define NV50_PDISPLAY_CHANNEL_STAT_DMA_DISABLED 0x00000000 | 734 | #define NV50_PDISPLAY_EVO_CTRL_DMA_DISABLED 0x00000000 |
| 735 | #define NV50_PDISPLAY_CHANNEL_STAT_DMA_ENABLED 0x00000010 | 735 | #define NV50_PDISPLAY_EVO_CTRL_DMA_ENABLED 0x00000010 |
| 736 | #define NV50_PDISPLAY_CHANNEL_DMA_CB(i) ((i) * 0x10 + 0x00610204) | 736 | #define NV50_PDISPLAY_EVO_DMA_CB(i) ((i) * 0x10 + 0x00610204) |
| 737 | #define NV50_PDISPLAY_CHANNEL_DMA_CB_LOCATION 0x00000002 | 737 | #define NV50_PDISPLAY_EVO_DMA_CB_LOCATION 0x00000002 |
| 738 | #define NV50_PDISPLAY_CHANNEL_DMA_CB_LOCATION_VRAM 0x00000000 | 738 | #define NV50_PDISPLAY_EVO_DMA_CB_LOCATION_VRAM 0x00000000 |
| 739 | #define NV50_PDISPLAY_CHANNEL_DMA_CB_LOCATION_SYSTEM 0x00000002 | 739 | #define NV50_PDISPLAY_EVO_DMA_CB_LOCATION_SYSTEM 0x00000002 |
| 740 | #define NV50_PDISPLAY_CHANNEL_DMA_CB_VALID 0x00000001 | 740 | #define NV50_PDISPLAY_EVO_DMA_CB_VALID 0x00000001 |
| 741 | #define NV50_PDISPLAY_CHANNEL_UNK2(i) ((i) * 0x10 + 0x00610208) | 741 | #define NV50_PDISPLAY_EVO_UNK2(i) ((i) * 0x10 + 0x00610208) |
| 742 | #define NV50_PDISPLAY_CHANNEL_UNK3(i) ((i) * 0x10 + 0x0061020c) | 742 | #define NV50_PDISPLAY_EVO_HASH_TAG(i) ((i) * 0x10 + 0x0061020c) |
| 743 | 743 | ||
| 744 | #define NV50_PDISPLAY_CURSOR 0x00610270 | 744 | #define NV50_PDISPLAY_CURSOR 0x00610270 |
| 745 | #define NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(i) ((i) * 0x10 + 0x00610270) | 745 | #define NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(i) ((i) * 0x10 + 0x00610270) |