drm/i915: Workaround to bump rc6 voltage to 450

BIOS should be setting the minimum voltage for rc6 to be 450mV. Old or
buggy BIOSen may not be doing this, so we correct it for them. Ideally
customers should update the BIOS as only it would know the optimal
values for the platform, so we leave that fact as a DRM_ERROR for the
user to see.

Unfortunately this isn't fixing any of the issues it was targeted to
fix, but it is documented that we must do it.

CC: Jesse Barnes <jbarnes@virtuousgeek.org>
CC: Matt Turner <mattst88@gmail.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[danvet: bikeshedded loglevel of the "your bios is broken message" to
debug.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

1 files changed, 15 insertions, 1 deletions

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 0cc7dbf55bee..a56ca428c38e 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2404,7 +2404,7 @@ static void gen6_enable_rps(struct drm_device *dev)
         struct intel_ring_buffer *ring;
         u32 rp_state_cap;
         u32 gt_perf_status;
-        u32 pcu_mbox, rc6_mask = 0;
+        u32 rc6vids, pcu_mbox, rc6_mask = 0;
         u32 gtfifodbg;
         int rc6_mode;
         int i, ret;
@@ -2526,6 +2526,20 @@ static void gen6_enable_rps(struct drm_device *dev)
         /* enable all PM interrupts */
         I915_WRITE(GEN6_PMINTRMSK, 0);
 
+        rc6vids = 0;
+        ret = sandybridge_pcode_read(dev_priv, GEN6_PCODE_READ_RC6VIDS, &rc6vids);
+        if (IS_GEN6(dev) && ret) {
+                DRM_DEBUG_DRIVER("Couldn't check for BIOS workaround\n");
+        } else if (IS_GEN6(dev) && (GEN6_DECODE_RC6_VID(rc6vids & 0xff) < 450)) {
+                DRM_DEBUG_DRIVER("You should update your BIOS. Correcting minimum rc6 voltage (%dmV->%dmV)\n",
+                          GEN6_DECODE_RC6_VID(rc6vids & 0xff), 450);
+                rc6vids &= 0xffff00;
+                rc6vids |= GEN6_ENCODE_RC6_VID(450);
+                ret = sandybridge_pcode_write(dev_priv, GEN6_PCODE_WRITE_RC6VIDS, rc6vids);
+                if (ret)
+                        DRM_ERROR("Couldn't fix incorrect rc6 voltage\n");
+        }
+
         gen6_gt_force_wake_put(dev_priv);
 }