diff options
author | Nick Hoath <nicholas.hoath@intel.com> | 2015-02-06 06:30:04 -0500 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-02-13 17:28:13 -0500 |
commit | 203a571b21e7613a7b18bd7340ea1ca75327e7c6 (patch) | |
tree | 76bf8068be05a1ed47249c224716642d142acd26 /drivers/gpu/drm/i915/intel_lrc.c | |
parent | e90fff154ecb4517bad4b015bbe2af4699e96dca (diff) |
drm/i915: gen 9 h/w w/a (WaEnableForceRestoreInCtxtDescForVCS)
Add:
WaEnableForceRestoreInCtxtDescForVCS
v2: Add stepping check.
v3: Fixed stepping check direction. Cleaned up indentation.
Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_lrc.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_lrc.c | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index a94346fee160..091555f34731 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c | |||
@@ -254,8 +254,10 @@ u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj) | |||
254 | return lrca >> 12; | 254 | return lrca >> 12; |
255 | } | 255 | } |
256 | 256 | ||
257 | static uint64_t execlists_ctx_descriptor(struct drm_i915_gem_object *ctx_obj) | 257 | static uint64_t execlists_ctx_descriptor(struct intel_engine_cs *ring, |
258 | struct drm_i915_gem_object *ctx_obj) | ||
258 | { | 259 | { |
260 | struct drm_device *dev = ring->dev; | ||
259 | uint64_t desc; | 261 | uint64_t desc; |
260 | uint64_t lrca = i915_gem_obj_ggtt_offset(ctx_obj); | 262 | uint64_t lrca = i915_gem_obj_ggtt_offset(ctx_obj); |
261 | 263 | ||
@@ -272,6 +274,13 @@ static uint64_t execlists_ctx_descriptor(struct drm_i915_gem_object *ctx_obj) | |||
272 | * signalling between Command Streamers */ | 274 | * signalling between Command Streamers */ |
273 | /* desc |= GEN8_CTX_FORCE_RESTORE; */ | 275 | /* desc |= GEN8_CTX_FORCE_RESTORE; */ |
274 | 276 | ||
277 | /* WaEnableForceRestoreInCtxtDescForVCS:skl */ | ||
278 | if (IS_GEN9(dev) && | ||
279 | INTEL_REVID(dev) <= SKL_REVID_B0 && | ||
280 | (ring->id == BCS || ring->id == VCS || | ||
281 | ring->id == VECS || ring->id == VCS2)) | ||
282 | desc |= GEN8_CTX_FORCE_RESTORE; | ||
283 | |||
275 | return desc; | 284 | return desc; |
276 | } | 285 | } |
277 | 286 | ||
@@ -286,13 +295,13 @@ static void execlists_elsp_write(struct intel_engine_cs *ring, | |||
286 | 295 | ||
287 | /* XXX: You must always write both descriptors in the order below. */ | 296 | /* XXX: You must always write both descriptors in the order below. */ |
288 | if (ctx_obj1) | 297 | if (ctx_obj1) |
289 | temp = execlists_ctx_descriptor(ctx_obj1); | 298 | temp = execlists_ctx_descriptor(ring, ctx_obj1); |
290 | else | 299 | else |
291 | temp = 0; | 300 | temp = 0; |
292 | desc[1] = (u32)(temp >> 32); | 301 | desc[1] = (u32)(temp >> 32); |
293 | desc[0] = (u32)temp; | 302 | desc[0] = (u32)temp; |
294 | 303 | ||
295 | temp = execlists_ctx_descriptor(ctx_obj0); | 304 | temp = execlists_ctx_descriptor(ring, ctx_obj0); |
296 | desc[3] = (u32)(temp >> 32); | 305 | desc[3] = (u32)(temp >> 32); |
297 | desc[2] = (u32)temp; | 306 | desc[2] = (u32)temp; |
298 | 307 | ||