diff options
author | Rob Clark <robdclark@gmail.com> | 2014-12-15 13:56:32 -0500 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-12-16 04:39:13 -0500 |
commit | e2c719b75c8c186deb86570d8466df9e9eff919b (patch) | |
tree | 8caf669cdc0e7bb30625f2f1055bfa5ea9b82eb1 /drivers/gpu/drm/i915/intel_display.c | |
parent | e6c1abb7392f548f47b03dac6179916cd87f501e (diff) |
drm/i915: tame the chattermouth (v2)
Many distro's have mechanism in place to collect and automatically file
bugs for failed WARN()s. And since i915 has a lot of hw state sanity
checks which result in WARN(), it generates quite a lot of noise which
is somewhat disconcerting to the end user.
Separate out the internal hw-is-in-the-state-I-expected checks into
I915_STATE_WARN()s and allow configuration via i915.verbose_checks module
param about whether this will generate a full blown stacktrace or just
DRM_ERROR(). The new moduleparam defaults to true, so by default there
is no change in behavior. And even when disabled, you will still get
an error message logged.
v2: paint the macro names blue, clarify that the default behavior
remains the same as before
Signed-off-by: Rob Clark <robdclark@gmail.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 134 |
1 files changed, 67 insertions, 67 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 878c4857ff49..0a09473e1eee 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -1024,7 +1024,7 @@ void assert_pll(struct drm_i915_private *dev_priv, | |||
1024 | reg = DPLL(pipe); | 1024 | reg = DPLL(pipe); |
1025 | val = I915_READ(reg); | 1025 | val = I915_READ(reg); |
1026 | cur_state = !!(val & DPLL_VCO_ENABLE); | 1026 | cur_state = !!(val & DPLL_VCO_ENABLE); |
1027 | WARN(cur_state != state, | 1027 | I915_STATE_WARN(cur_state != state, |
1028 | "PLL state assertion failure (expected %s, current %s)\n", | 1028 | "PLL state assertion failure (expected %s, current %s)\n", |
1029 | state_string(state), state_string(cur_state)); | 1029 | state_string(state), state_string(cur_state)); |
1030 | } | 1030 | } |
@@ -1040,7 +1040,7 @@ static void assert_dsi_pll(struct drm_i915_private *dev_priv, bool state) | |||
1040 | mutex_unlock(&dev_priv->dpio_lock); | 1040 | mutex_unlock(&dev_priv->dpio_lock); |
1041 | 1041 | ||
1042 | cur_state = val & DSI_PLL_VCO_EN; | 1042 | cur_state = val & DSI_PLL_VCO_EN; |
1043 | WARN(cur_state != state, | 1043 | I915_STATE_WARN(cur_state != state, |
1044 | "DSI PLL state assertion failure (expected %s, current %s)\n", | 1044 | "DSI PLL state assertion failure (expected %s, current %s)\n", |
1045 | state_string(state), state_string(cur_state)); | 1045 | state_string(state), state_string(cur_state)); |
1046 | } | 1046 | } |
@@ -1071,7 +1071,7 @@ void assert_shared_dpll(struct drm_i915_private *dev_priv, | |||
1071 | return; | 1071 | return; |
1072 | 1072 | ||
1073 | cur_state = pll->get_hw_state(dev_priv, pll, &hw_state); | 1073 | cur_state = pll->get_hw_state(dev_priv, pll, &hw_state); |
1074 | WARN(cur_state != state, | 1074 | I915_STATE_WARN(cur_state != state, |
1075 | "%s assertion failure (expected %s, current %s)\n", | 1075 | "%s assertion failure (expected %s, current %s)\n", |
1076 | pll->name, state_string(state), state_string(cur_state)); | 1076 | pll->name, state_string(state), state_string(cur_state)); |
1077 | } | 1077 | } |
@@ -1095,7 +1095,7 @@ static void assert_fdi_tx(struct drm_i915_private *dev_priv, | |||
1095 | val = I915_READ(reg); | 1095 | val = I915_READ(reg); |
1096 | cur_state = !!(val & FDI_TX_ENABLE); | 1096 | cur_state = !!(val & FDI_TX_ENABLE); |
1097 | } | 1097 | } |
1098 | WARN(cur_state != state, | 1098 | I915_STATE_WARN(cur_state != state, |
1099 | "FDI TX state assertion failure (expected %s, current %s)\n", | 1099 | "FDI TX state assertion failure (expected %s, current %s)\n", |
1100 | state_string(state), state_string(cur_state)); | 1100 | state_string(state), state_string(cur_state)); |
1101 | } | 1101 | } |
@@ -1112,7 +1112,7 @@ static void assert_fdi_rx(struct drm_i915_private *dev_priv, | |||
1112 | reg = FDI_RX_CTL(pipe); | 1112 | reg = FDI_RX_CTL(pipe); |
1113 | val = I915_READ(reg); | 1113 | val = I915_READ(reg); |
1114 | cur_state = !!(val & FDI_RX_ENABLE); | 1114 | cur_state = !!(val & FDI_RX_ENABLE); |
1115 | WARN(cur_state != state, | 1115 | I915_STATE_WARN(cur_state != state, |
1116 | "FDI RX state assertion failure (expected %s, current %s)\n", | 1116 | "FDI RX state assertion failure (expected %s, current %s)\n", |
1117 | state_string(state), state_string(cur_state)); | 1117 | state_string(state), state_string(cur_state)); |
1118 | } | 1118 | } |
@@ -1135,7 +1135,7 @@ static void assert_fdi_tx_pll_enabled(struct drm_i915_private *dev_priv, | |||
1135 | 1135 | ||
1136 | reg = FDI_TX_CTL(pipe); | 1136 | reg = FDI_TX_CTL(pipe); |
1137 | val = I915_READ(reg); | 1137 | val = I915_READ(reg); |
1138 | WARN(!(val & FDI_TX_PLL_ENABLE), "FDI TX PLL assertion failure, should be active but is disabled\n"); | 1138 | I915_STATE_WARN(!(val & FDI_TX_PLL_ENABLE), "FDI TX PLL assertion failure, should be active but is disabled\n"); |
1139 | } | 1139 | } |
1140 | 1140 | ||
1141 | void assert_fdi_rx_pll(struct drm_i915_private *dev_priv, | 1141 | void assert_fdi_rx_pll(struct drm_i915_private *dev_priv, |
@@ -1148,7 +1148,7 @@ void assert_fdi_rx_pll(struct drm_i915_private *dev_priv, | |||
1148 | reg = FDI_RX_CTL(pipe); | 1148 | reg = FDI_RX_CTL(pipe); |
1149 | val = I915_READ(reg); | 1149 | val = I915_READ(reg); |
1150 | cur_state = !!(val & FDI_RX_PLL_ENABLE); | 1150 | cur_state = !!(val & FDI_RX_PLL_ENABLE); |
1151 | WARN(cur_state != state, | 1151 | I915_STATE_WARN(cur_state != state, |
1152 | "FDI RX PLL assertion failure (expected %s, current %s)\n", | 1152 | "FDI RX PLL assertion failure (expected %s, current %s)\n", |
1153 | state_string(state), state_string(cur_state)); | 1153 | state_string(state), state_string(cur_state)); |
1154 | } | 1154 | } |
@@ -1190,7 +1190,7 @@ void assert_panel_unlocked(struct drm_i915_private *dev_priv, | |||
1190 | ((val & PANEL_UNLOCK_MASK) == PANEL_UNLOCK_REGS)) | 1190 | ((val & PANEL_UNLOCK_MASK) == PANEL_UNLOCK_REGS)) |
1191 | locked = false; | 1191 | locked = false; |
1192 | 1192 | ||
1193 | WARN(panel_pipe == pipe && locked, | 1193 | I915_STATE_WARN(panel_pipe == pipe && locked, |
1194 | "panel assertion failure, pipe %c regs locked\n", | 1194 | "panel assertion failure, pipe %c regs locked\n", |
1195 | pipe_name(pipe)); | 1195 | pipe_name(pipe)); |
1196 | } | 1196 | } |
@@ -1206,7 +1206,7 @@ static void assert_cursor(struct drm_i915_private *dev_priv, | |||
1206 | else | 1206 | else |
1207 | cur_state = I915_READ(CURCNTR(pipe)) & CURSOR_MODE; | 1207 | cur_state = I915_READ(CURCNTR(pipe)) & CURSOR_MODE; |
1208 | 1208 | ||
1209 | WARN(cur_state != state, | 1209 | I915_STATE_WARN(cur_state != state, |
1210 | "cursor on pipe %c assertion failure (expected %s, current %s)\n", | 1210 | "cursor on pipe %c assertion failure (expected %s, current %s)\n", |
1211 | pipe_name(pipe), state_string(state), state_string(cur_state)); | 1211 | pipe_name(pipe), state_string(state), state_string(cur_state)); |
1212 | } | 1212 | } |
@@ -1236,7 +1236,7 @@ void assert_pipe(struct drm_i915_private *dev_priv, | |||
1236 | cur_state = !!(val & PIPECONF_ENABLE); | 1236 | cur_state = !!(val & PIPECONF_ENABLE); |
1237 | } | 1237 | } |
1238 | 1238 | ||
1239 | WARN(cur_state != state, | 1239 | I915_STATE_WARN(cur_state != state, |
1240 | "pipe %c assertion failure (expected %s, current %s)\n", | 1240 | "pipe %c assertion failure (expected %s, current %s)\n", |
1241 | pipe_name(pipe), state_string(state), state_string(cur_state)); | 1241 | pipe_name(pipe), state_string(state), state_string(cur_state)); |
1242 | } | 1242 | } |
@@ -1251,7 +1251,7 @@ static void assert_plane(struct drm_i915_private *dev_priv, | |||
1251 | reg = DSPCNTR(plane); | 1251 | reg = DSPCNTR(plane); |
1252 | val = I915_READ(reg); | 1252 | val = I915_READ(reg); |
1253 | cur_state = !!(val & DISPLAY_PLANE_ENABLE); | 1253 | cur_state = !!(val & DISPLAY_PLANE_ENABLE); |
1254 | WARN(cur_state != state, | 1254 | I915_STATE_WARN(cur_state != state, |
1255 | "plane %c assertion failure (expected %s, current %s)\n", | 1255 | "plane %c assertion failure (expected %s, current %s)\n", |
1256 | plane_name(plane), state_string(state), state_string(cur_state)); | 1256 | plane_name(plane), state_string(state), state_string(cur_state)); |
1257 | } | 1257 | } |
@@ -1271,7 +1271,7 @@ static void assert_planes_disabled(struct drm_i915_private *dev_priv, | |||
1271 | if (INTEL_INFO(dev)->gen >= 4) { | 1271 | if (INTEL_INFO(dev)->gen >= 4) { |
1272 | reg = DSPCNTR(pipe); | 1272 | reg = DSPCNTR(pipe); |
1273 | val = I915_READ(reg); | 1273 | val = I915_READ(reg); |
1274 | WARN(val & DISPLAY_PLANE_ENABLE, | 1274 | I915_STATE_WARN(val & DISPLAY_PLANE_ENABLE, |
1275 | "plane %c assertion failure, should be disabled but not\n", | 1275 | "plane %c assertion failure, should be disabled but not\n", |
1276 | plane_name(pipe)); | 1276 | plane_name(pipe)); |
1277 | return; | 1277 | return; |
@@ -1283,7 +1283,7 @@ static void assert_planes_disabled(struct drm_i915_private *dev_priv, | |||
1283 | val = I915_READ(reg); | 1283 | val = I915_READ(reg); |
1284 | cur_pipe = (val & DISPPLANE_SEL_PIPE_MASK) >> | 1284 | cur_pipe = (val & DISPPLANE_SEL_PIPE_MASK) >> |
1285 | DISPPLANE_SEL_PIPE_SHIFT; | 1285 | DISPPLANE_SEL_PIPE_SHIFT; |
1286 | WARN((val & DISPLAY_PLANE_ENABLE) && pipe == cur_pipe, | 1286 | I915_STATE_WARN((val & DISPLAY_PLANE_ENABLE) && pipe == cur_pipe, |
1287 | "plane %c assertion failure, should be off on pipe %c but is still active\n", | 1287 | "plane %c assertion failure, should be off on pipe %c but is still active\n", |
1288 | plane_name(i), pipe_name(pipe)); | 1288 | plane_name(i), pipe_name(pipe)); |
1289 | } | 1289 | } |
@@ -1299,7 +1299,7 @@ static void assert_sprites_disabled(struct drm_i915_private *dev_priv, | |||
1299 | if (INTEL_INFO(dev)->gen >= 9) { | 1299 | if (INTEL_INFO(dev)->gen >= 9) { |
1300 | for_each_sprite(pipe, sprite) { | 1300 | for_each_sprite(pipe, sprite) { |
1301 | val = I915_READ(PLANE_CTL(pipe, sprite)); | 1301 | val = I915_READ(PLANE_CTL(pipe, sprite)); |
1302 | WARN(val & PLANE_CTL_ENABLE, | 1302 | I915_STATE_WARN(val & PLANE_CTL_ENABLE, |
1303 | "plane %d assertion failure, should be off on pipe %c but is still active\n", | 1303 | "plane %d assertion failure, should be off on pipe %c but is still active\n", |
1304 | sprite, pipe_name(pipe)); | 1304 | sprite, pipe_name(pipe)); |
1305 | } | 1305 | } |
@@ -1307,20 +1307,20 @@ static void assert_sprites_disabled(struct drm_i915_private *dev_priv, | |||
1307 | for_each_sprite(pipe, sprite) { | 1307 | for_each_sprite(pipe, sprite) { |
1308 | reg = SPCNTR(pipe, sprite); | 1308 | reg = SPCNTR(pipe, sprite); |
1309 | val = I915_READ(reg); | 1309 | val = I915_READ(reg); |
1310 | WARN(val & SP_ENABLE, | 1310 | I915_STATE_WARN(val & SP_ENABLE, |
1311 | "sprite %c assertion failure, should be off on pipe %c but is still active\n", | 1311 | "sprite %c assertion failure, should be off on pipe %c but is still active\n", |
1312 | sprite_name(pipe, sprite), pipe_name(pipe)); | 1312 | sprite_name(pipe, sprite), pipe_name(pipe)); |
1313 | } | 1313 | } |
1314 | } else if (INTEL_INFO(dev)->gen >= 7) { | 1314 | } else if (INTEL_INFO(dev)->gen >= 7) { |
1315 | reg = SPRCTL(pipe); | 1315 | reg = SPRCTL(pipe); |
1316 | val = I915_READ(reg); | 1316 | val = I915_READ(reg); |
1317 | WARN(val & SPRITE_ENABLE, | 1317 | I915_STATE_WARN(val & SPRITE_ENABLE, |
1318 | "sprite %c assertion failure, should be off on pipe %c but is still active\n", | 1318 | "sprite %c assertion failure, should be off on pipe %c but is still active\n", |
1319 | plane_name(pipe), pipe_name(pipe)); | 1319 | plane_name(pipe), pipe_name(pipe)); |
1320 | } else if (INTEL_INFO(dev)->gen >= 5) { | 1320 | } else if (INTEL_INFO(dev)->gen >= 5) { |
1321 | reg = DVSCNTR(pipe); | 1321 | reg = DVSCNTR(pipe); |
1322 | val = I915_READ(reg); | 1322 | val = I915_READ(reg); |
1323 | WARN(val & DVS_ENABLE, | 1323 | I915_STATE_WARN(val & DVS_ENABLE, |
1324 | "sprite %c assertion failure, should be off on pipe %c but is still active\n", | 1324 | "sprite %c assertion failure, should be off on pipe %c but is still active\n", |
1325 | plane_name(pipe), pipe_name(pipe)); | 1325 | plane_name(pipe), pipe_name(pipe)); |
1326 | } | 1326 | } |
@@ -1328,7 +1328,7 @@ static void assert_sprites_disabled(struct drm_i915_private *dev_priv, | |||
1328 | 1328 | ||
1329 | static void assert_vblank_disabled(struct drm_crtc *crtc) | 1329 | static void assert_vblank_disabled(struct drm_crtc *crtc) |
1330 | { | 1330 | { |
1331 | if (WARN_ON(drm_crtc_vblank_get(crtc) == 0)) | 1331 | if (I915_STATE_WARN_ON(drm_crtc_vblank_get(crtc) == 0)) |
1332 | drm_crtc_vblank_put(crtc); | 1332 | drm_crtc_vblank_put(crtc); |
1333 | } | 1333 | } |
1334 | 1334 | ||
@@ -1337,12 +1337,12 @@ static void ibx_assert_pch_refclk_enabled(struct drm_i915_private *dev_priv) | |||
1337 | u32 val; | 1337 | u32 val; |
1338 | bool enabled; | 1338 | bool enabled; |
1339 | 1339 | ||
1340 | WARN_ON(!(HAS_PCH_IBX(dev_priv->dev) || HAS_PCH_CPT(dev_priv->dev))); | 1340 | I915_STATE_WARN_ON(!(HAS_PCH_IBX(dev_priv->dev) || HAS_PCH_CPT(dev_priv->dev))); |
1341 | 1341 | ||
1342 | val = I915_READ(PCH_DREF_CONTROL); | 1342 | val = I915_READ(PCH_DREF_CONTROL); |
1343 | enabled = !!(val & (DREF_SSC_SOURCE_MASK | DREF_NONSPREAD_SOURCE_MASK | | 1343 | enabled = !!(val & (DREF_SSC_SOURCE_MASK | DREF_NONSPREAD_SOURCE_MASK | |
1344 | DREF_SUPERSPREAD_SOURCE_MASK)); | 1344 | DREF_SUPERSPREAD_SOURCE_MASK)); |
1345 | WARN(!enabled, "PCH refclk assertion failure, should be active but is disabled\n"); | 1345 | I915_STATE_WARN(!enabled, "PCH refclk assertion failure, should be active but is disabled\n"); |
1346 | } | 1346 | } |
1347 | 1347 | ||
1348 | static void assert_pch_transcoder_disabled(struct drm_i915_private *dev_priv, | 1348 | static void assert_pch_transcoder_disabled(struct drm_i915_private *dev_priv, |
@@ -1355,7 +1355,7 @@ static void assert_pch_transcoder_disabled(struct drm_i915_private *dev_priv, | |||
1355 | reg = PCH_TRANSCONF(pipe); | 1355 | reg = PCH_TRANSCONF(pipe); |
1356 | val = I915_READ(reg); | 1356 | val = I915_READ(reg); |
1357 | enabled = !!(val & TRANS_ENABLE); | 1357 | enabled = !!(val & TRANS_ENABLE); |
1358 | WARN(enabled, | 1358 | I915_STATE_WARN(enabled, |
1359 | "transcoder assertion failed, should be off on pipe %c but is still active\n", | 1359 | "transcoder assertion failed, should be off on pipe %c but is still active\n", |
1360 | pipe_name(pipe)); | 1360 | pipe_name(pipe)); |
1361 | } | 1361 | } |
@@ -1435,11 +1435,11 @@ static void assert_pch_dp_disabled(struct drm_i915_private *dev_priv, | |||
1435 | enum pipe pipe, int reg, u32 port_sel) | 1435 | enum pipe pipe, int reg, u32 port_sel) |
1436 | { | 1436 | { |
1437 | u32 val = I915_READ(reg); | 1437 | u32 val = I915_READ(reg); |
1438 | WARN(dp_pipe_enabled(dev_priv, pipe, port_sel, val), | 1438 | I915_STATE_WARN(dp_pipe_enabled(dev_priv, pipe, port_sel, val), |
1439 | "PCH DP (0x%08x) enabled on transcoder %c, should be disabled\n", | 1439 | "PCH DP (0x%08x) enabled on transcoder %c, should be disabled\n", |
1440 | reg, pipe_name(pipe)); | 1440 | reg, pipe_name(pipe)); |
1441 | 1441 | ||
1442 | WARN(HAS_PCH_IBX(dev_priv->dev) && (val & DP_PORT_EN) == 0 | 1442 | I915_STATE_WARN(HAS_PCH_IBX(dev_priv->dev) && (val & DP_PORT_EN) == 0 |
1443 | && (val & DP_PIPEB_SELECT), | 1443 | && (val & DP_PIPEB_SELECT), |
1444 | "IBX PCH dp port still using transcoder B\n"); | 1444 | "IBX PCH dp port still using transcoder B\n"); |
1445 | } | 1445 | } |
@@ -1448,11 +1448,11 @@ static void assert_pch_hdmi_disabled(struct drm_i915_private *dev_priv, | |||
1448 | enum pipe pipe, int reg) | 1448 | enum pipe pipe, int reg) |
1449 | { | 1449 | { |
1450 | u32 val = I915_READ(reg); | 1450 | u32 val = I915_READ(reg); |
1451 | WARN(hdmi_pipe_enabled(dev_priv, pipe, val), | 1451 | I915_STATE_WARN(hdmi_pipe_enabled(dev_priv, pipe, val), |
1452 | "PCH HDMI (0x%08x) enabled on transcoder %c, should be disabled\n", | 1452 | "PCH HDMI (0x%08x) enabled on transcoder %c, should be disabled\n", |
1453 | reg, pipe_name(pipe)); | 1453 | reg, pipe_name(pipe)); |
1454 | 1454 | ||
1455 | WARN(HAS_PCH_IBX(dev_priv->dev) && (val & SDVO_ENABLE) == 0 | 1455 | I915_STATE_WARN(HAS_PCH_IBX(dev_priv->dev) && (val & SDVO_ENABLE) == 0 |
1456 | && (val & SDVO_PIPE_B_SELECT), | 1456 | && (val & SDVO_PIPE_B_SELECT), |
1457 | "IBX PCH hdmi port still using transcoder B\n"); | 1457 | "IBX PCH hdmi port still using transcoder B\n"); |
1458 | } | 1458 | } |
@@ -1469,13 +1469,13 @@ static void assert_pch_ports_disabled(struct drm_i915_private *dev_priv, | |||
1469 | 1469 | ||
1470 | reg = PCH_ADPA; | 1470 | reg = PCH_ADPA; |
1471 | val = I915_READ(reg); | 1471 | val = I915_READ(reg); |
1472 | WARN(adpa_pipe_enabled(dev_priv, pipe, val), | 1472 | I915_STATE_WARN(adpa_pipe_enabled(dev_priv, pipe, val), |
1473 | "PCH VGA enabled on transcoder %c, should be disabled\n", | 1473 | "PCH VGA enabled on transcoder %c, should be disabled\n", |
1474 | pipe_name(pipe)); | 1474 | pipe_name(pipe)); |
1475 | 1475 | ||
1476 | reg = PCH_LVDS; | 1476 | reg = PCH_LVDS; |
1477 | val = I915_READ(reg); | 1477 | val = I915_READ(reg); |
1478 | WARN(lvds_pipe_enabled(dev_priv, pipe, val), | 1478 | I915_STATE_WARN(lvds_pipe_enabled(dev_priv, pipe, val), |
1479 | "PCH LVDS enabled on transcoder %c, should be disabled\n", | 1479 | "PCH LVDS enabled on transcoder %c, should be disabled\n", |
1480 | pipe_name(pipe)); | 1480 | pipe_name(pipe)); |
1481 | 1481 | ||
@@ -5311,25 +5311,25 @@ static void intel_connector_check_state(struct intel_connector *connector) | |||
5311 | if (connector->mst_port) | 5311 | if (connector->mst_port) |
5312 | return; | 5312 | return; |
5313 | 5313 | ||
5314 | WARN(connector->base.dpms == DRM_MODE_DPMS_OFF, | 5314 | I915_STATE_WARN(connector->base.dpms == DRM_MODE_DPMS_OFF, |
5315 | "wrong connector dpms state\n"); | 5315 | "wrong connector dpms state\n"); |
5316 | WARN(connector->base.encoder != &encoder->base, | 5316 | I915_STATE_WARN(connector->base.encoder != &encoder->base, |
5317 | "active connector not linked to encoder\n"); | 5317 | "active connector not linked to encoder\n"); |
5318 | 5318 | ||
5319 | if (encoder) { | 5319 | if (encoder) { |
5320 | WARN(!encoder->connectors_active, | 5320 | I915_STATE_WARN(!encoder->connectors_active, |
5321 | "encoder->connectors_active not set\n"); | 5321 | "encoder->connectors_active not set\n"); |
5322 | 5322 | ||
5323 | encoder_enabled = encoder->get_hw_state(encoder, &pipe); | 5323 | encoder_enabled = encoder->get_hw_state(encoder, &pipe); |
5324 | WARN(!encoder_enabled, "encoder not enabled\n"); | 5324 | I915_STATE_WARN(!encoder_enabled, "encoder not enabled\n"); |
5325 | if (WARN_ON(!encoder->base.crtc)) | 5325 | if (I915_STATE_WARN_ON(!encoder->base.crtc)) |
5326 | return; | 5326 | return; |
5327 | 5327 | ||
5328 | crtc = encoder->base.crtc; | 5328 | crtc = encoder->base.crtc; |
5329 | 5329 | ||
5330 | WARN(!crtc->enabled, "crtc not enabled\n"); | 5330 | I915_STATE_WARN(!crtc->enabled, "crtc not enabled\n"); |
5331 | WARN(!to_intel_crtc(crtc)->active, "crtc not active\n"); | 5331 | I915_STATE_WARN(!to_intel_crtc(crtc)->active, "crtc not active\n"); |
5332 | WARN(pipe != to_intel_crtc(crtc)->pipe, | 5332 | I915_STATE_WARN(pipe != to_intel_crtc(crtc)->pipe, |
5333 | "encoder active on the wrong pipe\n"); | 5333 | "encoder active on the wrong pipe\n"); |
5334 | } | 5334 | } |
5335 | } | 5335 | } |
@@ -7739,24 +7739,24 @@ static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv) | |||
7739 | struct intel_crtc *crtc; | 7739 | struct intel_crtc *crtc; |
7740 | 7740 | ||
7741 | for_each_intel_crtc(dev, crtc) | 7741 | for_each_intel_crtc(dev, crtc) |
7742 | WARN(crtc->active, "CRTC for pipe %c enabled\n", | 7742 | I915_STATE_WARN(crtc->active, "CRTC for pipe %c enabled\n", |
7743 | pipe_name(crtc->pipe)); | 7743 | pipe_name(crtc->pipe)); |
7744 | 7744 | ||
7745 | WARN(I915_READ(HSW_PWR_WELL_DRIVER), "Power well on\n"); | 7745 | I915_STATE_WARN(I915_READ(HSW_PWR_WELL_DRIVER), "Power well on\n"); |
7746 | WARN(I915_READ(SPLL_CTL) & SPLL_PLL_ENABLE, "SPLL enabled\n"); | 7746 | I915_STATE_WARN(I915_READ(SPLL_CTL) & SPLL_PLL_ENABLE, "SPLL enabled\n"); |
7747 | WARN(I915_READ(WRPLL_CTL1) & WRPLL_PLL_ENABLE, "WRPLL1 enabled\n"); | 7747 | I915_STATE_WARN(I915_READ(WRPLL_CTL1) & WRPLL_PLL_ENABLE, "WRPLL1 enabled\n"); |
7748 | WARN(I915_READ(WRPLL_CTL2) & WRPLL_PLL_ENABLE, "WRPLL2 enabled\n"); | 7748 | I915_STATE_WARN(I915_READ(WRPLL_CTL2) & WRPLL_PLL_ENABLE, "WRPLL2 enabled\n"); |
7749 | WARN(I915_READ(PCH_PP_STATUS) & PP_ON, "Panel power on\n"); | 7749 | I915_STATE_WARN(I915_READ(PCH_PP_STATUS) & PP_ON, "Panel power on\n"); |
7750 | WARN(I915_READ(BLC_PWM_CPU_CTL2) & BLM_PWM_ENABLE, | 7750 | I915_STATE_WARN(I915_READ(BLC_PWM_CPU_CTL2) & BLM_PWM_ENABLE, |
7751 | "CPU PWM1 enabled\n"); | 7751 | "CPU PWM1 enabled\n"); |
7752 | if (IS_HASWELL(dev)) | 7752 | if (IS_HASWELL(dev)) |
7753 | WARN(I915_READ(HSW_BLC_PWM2_CTL) & BLM_PWM_ENABLE, | 7753 | I915_STATE_WARN(I915_READ(HSW_BLC_PWM2_CTL) & BLM_PWM_ENABLE, |
7754 | "CPU PWM2 enabled\n"); | 7754 | "CPU PWM2 enabled\n"); |
7755 | WARN(I915_READ(BLC_PWM_PCH_CTL1) & BLM_PCH_PWM_ENABLE, | 7755 | I915_STATE_WARN(I915_READ(BLC_PWM_PCH_CTL1) & BLM_PCH_PWM_ENABLE, |
7756 | "PCH PWM1 enabled\n"); | 7756 | "PCH PWM1 enabled\n"); |
7757 | WARN(I915_READ(UTIL_PIN_CTL) & UTIL_PIN_ENABLE, | 7757 | I915_STATE_WARN(I915_READ(UTIL_PIN_CTL) & UTIL_PIN_ENABLE, |
7758 | "Utility pin enabled\n"); | 7758 | "Utility pin enabled\n"); |
7759 | WARN(I915_READ(PCH_GTC_CTL) & PCH_GTC_ENABLE, "PCH GTC enabled\n"); | 7759 | I915_STATE_WARN(I915_READ(PCH_GTC_CTL) & PCH_GTC_ENABLE, "PCH GTC enabled\n"); |
7760 | 7760 | ||
7761 | /* | 7761 | /* |
7762 | * In theory we can still leave IRQs enabled, as long as only the HPD | 7762 | * In theory we can still leave IRQs enabled, as long as only the HPD |
@@ -7764,7 +7764,7 @@ static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv) | |||
7764 | * gen-specific and since we only disable LCPLL after we fully disable | 7764 | * gen-specific and since we only disable LCPLL after we fully disable |
7765 | * the interrupts, the check below should be enough. | 7765 | * the interrupts, the check below should be enough. |
7766 | */ | 7766 | */ |
7767 | WARN(intel_irqs_enabled(dev_priv), "IRQs enabled\n"); | 7767 | I915_STATE_WARN(intel_irqs_enabled(dev_priv), "IRQs enabled\n"); |
7768 | } | 7768 | } |
7769 | 7769 | ||
7770 | static uint32_t hsw_read_dcomp(struct drm_i915_private *dev_priv) | 7770 | static uint32_t hsw_read_dcomp(struct drm_i915_private *dev_priv) |
@@ -10640,7 +10640,7 @@ check_connector_state(struct drm_device *dev) | |||
10640 | * ->get_hw_state callbacks. */ | 10640 | * ->get_hw_state callbacks. */ |
10641 | intel_connector_check_state(connector); | 10641 | intel_connector_check_state(connector); |
10642 | 10642 | ||
10643 | WARN(&connector->new_encoder->base != connector->base.encoder, | 10643 | I915_STATE_WARN(&connector->new_encoder->base != connector->base.encoder, |
10644 | "connector's staged encoder doesn't match current encoder\n"); | 10644 | "connector's staged encoder doesn't match current encoder\n"); |
10645 | } | 10645 | } |
10646 | } | 10646 | } |
@@ -10660,9 +10660,9 @@ check_encoder_state(struct drm_device *dev) | |||
10660 | encoder->base.base.id, | 10660 | encoder->base.base.id, |
10661 | encoder->base.name); | 10661 | encoder->base.name); |
10662 | 10662 | ||
10663 | WARN(&encoder->new_crtc->base != encoder->base.crtc, | 10663 | I915_STATE_WARN(&encoder->new_crtc->base != encoder->base.crtc, |
10664 | "encoder's stage crtc doesn't match current crtc\n"); | 10664 | "encoder's stage crtc doesn't match current crtc\n"); |
10665 | WARN(encoder->connectors_active && !encoder->base.crtc, | 10665 | I915_STATE_WARN(encoder->connectors_active && !encoder->base.crtc, |
10666 | "encoder's active_connectors set, but no crtc\n"); | 10666 | "encoder's active_connectors set, but no crtc\n"); |
10667 | 10667 | ||
10668 | list_for_each_entry(connector, &dev->mode_config.connector_list, | 10668 | list_for_each_entry(connector, &dev->mode_config.connector_list, |
@@ -10681,19 +10681,19 @@ check_encoder_state(struct drm_device *dev) | |||
10681 | if (!enabled && encoder->base.encoder_type == DRM_MODE_ENCODER_DPMST) | 10681 | if (!enabled && encoder->base.encoder_type == DRM_MODE_ENCODER_DPMST) |
10682 | continue; | 10682 | continue; |
10683 | 10683 | ||
10684 | WARN(!!encoder->base.crtc != enabled, | 10684 | I915_STATE_WARN(!!encoder->base.crtc != enabled, |
10685 | "encoder's enabled state mismatch " | 10685 | "encoder's enabled state mismatch " |
10686 | "(expected %i, found %i)\n", | 10686 | "(expected %i, found %i)\n", |
10687 | !!encoder->base.crtc, enabled); | 10687 | !!encoder->base.crtc, enabled); |
10688 | WARN(active && !encoder->base.crtc, | 10688 | I915_STATE_WARN(active && !encoder->base.crtc, |
10689 | "active encoder with no crtc\n"); | 10689 | "active encoder with no crtc\n"); |
10690 | 10690 | ||
10691 | WARN(encoder->connectors_active != active, | 10691 | I915_STATE_WARN(encoder->connectors_active != active, |
10692 | "encoder's computed active state doesn't match tracked active state " | 10692 | "encoder's computed active state doesn't match tracked active state " |
10693 | "(expected %i, found %i)\n", active, encoder->connectors_active); | 10693 | "(expected %i, found %i)\n", active, encoder->connectors_active); |
10694 | 10694 | ||
10695 | active = encoder->get_hw_state(encoder, &pipe); | 10695 | active = encoder->get_hw_state(encoder, &pipe); |
10696 | WARN(active != encoder->connectors_active, | 10696 | I915_STATE_WARN(active != encoder->connectors_active, |
10697 | "encoder's hw state doesn't match sw tracking " | 10697 | "encoder's hw state doesn't match sw tracking " |
10698 | "(expected %i, found %i)\n", | 10698 | "(expected %i, found %i)\n", |
10699 | encoder->connectors_active, active); | 10699 | encoder->connectors_active, active); |
@@ -10702,7 +10702,7 @@ check_encoder_state(struct drm_device *dev) | |||
10702 | continue; | 10702 | continue; |
10703 | 10703 | ||
10704 | tracked_pipe = to_intel_crtc(encoder->base.crtc)->pipe; | 10704 | tracked_pipe = to_intel_crtc(encoder->base.crtc)->pipe; |
10705 | WARN(active && pipe != tracked_pipe, | 10705 | I915_STATE_WARN(active && pipe != tracked_pipe, |
10706 | "active encoder's pipe doesn't match" | 10706 | "active encoder's pipe doesn't match" |
10707 | "(expected %i, found %i)\n", | 10707 | "(expected %i, found %i)\n", |
10708 | tracked_pipe, pipe); | 10708 | tracked_pipe, pipe); |
@@ -10727,7 +10727,7 @@ check_crtc_state(struct drm_device *dev) | |||
10727 | DRM_DEBUG_KMS("[CRTC:%d]\n", | 10727 | DRM_DEBUG_KMS("[CRTC:%d]\n", |
10728 | crtc->base.base.id); | 10728 | crtc->base.base.id); |
10729 | 10729 | ||
10730 | WARN(crtc->active && !crtc->base.enabled, | 10730 | I915_STATE_WARN(crtc->active && !crtc->base.enabled, |
10731 | "active crtc, but not enabled in sw tracking\n"); | 10731 | "active crtc, but not enabled in sw tracking\n"); |
10732 | 10732 | ||
10733 | for_each_intel_encoder(dev, encoder) { | 10733 | for_each_intel_encoder(dev, encoder) { |
@@ -10738,10 +10738,10 @@ check_crtc_state(struct drm_device *dev) | |||
10738 | active = true; | 10738 | active = true; |
10739 | } | 10739 | } |
10740 | 10740 | ||
10741 | WARN(active != crtc->active, | 10741 | I915_STATE_WARN(active != crtc->active, |
10742 | "crtc's computed active state doesn't match tracked active state " | 10742 | "crtc's computed active state doesn't match tracked active state " |
10743 | "(expected %i, found %i)\n", active, crtc->active); | 10743 | "(expected %i, found %i)\n", active, crtc->active); |
10744 | WARN(enabled != crtc->base.enabled, | 10744 | I915_STATE_WARN(enabled != crtc->base.enabled, |
10745 | "crtc's computed enabled state doesn't match tracked enabled state " | 10745 | "crtc's computed enabled state doesn't match tracked enabled state " |
10746 | "(expected %i, found %i)\n", enabled, crtc->base.enabled); | 10746 | "(expected %i, found %i)\n", enabled, crtc->base.enabled); |
10747 | 10747 | ||
@@ -10761,13 +10761,13 @@ check_crtc_state(struct drm_device *dev) | |||
10761 | encoder->get_config(encoder, &pipe_config); | 10761 | encoder->get_config(encoder, &pipe_config); |
10762 | } | 10762 | } |
10763 | 10763 | ||
10764 | WARN(crtc->active != active, | 10764 | I915_STATE_WARN(crtc->active != active, |
10765 | "crtc active state doesn't match with hw state " | 10765 | "crtc active state doesn't match with hw state " |
10766 | "(expected %i, found %i)\n", crtc->active, active); | 10766 | "(expected %i, found %i)\n", crtc->active, active); |
10767 | 10767 | ||
10768 | if (active && | 10768 | if (active && |
10769 | !intel_pipe_config_compare(dev, &crtc->config, &pipe_config)) { | 10769 | !intel_pipe_config_compare(dev, &crtc->config, &pipe_config)) { |
10770 | WARN(1, "pipe state doesn't match!\n"); | 10770 | I915_STATE_WARN(1, "pipe state doesn't match!\n"); |
10771 | intel_dump_pipe_config(crtc, &pipe_config, | 10771 | intel_dump_pipe_config(crtc, &pipe_config, |
10772 | "[hw state]"); | 10772 | "[hw state]"); |
10773 | intel_dump_pipe_config(crtc, &crtc->config, | 10773 | intel_dump_pipe_config(crtc, &crtc->config, |
@@ -10795,14 +10795,14 @@ check_shared_dpll_state(struct drm_device *dev) | |||
10795 | 10795 | ||
10796 | active = pll->get_hw_state(dev_priv, pll, &dpll_hw_state); | 10796 | active = pll->get_hw_state(dev_priv, pll, &dpll_hw_state); |
10797 | 10797 | ||
10798 | WARN(pll->active > hweight32(pll->config.crtc_mask), | 10798 | I915_STATE_WARN(pll->active > hweight32(pll->config.crtc_mask), |
10799 | "more active pll users than references: %i vs %i\n", | 10799 | "more active pll users than references: %i vs %i\n", |
10800 | pll->active, hweight32(pll->config.crtc_mask)); | 10800 | pll->active, hweight32(pll->config.crtc_mask)); |
10801 | WARN(pll->active && !pll->on, | 10801 | I915_STATE_WARN(pll->active && !pll->on, |
10802 | "pll in active use but not on in sw tracking\n"); | 10802 | "pll in active use but not on in sw tracking\n"); |
10803 | WARN(pll->on && !pll->active, | 10803 | I915_STATE_WARN(pll->on && !pll->active, |
10804 | "pll in on but not on in use in sw tracking\n"); | 10804 | "pll in on but not on in use in sw tracking\n"); |
10805 | WARN(pll->on != active, | 10805 | I915_STATE_WARN(pll->on != active, |
10806 | "pll on state mismatch (expected %i, found %i)\n", | 10806 | "pll on state mismatch (expected %i, found %i)\n", |
10807 | pll->on, active); | 10807 | pll->on, active); |
10808 | 10808 | ||
@@ -10812,14 +10812,14 @@ check_shared_dpll_state(struct drm_device *dev) | |||
10812 | if (crtc->active && intel_crtc_to_shared_dpll(crtc) == pll) | 10812 | if (crtc->active && intel_crtc_to_shared_dpll(crtc) == pll) |
10813 | active_crtcs++; | 10813 | active_crtcs++; |
10814 | } | 10814 | } |
10815 | WARN(pll->active != active_crtcs, | 10815 | I915_STATE_WARN(pll->active != active_crtcs, |
10816 | "pll active crtcs mismatch (expected %i, found %i)\n", | 10816 | "pll active crtcs mismatch (expected %i, found %i)\n", |
10817 | pll->active, active_crtcs); | 10817 | pll->active, active_crtcs); |
10818 | WARN(hweight32(pll->config.crtc_mask) != enabled_crtcs, | 10818 | I915_STATE_WARN(hweight32(pll->config.crtc_mask) != enabled_crtcs, |
10819 | "pll enabled crtcs mismatch (expected %i, found %i)\n", | 10819 | "pll enabled crtcs mismatch (expected %i, found %i)\n", |
10820 | hweight32(pll->config.crtc_mask), enabled_crtcs); | 10820 | hweight32(pll->config.crtc_mask), enabled_crtcs); |
10821 | 10821 | ||
10822 | WARN(pll->on && memcmp(&pll->config.hw_state, &dpll_hw_state, | 10822 | I915_STATE_WARN(pll->on && memcmp(&pll->config.hw_state, &dpll_hw_state, |
10823 | sizeof(dpll_hw_state)), | 10823 | sizeof(dpll_hw_state)), |
10824 | "pll hw state mismatch\n"); | 10824 | "pll hw state mismatch\n"); |
10825 | } | 10825 | } |