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authorChris Wilson <chris@chris-wilson.co.uk>2016-08-04 02:52:31 -0400
committerChris Wilson <chris@chris-wilson.co.uk>2016-08-04 03:09:22 -0400
commitd72d908b5619896fe7832b0c4c408e664ffe4e69 (patch)
tree21cd60b0c85576d2dcf8ceb91a3091a24b31d85c /drivers/gpu/drm/i915/intel_display.c
parent27c01aaef041f1fa3908c0330ff86d345523c3dc (diff)
drm/i915: Mark up i915_gem_active for locking annotation
The future annotations will track the locking used for access to ensure that it is always sufficient. We make the preparations now to present the API ahead and to make sure that GCC can eliminate the unused parameter. Before: 6298417 3619610 696320 10614347 a1f64b vmlinux After: 6298417 3619610 696320 10614347 a1f64b vmlinux (with i915 builtin) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1470293567-10811-12-git-send-email-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 8c03d13d494d..d54a3ea56536 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -11370,7 +11370,8 @@ static bool use_mmio_flip(struct intel_engine_cs *engine,
11370 if (resv && !reservation_object_test_signaled_rcu(resv, false)) 11370 if (resv && !reservation_object_test_signaled_rcu(resv, false))
11371 return true; 11371 return true;
11372 11372
11373 return engine != i915_gem_active_get_engine(&obj->last_write); 11373 return engine != i915_gem_active_get_engine(&obj->last_write,
11374 &obj->base.dev->struct_mutex);
11374} 11375}
11375 11376
11376static void skl_do_mmio_flip(struct intel_crtc *intel_crtc, 11377static void skl_do_mmio_flip(struct intel_crtc *intel_crtc,
@@ -11673,7 +11674,8 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
11673 } else if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev)) { 11674 } else if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev)) {
11674 engine = &dev_priv->engine[BCS]; 11675 engine = &dev_priv->engine[BCS];
11675 } else if (INTEL_INFO(dev)->gen >= 7) { 11676 } else if (INTEL_INFO(dev)->gen >= 7) {
11676 engine = i915_gem_active_get_engine(&obj->last_write); 11677 engine = i915_gem_active_get_engine(&obj->last_write,
11678 &obj->base.dev->struct_mutex);
11677 if (engine == NULL || engine->id != RCS) 11679 if (engine == NULL || engine->id != RCS)
11678 engine = &dev_priv->engine[BCS]; 11680 engine = &dev_priv->engine[BCS];
11679 } else { 11681 } else {
@@ -11694,7 +11696,8 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
11694 if (mmio_flip) { 11696 if (mmio_flip) {
11695 INIT_WORK(&work->mmio_work, intel_mmio_flip_work_func); 11697 INIT_WORK(&work->mmio_work, intel_mmio_flip_work_func);
11696 11698
11697 work->flip_queued_req = i915_gem_active_get(&obj->last_write); 11699 work->flip_queued_req = i915_gem_active_get(&obj->last_write,
11700 &obj->base.dev->struct_mutex);
11698 schedule_work(&work->mmio_work); 11701 schedule_work(&work->mmio_work);
11699 } else { 11702 } else {
11700 request = i915_gem_request_alloc(engine, engine->last_context); 11703 request = i915_gem_request_alloc(engine, engine->last_context);
@@ -14038,7 +14041,8 @@ intel_prepare_plane_fb(struct drm_plane *plane,
14038 14041
14039 if (ret == 0) { 14042 if (ret == 0) {
14040 to_intel_plane_state(new_state)->wait_req = 14043 to_intel_plane_state(new_state)->wait_req =
14041 i915_gem_active_get(&obj->last_write); 14044 i915_gem_active_get(&obj->last_write,
14045 &obj->base.dev->struct_mutex);
14042 } 14046 }
14043 14047
14044 return ret; 14048 return ret;