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authorVille Syrjälä <ville.syrjala@linux.intel.com>2014-08-14 15:04:37 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-09-19 08:43:16 -0400
commit4b3a9526fc3228e74011b88f58088336acd2c9e2 (patch)
tree6f6178b190017a12b2818e2c3727e183f7357b14 /drivers/gpu/drm/i915/intel_display.c
parent4f905cf97fb09b34193c7494bb27e49a56de934b (diff)
drm/i915: Move vblank enable earlier and disable later
We changed to an interrupt based vblank wait (as opposed to polling) in: commit 44bd93a3d367913d883be6abba9a6e51a53c4e90 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Fri Jul 25 23:36:44 2014 +0200 drm/i915: Use generic vblank wait However we already had vblank waits on the wrong side of drm_vblank_{on,off}() calls due to various workarounds, so now we get a warning more or less every time we do a modeset, and we fail to wait for the vblank like we should. Move the drm_vblank_{on,off}() calls back out from intel_crtc_{enable,disable}_planes() so that all of these vblank waits return to proper operation. Also move the cxsr wait a bit earlier so that we can keep the encoder disable after we've turned off vblanks. Moving stuff out from the plane enable/disable functions seems preferrable to moving the workaround stuff in since the workarounds are required only on specific platforms. While at it switch over to the drm_crtc_ variants of the vblank on/off functions. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82525 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82490 Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c35
1 files changed, 24 insertions, 11 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index ef1d8fbfaecd..365e04ca9120 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3997,10 +3997,6 @@ static void intel_crtc_enable_planes(struct drm_crtc *crtc)
3997 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 3997 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
3998 int pipe = intel_crtc->pipe; 3998 int pipe = intel_crtc->pipe;
3999 3999
4000 assert_vblank_disabled(crtc);
4001
4002 drm_vblank_on(dev, pipe);
4003
4004 intel_enable_primary_hw_plane(crtc->primary, crtc); 4000 intel_enable_primary_hw_plane(crtc->primary, crtc);
4005 intel_enable_planes(crtc); 4001 intel_enable_planes(crtc);
4006 intel_crtc_update_cursor(crtc, true); 4002 intel_crtc_update_cursor(crtc, true);
@@ -4046,10 +4042,6 @@ static void intel_crtc_disable_planes(struct drm_crtc *crtc)
4046 * consider this a flip to a NULL plane. 4042 * consider this a flip to a NULL plane.
4047 */ 4043 */
4048 intel_frontbuffer_flip(dev, INTEL_FRONTBUFFER_ALL_MASK(pipe)); 4044 intel_frontbuffer_flip(dev, INTEL_FRONTBUFFER_ALL_MASK(pipe));
4049
4050 drm_vblank_off(dev, pipe);
4051
4052 assert_vblank_disabled(crtc);
4053} 4045}
4054 4046
4055static void ironlake_crtc_enable(struct drm_crtc *crtc) 4047static void ironlake_crtc_enable(struct drm_crtc *crtc)
@@ -4119,6 +4111,9 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
4119 if (HAS_PCH_CPT(dev)) 4111 if (HAS_PCH_CPT(dev))
4120 cpt_verify_modeset(dev, intel_crtc->pipe); 4112 cpt_verify_modeset(dev, intel_crtc->pipe);
4121 4113
4114 assert_vblank_disabled(crtc);
4115 drm_crtc_vblank_on(crtc);
4116
4122 intel_crtc_enable_planes(crtc); 4117 intel_crtc_enable_planes(crtc);
4123} 4118}
4124 4119
@@ -4226,6 +4221,9 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
4226 intel_opregion_notify_encoder(encoder, true); 4221 intel_opregion_notify_encoder(encoder, true);
4227 } 4222 }
4228 4223
4224 assert_vblank_disabled(crtc);
4225 drm_crtc_vblank_on(crtc);
4226
4229 /* If we change the relative order between pipe/planes enabling, we need 4227 /* If we change the relative order between pipe/planes enabling, we need
4230 * to change the workaround. */ 4228 * to change the workaround. */
4231 haswell_mode_set_planes_workaround(intel_crtc); 4229 haswell_mode_set_planes_workaround(intel_crtc);
@@ -4261,6 +4259,9 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
4261 4259
4262 intel_crtc_disable_planes(crtc); 4260 intel_crtc_disable_planes(crtc);
4263 4261
4262 drm_crtc_vblank_off(crtc);
4263 assert_vblank_disabled(crtc);
4264
4264 for_each_encoder_on_crtc(dev, crtc, encoder) 4265 for_each_encoder_on_crtc(dev, crtc, encoder)
4265 encoder->disable(encoder); 4266 encoder->disable(encoder);
4266 4267
@@ -4323,6 +4324,9 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
4323 4324
4324 intel_crtc_disable_planes(crtc); 4325 intel_crtc_disable_planes(crtc);
4325 4326
4327 drm_crtc_vblank_off(crtc);
4328 assert_vblank_disabled(crtc);
4329
4326 for_each_encoder_on_crtc(dev, crtc, encoder) { 4330 for_each_encoder_on_crtc(dev, crtc, encoder) {
4327 intel_opregion_notify_encoder(encoder, false); 4331 intel_opregion_notify_encoder(encoder, false);
4328 encoder->disable(encoder); 4332 encoder->disable(encoder);
@@ -4789,6 +4793,9 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
4789 for_each_encoder_on_crtc(dev, crtc, encoder) 4793 for_each_encoder_on_crtc(dev, crtc, encoder)
4790 encoder->enable(encoder); 4794 encoder->enable(encoder);
4791 4795
4796 assert_vblank_disabled(crtc);
4797 drm_crtc_vblank_on(crtc);
4798
4792 intel_crtc_enable_planes(crtc); 4799 intel_crtc_enable_planes(crtc);
4793 4800
4794 /* Underruns don't raise interrupts, so check manually. */ 4801 /* Underruns don't raise interrupts, so check manually. */
@@ -4846,6 +4853,9 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
4846 for_each_encoder_on_crtc(dev, crtc, encoder) 4853 for_each_encoder_on_crtc(dev, crtc, encoder)
4847 encoder->enable(encoder); 4854 encoder->enable(encoder);
4848 4855
4856 assert_vblank_disabled(crtc);
4857 drm_crtc_vblank_on(crtc);
4858
4849 intel_crtc_enable_planes(crtc); 4859 intel_crtc_enable_planes(crtc);
4850 4860
4851 /* 4861 /*
@@ -4909,9 +4919,6 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
4909 intel_set_memory_cxsr(dev_priv, false); 4919 intel_set_memory_cxsr(dev_priv, false);
4910 intel_crtc_disable_planes(crtc); 4920 intel_crtc_disable_planes(crtc);
4911 4921
4912 for_each_encoder_on_crtc(dev, crtc, encoder)
4913 encoder->disable(encoder);
4914
4915 /* 4922 /*
4916 * On gen2 planes are double buffered but the pipe isn't, so we must 4923 * On gen2 planes are double buffered but the pipe isn't, so we must
4917 * wait for planes to fully turn off before disabling the pipe. 4924 * wait for planes to fully turn off before disabling the pipe.
@@ -4920,6 +4927,12 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
4920 */ 4927 */
4921 intel_wait_for_vblank(dev, pipe); 4928 intel_wait_for_vblank(dev, pipe);
4922 4929
4930 drm_crtc_vblank_off(crtc);
4931 assert_vblank_disabled(crtc);
4932
4933 for_each_encoder_on_crtc(dev, crtc, encoder)
4934 encoder->disable(encoder);
4935
4923 intel_disable_pipe(intel_crtc); 4936 intel_disable_pipe(intel_crtc);
4924 4937
4925 i9xx_pfit_disable(intel_crtc); 4938 i9xx_pfit_disable(intel_crtc);