diff options
author | Imre Deak <imre.deak@intel.com> | 2014-03-04 12:22:57 -0500 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-03-07 16:36:51 -0500 |
commit | 319be8ae8aec7550371ac58f0fd29e9e51207b5b (patch) | |
tree | d1e89f9459d05693c1f3fb128f4cfc3c1ac33839 /drivers/gpu/drm/i915/intel_display.c | |
parent | a45f4466e4e160e6ce5332895710d3d881a6a51c (diff) |
drm/i915: add port power domains
Parts that poke port specific HW blocks like the encoder HW state
readout or connector hotplug detect code need a way to check whether
required power domains are on or enable/disable these. For this purpose
add a set of power domains that refer to the port HW blocks. Get the
proper port power domains during modeset.
For now when requesting the power domain for a DDI port get it for a 4
lane configuration. This can be optimized later to request only the 2
lane power domain, when proper support is added on the VLV PHY side for
this. Atm, the PHY setup code assumes a 4 lane config in all cases.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 51 |
1 files changed, 46 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index ee786c585026..414da19499f9 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -3962,9 +3962,49 @@ static void i9xx_pfit_enable(struct intel_crtc *crtc) | |||
3962 | for ((domain) = 0; (domain) < POWER_DOMAIN_NUM; (domain)++) \ | 3962 | for ((domain) = 0; (domain) < POWER_DOMAIN_NUM; (domain)++) \ |
3963 | if ((1 << (domain)) & (mask)) | 3963 | if ((1 << (domain)) & (mask)) |
3964 | 3964 | ||
3965 | static unsigned long get_pipe_power_domains(struct drm_device *dev, | 3965 | enum intel_display_power_domain |
3966 | enum pipe pipe, bool pfit_enabled) | 3966 | intel_display_port_power_domain(struct intel_encoder *intel_encoder) |
3967 | { | ||
3968 | struct drm_device *dev = intel_encoder->base.dev; | ||
3969 | struct intel_digital_port *intel_dig_port; | ||
3970 | |||
3971 | switch (intel_encoder->type) { | ||
3972 | case INTEL_OUTPUT_UNKNOWN: | ||
3973 | /* Only DDI platforms should ever use this output type */ | ||
3974 | WARN_ON_ONCE(!HAS_DDI(dev)); | ||
3975 | case INTEL_OUTPUT_DISPLAYPORT: | ||
3976 | case INTEL_OUTPUT_HDMI: | ||
3977 | case INTEL_OUTPUT_EDP: | ||
3978 | intel_dig_port = enc_to_dig_port(&intel_encoder->base); | ||
3979 | switch (intel_dig_port->port) { | ||
3980 | case PORT_A: | ||
3981 | return POWER_DOMAIN_PORT_DDI_A_4_LANES; | ||
3982 | case PORT_B: | ||
3983 | return POWER_DOMAIN_PORT_DDI_B_4_LANES; | ||
3984 | case PORT_C: | ||
3985 | return POWER_DOMAIN_PORT_DDI_C_4_LANES; | ||
3986 | case PORT_D: | ||
3987 | return POWER_DOMAIN_PORT_DDI_D_4_LANES; | ||
3988 | default: | ||
3989 | WARN_ON_ONCE(1); | ||
3990 | return POWER_DOMAIN_PORT_OTHER; | ||
3991 | } | ||
3992 | case INTEL_OUTPUT_ANALOG: | ||
3993 | return POWER_DOMAIN_PORT_CRT; | ||
3994 | case INTEL_OUTPUT_DSI: | ||
3995 | return POWER_DOMAIN_PORT_DSI; | ||
3996 | default: | ||
3997 | return POWER_DOMAIN_PORT_OTHER; | ||
3998 | } | ||
3999 | } | ||
4000 | |||
4001 | static unsigned long get_crtc_power_domains(struct drm_crtc *crtc) | ||
3967 | { | 4002 | { |
4003 | struct drm_device *dev = crtc->dev; | ||
4004 | struct intel_encoder *intel_encoder; | ||
4005 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | ||
4006 | enum pipe pipe = intel_crtc->pipe; | ||
4007 | bool pfit_enabled = intel_crtc->config.pch_pfit.enabled; | ||
3968 | unsigned long mask; | 4008 | unsigned long mask; |
3969 | enum transcoder transcoder; | 4009 | enum transcoder transcoder; |
3970 | 4010 | ||
@@ -3975,6 +4015,9 @@ static unsigned long get_pipe_power_domains(struct drm_device *dev, | |||
3975 | if (pfit_enabled) | 4015 | if (pfit_enabled) |
3976 | mask |= BIT(POWER_DOMAIN_PIPE_PANEL_FITTER(pipe)); | 4016 | mask |= BIT(POWER_DOMAIN_PIPE_PANEL_FITTER(pipe)); |
3977 | 4017 | ||
4018 | for_each_encoder_on_crtc(dev, crtc, intel_encoder) | ||
4019 | mask |= BIT(intel_display_port_power_domain(intel_encoder)); | ||
4020 | |||
3978 | return mask; | 4021 | return mask; |
3979 | } | 4022 | } |
3980 | 4023 | ||
@@ -4008,9 +4051,7 @@ static void modeset_update_crtc_power_domains(struct drm_device *dev) | |||
4008 | if (!crtc->base.enabled) | 4051 | if (!crtc->base.enabled) |
4009 | continue; | 4052 | continue; |
4010 | 4053 | ||
4011 | pipe_domains[crtc->pipe] = get_pipe_power_domains(dev, | 4054 | pipe_domains[crtc->pipe] = get_crtc_power_domains(&crtc->base); |
4012 | crtc->pipe, | ||
4013 | crtc->config.pch_pfit.enabled); | ||
4014 | 4055 | ||
4015 | for_each_power_domain(domain, pipe_domains[crtc->pipe]) | 4056 | for_each_power_domain(domain, pipe_domains[crtc->pipe]) |
4016 | intel_display_power_get(dev_priv, domain); | 4057 | intel_display_power_get(dev_priv, domain); |