diff options
author | Maarten Lankhorst <maarten.lankhorst@linux.intel.com> | 2016-05-17 09:07:47 -0400 |
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committer | Maarten Lankhorst <maarten.lankhorst@linux.intel.com> | 2016-05-19 08:36:59 -0400 |
commit | 5251f04e0c91de058531c658068939e91a29e035 (patch) | |
tree | d187f5707757431c9918514aec9b7a1003b3daeb /drivers/gpu/drm/i915/i915_irq.c | |
parent | ef58319d3fcf90050ac417e918b0c1e6373863bd (diff) |
drm/i915: Remove intel_prepare_page_flip, v3.
Instead of calling prepare_flip right before calling finish_page_flip
do everything from prepare_page_flip in finish_page_flip.
Putting prepare and finish page_flip in a single step removes the need
for INTEL_FLIP_COMPLETE, so it can be removed. This simplifies the code
slightly.
Changes since v1:
- Invert if case to simplify code.
- Add missing barrier.
- Reword commit message.
Changes since v2:
- intel_page_flip_plane is removed.
- work->pending is turned into a bool.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463490484-19540-5-git-send-email-maarten.lankhorst@linux.intel.com
Reviewed-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 18 |
1 files changed, 4 insertions, 14 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 920a5e4abb70..148741646fb0 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
@@ -1705,10 +1705,8 @@ static void valleyview_pipestat_irq_handler(struct drm_i915_private *dev_priv, | |||
1705 | intel_pipe_handle_vblank(dev_priv, pipe)) | 1705 | intel_pipe_handle_vblank(dev_priv, pipe)) |
1706 | intel_check_page_flip(dev_priv, pipe); | 1706 | intel_check_page_flip(dev_priv, pipe); |
1707 | 1707 | ||
1708 | if (pipe_stats[pipe] & PLANE_FLIP_DONE_INT_STATUS_VLV) { | 1708 | if (pipe_stats[pipe] & PLANE_FLIP_DONE_INT_STATUS_VLV) |
1709 | intel_prepare_page_flip(dev_priv, pipe); | ||
1710 | intel_finish_page_flip(dev_priv, pipe); | 1709 | intel_finish_page_flip(dev_priv, pipe); |
1711 | } | ||
1712 | 1710 | ||
1713 | if (pipe_stats[pipe] & PIPE_CRC_DONE_INTERRUPT_STATUS) | 1711 | if (pipe_stats[pipe] & PIPE_CRC_DONE_INTERRUPT_STATUS) |
1714 | i9xx_pipe_crc_irq_handler(dev_priv, pipe); | 1712 | i9xx_pipe_crc_irq_handler(dev_priv, pipe); |
@@ -2162,10 +2160,8 @@ static void ilk_display_irq_handler(struct drm_i915_private *dev_priv, | |||
2162 | i9xx_pipe_crc_irq_handler(dev_priv, pipe); | 2160 | i9xx_pipe_crc_irq_handler(dev_priv, pipe); |
2163 | 2161 | ||
2164 | /* plane/pipes map 1:1 on ilk+ */ | 2162 | /* plane/pipes map 1:1 on ilk+ */ |
2165 | if (de_iir & DE_PLANE_FLIP_DONE(pipe)) { | 2163 | if (de_iir & DE_PLANE_FLIP_DONE(pipe)) |
2166 | intel_prepare_page_flip(dev_priv, pipe); | ||
2167 | intel_finish_page_flip(dev_priv, pipe); | 2164 | intel_finish_page_flip(dev_priv, pipe); |
2168 | } | ||
2169 | } | 2165 | } |
2170 | 2166 | ||
2171 | /* check event from PCH */ | 2167 | /* check event from PCH */ |
@@ -2209,10 +2205,8 @@ static void ivb_display_irq_handler(struct drm_i915_private *dev_priv, | |||
2209 | intel_check_page_flip(dev_priv, pipe); | 2205 | intel_check_page_flip(dev_priv, pipe); |
2210 | 2206 | ||
2211 | /* plane/pipes map 1:1 on ilk+ */ | 2207 | /* plane/pipes map 1:1 on ilk+ */ |
2212 | if (de_iir & DE_PLANE_FLIP_DONE_IVB(pipe)) { | 2208 | if (de_iir & DE_PLANE_FLIP_DONE_IVB(pipe)) |
2213 | intel_prepare_page_flip(dev_priv, pipe); | ||
2214 | intel_finish_page_flip(dev_priv, pipe); | 2209 | intel_finish_page_flip(dev_priv, pipe); |
2215 | } | ||
2216 | } | 2210 | } |
2217 | 2211 | ||
2218 | /* check event from PCH */ | 2212 | /* check event from PCH */ |
@@ -2417,10 +2411,8 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl) | |||
2417 | else | 2411 | else |
2418 | flip_done &= GEN8_PIPE_PRIMARY_FLIP_DONE; | 2412 | flip_done &= GEN8_PIPE_PRIMARY_FLIP_DONE; |
2419 | 2413 | ||
2420 | if (flip_done) { | 2414 | if (flip_done) |
2421 | intel_prepare_page_flip(dev_priv, pipe); | ||
2422 | intel_finish_page_flip(dev_priv, pipe); | 2415 | intel_finish_page_flip(dev_priv, pipe); |
2423 | } | ||
2424 | 2416 | ||
2425 | if (iir & GEN8_PIPE_CDCLK_CRC_DONE) | 2417 | if (iir & GEN8_PIPE_CDCLK_CRC_DONE) |
2426 | hsw_pipe_crc_irq_handler(dev_priv, pipe); | 2418 | hsw_pipe_crc_irq_handler(dev_priv, pipe); |
@@ -3998,7 +3990,6 @@ static bool i8xx_handle_vblank(struct drm_i915_private *dev_priv, | |||
3998 | if (I915_READ16(ISR) & flip_pending) | 3990 | if (I915_READ16(ISR) & flip_pending) |
3999 | goto check_page_flip; | 3991 | goto check_page_flip; |
4000 | 3992 | ||
4001 | intel_prepare_page_flip(dev_priv, plane); | ||
4002 | intel_finish_page_flip(dev_priv, pipe); | 3993 | intel_finish_page_flip(dev_priv, pipe); |
4003 | return true; | 3994 | return true; |
4004 | 3995 | ||
@@ -4188,7 +4179,6 @@ static bool i915_handle_vblank(struct drm_i915_private *dev_priv, | |||
4188 | if (I915_READ(ISR) & flip_pending) | 4179 | if (I915_READ(ISR) & flip_pending) |
4189 | goto check_page_flip; | 4180 | goto check_page_flip; |
4190 | 4181 | ||
4191 | intel_prepare_page_flip(dev_priv, plane); | ||
4192 | intel_finish_page_flip(dev_priv, pipe); | 4182 | intel_finish_page_flip(dev_priv, pipe); |
4193 | return true; | 4183 | return true; |
4194 | 4184 | ||