drm/i915: Update i915_gem_get_ggtt_size/_alignment to use drm_i915_private

For consistency, internal functions should take drm_i915_private rather
than drm_device. Now that we are subclassing drm_device, there are no
more size wins, but being consistent is its own blessing.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1470324762-2545-12-git-send-email-chris@chris-wilson.co.uk

1 files changed, 4 insertions, 4 deletions

diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 4e42da691e4e..b7f9875f69b4 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -117,15 +117,16 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
 static bool
 i915_gem_object_fence_ok(struct drm_i915_gem_object *obj, int tiling_mode)
 {
+        struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
         u32 size;
 
         if (tiling_mode == I915_TILING_NONE)
                 return true;
 
-        if (INTEL_INFO(obj->base.dev)->gen >= 4)
+        if (INTEL_GEN(dev_priv) >= 4)
                 return true;
 
-        if (IS_GEN3(obj->base.dev)) {
+        if (IS_GEN3(dev_priv)) {
                 if (i915_gem_obj_ggtt_offset(obj) & ~I915_FENCE_START_MASK)
                         return false;
         } else {
@@ -133,8 +134,7 @@ i915_gem_object_fence_ok(struct drm_i915_gem_object *obj, int tiling_mode)
                         return false;
         }
 
-        size = i915_gem_get_ggtt_size(obj->base.dev,
-                                      obj->base.size, tiling_mode);
+        size = i915_gem_get_ggtt_size(dev_priv, obj->base.size, tiling_mode);
         if (i915_gem_obj_ggtt_size(obj) != size)
                 return false;