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authorChris Wilson <chris@chris-wilson.co.uk>2012-03-26 04:10:27 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-03-27 07:16:17 -0400
commitdabdfe021ab1e985e6566009c774fb03f14b568e (patch)
tree12372e0f40a428cef1e86f02886b978d37fc30af /drivers/gpu/drm/i915/i915_gem.c
parentd1dd20a96524ac462ed4f28dae168b9637f079e5 (diff)
drm/i915: Avoid using mappable space for relocation processing through the CPU
We try to avoid writing the relocations through the uncached GTT, if the buffer is currently in the CPU write domain and so will be flushed out to main memory afterwards anyway. Also on SandyBridge we can safely write to the pages in cacheable memory, so long as the buffer is LLC mapped. In either of these cases, we therefore do not need to force the reallocation of the buffer into the mappable region of the GTT, reducing the aperture pressure. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem.c')
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 90e3fc18b8b5..09c033e5e02b 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -39,8 +39,6 @@
39static __must_check int i915_gem_object_flush_gpu_write_domain(struct drm_i915_gem_object *obj); 39static __must_check int i915_gem_object_flush_gpu_write_domain(struct drm_i915_gem_object *obj);
40static void i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj); 40static void i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj);
41static void i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj); 41static void i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj);
42static __must_check int i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj,
43 bool write);
44static __must_check int i915_gem_object_set_cpu_read_domain_range(struct drm_i915_gem_object *obj, 42static __must_check int i915_gem_object_set_cpu_read_domain_range(struct drm_i915_gem_object *obj,
45 uint64_t offset, 43 uint64_t offset,
46 uint64_t size); 44 uint64_t size);
@@ -3073,7 +3071,7 @@ i915_gem_object_finish_gpu(struct drm_i915_gem_object *obj)
3073 * This function returns when the move is complete, including waiting on 3071 * This function returns when the move is complete, including waiting on
3074 * flushes to occur. 3072 * flushes to occur.
3075 */ 3073 */
3076static int 3074int
3077i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj, bool write) 3075i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj, bool write)
3078{ 3076{
3079 uint32_t old_write_domain, old_read_domains; 3077 uint32_t old_write_domain, old_read_domains;