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authorPeter Antoine <peter.antoine@intel.com>2016-04-13 10:03:25 -0400
committerChris Wilson <chris@chris-wilson.co.uk>2016-04-14 05:45:40 -0400
commit0ccdacf694e9e5b77601ac872f38ffba96dc5dac (patch)
tree31c9e47a221cabc33cfd5fe38f516050c2231d96 /drivers/gpu/drm/i915/i915_gem.c
parentaa9b78104fe3210758fa9e6c644e9a108d371e8b (diff)
drm/i915/mocs: Program MOCS for all engines on init
Allow for the MOCS to be programmed for all engines. Currently we program the MOCS when the first render batch goes through. This works on most platforms but fails on platforms that do not run a render batch early, i.e. headless servers. The patch now programs all initialised engines on init and the RCS is programmed again within the initial batch. This is done for predictable consistency with regards to the hardware context. Hardware context loading sets the values of the MOCS for RCS and L3CC. Programming them from within the batch makes sure that the render context is valid, no matter what the previous state of the saved-context was. v2: posted correct version to the mailing list. v3: moved programming to within engine->init_hw() (Chris Wilson) v4: code formatting and white-space changes. (Chris Wilson) Testcase: igt/gem_mocs_settings Signed-off-by: Peter Antoine <peter.antoine@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: http://patchwork.freedesktop.org/patch/msgid/1460556205-6644-1-git-send-email-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem.c')
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 0bafe7d2cc4e..6ce2c31b9a81 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -32,6 +32,7 @@
32#include "i915_vgpu.h" 32#include "i915_vgpu.h"
33#include "i915_trace.h" 33#include "i915_trace.h"
34#include "intel_drv.h" 34#include "intel_drv.h"
35#include "intel_mocs.h"
35#include <linux/shmem_fs.h> 36#include <linux/shmem_fs.h>
36#include <linux/slab.h> 37#include <linux/slab.h>
37#include <linux/swap.h> 38#include <linux/swap.h>
@@ -4915,6 +4916,8 @@ i915_gem_init_hw(struct drm_device *dev)
4915 goto out; 4916 goto out;
4916 } 4917 }
4917 4918
4919 intel_mocs_init_l3cc_table(dev);
4920
4918 /* We can't enable contexts until all firmware is loaded */ 4921 /* We can't enable contexts until all firmware is loaded */
4919 if (HAS_GUC_UCODE(dev)) { 4922 if (HAS_GUC_UCODE(dev)) {
4920 ret = intel_guc_ucode_load(dev); 4923 ret = intel_guc_ucode_load(dev);