diff options
author | Christian König <christian.koenig@amd.com> | 2016-02-16 04:57:10 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2016-03-08 11:01:47 -0500 |
commit | 336d1f5efe93db3d997a6d105760dd613d7ecdce (patch) | |
tree | 15818ae465778ac8acaa1410c59042247f9800f4 /drivers/gpu/drm/amd/amdgpu | |
parent | bcc634f4a8f10a851dd3d8429ea28998351ca843 (diff) |
drm/amdgpu: remove HW fence owner
Not used any more since we now always use the sheduler.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu.h | 9 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 7 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 3 |
12 files changed, 16 insertions, 43 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 11a9f5899995..fab6ddb26b5b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h | |||
@@ -409,9 +409,6 @@ struct amdgpu_fence { | |||
409 | struct amdgpu_ring *ring; | 409 | struct amdgpu_ring *ring; |
410 | uint64_t seq; | 410 | uint64_t seq; |
411 | 411 | ||
412 | /* filp or special value for fence creator */ | ||
413 | void *owner; | ||
414 | |||
415 | wait_queue_t fence_wake; | 412 | wait_queue_t fence_wake; |
416 | }; | 413 | }; |
417 | 414 | ||
@@ -432,8 +429,7 @@ int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring, | |||
432 | unsigned irq_type); | 429 | unsigned irq_type); |
433 | void amdgpu_fence_driver_suspend(struct amdgpu_device *adev); | 430 | void amdgpu_fence_driver_suspend(struct amdgpu_device *adev); |
434 | void amdgpu_fence_driver_resume(struct amdgpu_device *adev); | 431 | void amdgpu_fence_driver_resume(struct amdgpu_device *adev); |
435 | int amdgpu_fence_emit(struct amdgpu_ring *ring, void *owner, | 432 | int amdgpu_fence_emit(struct amdgpu_ring *ring, struct amdgpu_fence **fence); |
436 | struct amdgpu_fence **fence); | ||
437 | void amdgpu_fence_process(struct amdgpu_ring *ring); | 433 | void amdgpu_fence_process(struct amdgpu_ring *ring); |
438 | int amdgpu_fence_wait_next(struct amdgpu_ring *ring); | 434 | int amdgpu_fence_wait_next(struct amdgpu_ring *ring); |
439 | int amdgpu_fence_wait_empty(struct amdgpu_ring *ring); | 435 | int amdgpu_fence_wait_empty(struct amdgpu_ring *ring); |
@@ -1177,8 +1173,7 @@ int amdgpu_ib_get(struct amdgpu_device *adev, struct amdgpu_vm *vm, | |||
1177 | unsigned size, struct amdgpu_ib *ib); | 1173 | unsigned size, struct amdgpu_ib *ib); |
1178 | void amdgpu_ib_free(struct amdgpu_device *adev, struct amdgpu_ib *ib); | 1174 | void amdgpu_ib_free(struct amdgpu_device *adev, struct amdgpu_ib *ib); |
1179 | int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, | 1175 | int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, |
1180 | struct amdgpu_ib *ib, void *owner, | 1176 | struct amdgpu_ib *ib, struct fence *last_vm_update, |
1181 | struct fence *last_vm_update, | ||
1182 | struct fence **f); | 1177 | struct fence **f); |
1183 | int amdgpu_ib_pool_init(struct amdgpu_device *adev); | 1178 | int amdgpu_ib_pool_init(struct amdgpu_device *adev); |
1184 | void amdgpu_ib_pool_fini(struct amdgpu_device *adev); | 1179 | void amdgpu_ib_pool_fini(struct amdgpu_device *adev); |
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c index 97db196dc6f8..d94b13ac290f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | |||
@@ -91,25 +91,21 @@ static u32 amdgpu_fence_read(struct amdgpu_ring *ring) | |||
91 | * amdgpu_fence_emit - emit a fence on the requested ring | 91 | * amdgpu_fence_emit - emit a fence on the requested ring |
92 | * | 92 | * |
93 | * @ring: ring the fence is associated with | 93 | * @ring: ring the fence is associated with |
94 | * @owner: creator of the fence | ||
95 | * @fence: amdgpu fence object | 94 | * @fence: amdgpu fence object |
96 | * | 95 | * |
97 | * Emits a fence command on the requested ring (all asics). | 96 | * Emits a fence command on the requested ring (all asics). |
98 | * Returns 0 on success, -ENOMEM on failure. | 97 | * Returns 0 on success, -ENOMEM on failure. |
99 | */ | 98 | */ |
100 | int amdgpu_fence_emit(struct amdgpu_ring *ring, void *owner, | 99 | int amdgpu_fence_emit(struct amdgpu_ring *ring, struct amdgpu_fence **fence) |
101 | struct amdgpu_fence **fence) | ||
102 | { | 100 | { |
103 | struct amdgpu_device *adev = ring->adev; | 101 | struct amdgpu_device *adev = ring->adev; |
104 | 102 | ||
105 | /* we are protected by the ring emission mutex */ | ||
106 | *fence = kmem_cache_alloc(amdgpu_fence_slab, GFP_KERNEL); | 103 | *fence = kmem_cache_alloc(amdgpu_fence_slab, GFP_KERNEL); |
107 | if ((*fence) == NULL) { | 104 | if ((*fence) == NULL) { |
108 | return -ENOMEM; | 105 | return -ENOMEM; |
109 | } | 106 | } |
110 | (*fence)->seq = ++ring->fence_drv.sync_seq; | 107 | (*fence)->seq = ++ring->fence_drv.sync_seq; |
111 | (*fence)->ring = ring; | 108 | (*fence)->ring = ring; |
112 | (*fence)->owner = owner; | ||
113 | fence_init(&(*fence)->base, &amdgpu_fence_ops, | 109 | fence_init(&(*fence)->base, &amdgpu_fence_ops, |
114 | &ring->fence_drv.fence_queue.lock, | 110 | &ring->fence_drv.fence_queue.lock, |
115 | adev->fence_context + ring->idx, | 111 | adev->fence_context + ring->idx, |
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c index 4e978e7aa1b8..9550247b030d 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | |||
@@ -101,7 +101,6 @@ void amdgpu_ib_free(struct amdgpu_device *adev, struct amdgpu_ib *ib) | |||
101 | * @adev: amdgpu_device pointer | 101 | * @adev: amdgpu_device pointer |
102 | * @num_ibs: number of IBs to schedule | 102 | * @num_ibs: number of IBs to schedule |
103 | * @ibs: IB objects to schedule | 103 | * @ibs: IB objects to schedule |
104 | * @owner: owner for creating the fences | ||
105 | * @f: fence created during this submission | 104 | * @f: fence created during this submission |
106 | * | 105 | * |
107 | * Schedule an IB on the associated ring (all asics). | 106 | * Schedule an IB on the associated ring (all asics). |
@@ -118,8 +117,7 @@ void amdgpu_ib_free(struct amdgpu_device *adev, struct amdgpu_ib *ib) | |||
118 | * to SI there was just a DE IB. | 117 | * to SI there was just a DE IB. |
119 | */ | 118 | */ |
120 | int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, | 119 | int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, |
121 | struct amdgpu_ib *ibs, void *owner, | 120 | struct amdgpu_ib *ibs, struct fence *last_vm_update, |
122 | struct fence *last_vm_update, | ||
123 | struct fence **f) | 121 | struct fence **f) |
124 | { | 122 | { |
125 | struct amdgpu_device *adev = ring->adev; | 123 | struct amdgpu_device *adev = ring->adev; |
@@ -183,7 +181,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, | |||
183 | amdgpu_ring_emit_hdp_invalidate(ring); | 181 | amdgpu_ring_emit_hdp_invalidate(ring); |
184 | } | 182 | } |
185 | 183 | ||
186 | r = amdgpu_fence_emit(ring, owner, &ib->fence); | 184 | r = amdgpu_fence_emit(ring, &ib->fence); |
187 | if (r) { | 185 | if (r) { |
188 | dev_err(adev->dev, "failed to emit fence (%d)\n", r); | 186 | dev_err(adev->dev, "failed to emit fence (%d)\n", r); |
189 | ring->current_ctx = old_ctx; | 187 | ring->current_ctx = old_ctx; |
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c index 90e52f7e17a0..692b45560d0a 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | |||
@@ -148,7 +148,7 @@ static struct fence *amdgpu_job_run(struct amd_sched_job *sched_job) | |||
148 | } | 148 | } |
149 | 149 | ||
150 | trace_amdgpu_sched_run_job(job); | 150 | trace_amdgpu_sched_run_job(job); |
151 | r = amdgpu_ib_schedule(job->ring, job->num_ibs, job->ibs, job->owner, | 151 | r = amdgpu_ib_schedule(job->ring, job->num_ibs, job->ibs, |
152 | job->sync.last_vm_update, &fence); | 152 | job->sync.last_vm_update, &fence); |
153 | if (r) { | 153 | if (r) { |
154 | DRM_ERROR("Error scheduling IBs (%d)\n", r); | 154 | DRM_ERROR("Error scheduling IBs (%d)\n", r); |
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c index 87690cc57206..e3673422aac8 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c | |||
@@ -60,12 +60,8 @@ void amdgpu_sync_create(struct amdgpu_sync *sync) | |||
60 | */ | 60 | */ |
61 | static bool amdgpu_sync_same_dev(struct amdgpu_device *adev, struct fence *f) | 61 | static bool amdgpu_sync_same_dev(struct amdgpu_device *adev, struct fence *f) |
62 | { | 62 | { |
63 | struct amdgpu_fence *a_fence = to_amdgpu_fence(f); | ||
64 | struct amd_sched_fence *s_fence = to_amd_sched_fence(f); | 63 | struct amd_sched_fence *s_fence = to_amd_sched_fence(f); |
65 | 64 | ||
66 | if (a_fence) | ||
67 | return a_fence->ring->adev == adev; | ||
68 | |||
69 | if (s_fence) { | 65 | if (s_fence) { |
70 | struct amdgpu_ring *ring; | 66 | struct amdgpu_ring *ring; |
71 | 67 | ||
@@ -85,13 +81,11 @@ static bool amdgpu_sync_same_dev(struct amdgpu_device *adev, struct fence *f) | |||
85 | */ | 81 | */ |
86 | static void *amdgpu_sync_get_owner(struct fence *f) | 82 | static void *amdgpu_sync_get_owner(struct fence *f) |
87 | { | 83 | { |
88 | struct amdgpu_fence *a_fence = to_amdgpu_fence(f); | ||
89 | struct amd_sched_fence *s_fence = to_amd_sched_fence(f); | 84 | struct amd_sched_fence *s_fence = to_amd_sched_fence(f); |
90 | 85 | ||
91 | if (s_fence) | 86 | if (s_fence) |
92 | return s_fence->owner; | 87 | return s_fence->owner; |
93 | else if (a_fence) | 88 | |
94 | return a_fence->owner; | ||
95 | return AMDGPU_FENCE_OWNER_UNDEFINED; | 89 | return AMDGPU_FENCE_OWNER_UNDEFINED; |
96 | } | 90 | } |
97 | 91 | ||
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c index 1de82bf4fc79..e5f0a5e29551 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | |||
@@ -886,8 +886,7 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo, | |||
886 | ib->length_dw = 16; | 886 | ib->length_dw = 16; |
887 | 887 | ||
888 | if (direct) { | 888 | if (direct) { |
889 | r = amdgpu_ib_schedule(ring, 1, ib, | 889 | r = amdgpu_ib_schedule(ring, 1, ib, NULL, &f); |
890 | AMDGPU_FENCE_OWNER_UNDEFINED, NULL, &f); | ||
891 | if (r) | 890 | if (r) |
892 | goto err_free; | 891 | goto err_free; |
893 | 892 | ||
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c index 39c3aa60381a..6d191fb40b38 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | |||
@@ -425,8 +425,7 @@ int amdgpu_vce_get_create_msg(struct amdgpu_ring *ring, uint32_t handle, | |||
425 | for (i = ib->length_dw; i < ib_size_dw; ++i) | 425 | for (i = ib->length_dw; i < ib_size_dw; ++i) |
426 | ib->ptr[i] = 0x0; | 426 | ib->ptr[i] = 0x0; |
427 | 427 | ||
428 | r = amdgpu_ib_schedule(ring, 1, ib, AMDGPU_FENCE_OWNER_UNDEFINED, | 428 | r = amdgpu_ib_schedule(ring, 1, ib, NULL, &f); |
429 | NULL, &f); | ||
430 | if (r) | 429 | if (r) |
431 | goto err; | 430 | goto err; |
432 | 431 | ||
@@ -487,9 +486,7 @@ int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle, | |||
487 | ib->ptr[i] = 0x0; | 486 | ib->ptr[i] = 0x0; |
488 | 487 | ||
489 | if (direct) { | 488 | if (direct) { |
490 | r = amdgpu_ib_schedule(ring, 1, ib, | 489 | r = amdgpu_ib_schedule(ring, 1, ib, NULL, &f); |
491 | AMDGPU_FENCE_OWNER_UNDEFINED, | ||
492 | NULL, &f); | ||
493 | if (r) | 490 | if (r) |
494 | goto err; | 491 | goto err; |
495 | 492 | ||
diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c index c4101ebd2b3f..b5b4220a6141 100644 --- a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c +++ b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c | |||
@@ -643,8 +643,7 @@ static int cik_sdma_ring_test_ib(struct amdgpu_ring *ring) | |||
643 | ib.ptr[3] = 1; | 643 | ib.ptr[3] = 1; |
644 | ib.ptr[4] = 0xDEADBEEF; | 644 | ib.ptr[4] = 0xDEADBEEF; |
645 | ib.length_dw = 5; | 645 | ib.length_dw = 5; |
646 | r = amdgpu_ib_schedule(ring, 1, &ib, AMDGPU_FENCE_OWNER_UNDEFINED, | 646 | r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f); |
647 | NULL, &f); | ||
648 | if (r) | 647 | if (r) |
649 | goto err1; | 648 | goto err1; |
650 | 649 | ||
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c index 1b713009c5d2..46c2436d74bd 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | |||
@@ -2136,8 +2136,7 @@ static int gfx_v7_0_ring_test_ib(struct amdgpu_ring *ring) | |||
2136 | ib.ptr[2] = 0xDEADBEEF; | 2136 | ib.ptr[2] = 0xDEADBEEF; |
2137 | ib.length_dw = 3; | 2137 | ib.length_dw = 3; |
2138 | 2138 | ||
2139 | r = amdgpu_ib_schedule(ring, 1, &ib, AMDGPU_FENCE_OWNER_UNDEFINED, | 2139 | r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f); |
2140 | NULL, &f); | ||
2141 | if (r) | 2140 | if (r) |
2142 | goto err2; | 2141 | goto err2; |
2143 | 2142 | ||
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index aeb35f504999..e0b64de9b5af 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | |||
@@ -706,8 +706,7 @@ static int gfx_v8_0_ring_test_ib(struct amdgpu_ring *ring) | |||
706 | ib.ptr[2] = 0xDEADBEEF; | 706 | ib.ptr[2] = 0xDEADBEEF; |
707 | ib.length_dw = 3; | 707 | ib.length_dw = 3; |
708 | 708 | ||
709 | r = amdgpu_ib_schedule(ring, 1, &ib, AMDGPU_FENCE_OWNER_UNDEFINED, | 709 | r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f); |
710 | NULL, &f); | ||
711 | if (r) | 710 | if (r) |
712 | goto err2; | 711 | goto err2; |
713 | 712 | ||
@@ -1262,8 +1261,7 @@ static int gfx_v8_0_do_edc_gpr_workarounds(struct amdgpu_device *adev) | |||
1262 | ib.ptr[ib.length_dw++] = EVENT_TYPE(7) | EVENT_INDEX(4); | 1261 | ib.ptr[ib.length_dw++] = EVENT_TYPE(7) | EVENT_INDEX(4); |
1263 | 1262 | ||
1264 | /* shedule the ib on the ring */ | 1263 | /* shedule the ib on the ring */ |
1265 | r = amdgpu_ib_schedule(ring, 1, &ib, AMDGPU_FENCE_OWNER_UNDEFINED, | 1264 | r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f); |
1266 | NULL, &f); | ||
1267 | if (r) { | 1265 | if (r) { |
1268 | DRM_ERROR("amdgpu: ib submit failed (%d).\n", r); | 1266 | DRM_ERROR("amdgpu: ib submit failed (%d).\n", r); |
1269 | goto fail; | 1267 | goto fail; |
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c index 134d5d0bb77f..747ef558033a 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | |||
@@ -701,8 +701,7 @@ static int sdma_v2_4_ring_test_ib(struct amdgpu_ring *ring) | |||
701 | ib.ptr[7] = SDMA_PKT_HEADER_OP(SDMA_OP_NOP); | 701 | ib.ptr[7] = SDMA_PKT_HEADER_OP(SDMA_OP_NOP); |
702 | ib.length_dw = 8; | 702 | ib.length_dw = 8; |
703 | 703 | ||
704 | r = amdgpu_ib_schedule(ring, 1, &ib, AMDGPU_FENCE_OWNER_UNDEFINED, | 704 | r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f); |
705 | NULL, &f); | ||
706 | if (r) | 705 | if (r) |
707 | goto err1; | 706 | goto err1; |
708 | 707 | ||
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c index ca12d6faa8c2..11a544fbf197 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | |||
@@ -853,8 +853,7 @@ static int sdma_v3_0_ring_test_ib(struct amdgpu_ring *ring) | |||
853 | ib.ptr[7] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP); | 853 | ib.ptr[7] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP); |
854 | ib.length_dw = 8; | 854 | ib.length_dw = 8; |
855 | 855 | ||
856 | r = amdgpu_ib_schedule(ring, 1, &ib, AMDGPU_FENCE_OWNER_UNDEFINED, | 856 | r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f); |
857 | NULL, &f); | ||
858 | if (r) | 857 | if (r) |
859 | goto err1; | 858 | goto err1; |
860 | 859 | ||