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authorLaurent Navet <laurent.navet@gmail.com>2013-03-20 08:15:56 -0400
committerLinus Walleij <linus.walleij@linaro.org>2013-03-27 11:05:14 -0400
commitf4dcd2d9417c2909362d2b42f038ecf1cdf86834 (patch)
treeca2700eaf38cb531a8c6ca461af3a9e685e16245 /drivers/gpio/gpio-mvebu.c
parent9ccb1a26cedf0a03a59f70f270565f3884ec08f6 (diff)
gpio: gpio-mvebu.c: fix checkpatch errors
Fix : gpio/gpio-mvebu.c:120: ERROR: space required before the open parenthesis '(' gpio/gpio-mvebu.c:136: ERROR: space required before the open parenthesis '(' gpio/gpio-mvebu.c:154: ERROR: space required before the open parenthesis '(' gpio/gpio-mvebu.c:404: ERROR: space required before the open parenthesis '(' gpio/gpio-mvebu.c:476: ERROR: "(foo*)" should be "(foo *)" gpio/gpio-mvebu.c:480: ERROR: "(foo*)" should be "(foo *)" gpio/gpio-mvebu.c:484: ERROR: "(foo*)" should be "(foo *)" gpio/gpio-mvebu.c:512: ERROR: space prohibited after that '!' (ctx:BxW) gpio/gpio-mvebu.c:518: ERROR: space prohibited after that '!' (ctx:BxW) gpio/gpio-mvebu.c:518: ERROR: space required before the open brace '{' gpio/gpio-mvebu.c:563: ERROR: space prohibited after that '!' (ctx:BxW) gpio/gpio-mvebu.c:570: ERROR: trailing whitespace gpio/gpio-mvebu.c:577: ERROR: space required before the open parenthesis '(' gpio/gpio-mvebu.c:635: ERROR: space prohibited after that '!' (ctx:BxW) Signed-off-by: Laurent Navet <laurent.navet@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio/gpio-mvebu.c')
-rw-r--r--drivers/gpio/gpio-mvebu.c26
1 files changed, 13 insertions, 13 deletions
diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
index 7472182967ce..474823e403fa 100644
--- a/drivers/gpio/gpio-mvebu.c
+++ b/drivers/gpio/gpio-mvebu.c
@@ -116,7 +116,7 @@ static inline void __iomem *mvebu_gpioreg_edge_cause(struct mvebu_gpio_chip *mvc
116{ 116{
117 int cpu; 117 int cpu;
118 118
119 switch(mvchip->soc_variant) { 119 switch (mvchip->soc_variant) {
120 case MVEBU_GPIO_SOC_VARIANT_ORION: 120 case MVEBU_GPIO_SOC_VARIANT_ORION:
121 case MVEBU_GPIO_SOC_VARIANT_MV78200: 121 case MVEBU_GPIO_SOC_VARIANT_MV78200:
122 return mvchip->membase + GPIO_EDGE_CAUSE_OFF; 122 return mvchip->membase + GPIO_EDGE_CAUSE_OFF;
@@ -132,7 +132,7 @@ static inline void __iomem *mvebu_gpioreg_edge_mask(struct mvebu_gpio_chip *mvch
132{ 132{
133 int cpu; 133 int cpu;
134 134
135 switch(mvchip->soc_variant) { 135 switch (mvchip->soc_variant) {
136 case MVEBU_GPIO_SOC_VARIANT_ORION: 136 case MVEBU_GPIO_SOC_VARIANT_ORION:
137 return mvchip->membase + GPIO_EDGE_MASK_OFF; 137 return mvchip->membase + GPIO_EDGE_MASK_OFF;
138 case MVEBU_GPIO_SOC_VARIANT_MV78200: 138 case MVEBU_GPIO_SOC_VARIANT_MV78200:
@@ -150,7 +150,7 @@ static void __iomem *mvebu_gpioreg_level_mask(struct mvebu_gpio_chip *mvchip)
150{ 150{
151 int cpu; 151 int cpu;
152 152
153 switch(mvchip->soc_variant) { 153 switch (mvchip->soc_variant) {
154 case MVEBU_GPIO_SOC_VARIANT_ORION: 154 case MVEBU_GPIO_SOC_VARIANT_ORION:
155 return mvchip->membase + GPIO_LEVEL_MASK_OFF; 155 return mvchip->membase + GPIO_LEVEL_MASK_OFF;
156 case MVEBU_GPIO_SOC_VARIANT_MV78200: 156 case MVEBU_GPIO_SOC_VARIANT_MV78200:
@@ -400,7 +400,7 @@ static int mvebu_gpio_irq_set_type(struct irq_data *d, unsigned int type)
400 /* 400 /*
401 * Configure interrupt polarity. 401 * Configure interrupt polarity.
402 */ 402 */
403 switch(type) { 403 switch (type) {
404 case IRQ_TYPE_EDGE_RISING: 404 case IRQ_TYPE_EDGE_RISING:
405 case IRQ_TYPE_LEVEL_HIGH: 405 case IRQ_TYPE_LEVEL_HIGH:
406 u = readl_relaxed(mvebu_gpioreg_in_pol(mvchip)); 406 u = readl_relaxed(mvebu_gpioreg_in_pol(mvchip));
@@ -472,15 +472,15 @@ static void mvebu_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
472static struct of_device_id mvebu_gpio_of_match[] = { 472static struct of_device_id mvebu_gpio_of_match[] = {
473 { 473 {
474 .compatible = "marvell,orion-gpio", 474 .compatible = "marvell,orion-gpio",
475 .data = (void*) MVEBU_GPIO_SOC_VARIANT_ORION, 475 .data = (void *) MVEBU_GPIO_SOC_VARIANT_ORION,
476 }, 476 },
477 { 477 {
478 .compatible = "marvell,mv78200-gpio", 478 .compatible = "marvell,mv78200-gpio",
479 .data = (void*) MVEBU_GPIO_SOC_VARIANT_MV78200, 479 .data = (void *) MVEBU_GPIO_SOC_VARIANT_MV78200,
480 }, 480 },
481 { 481 {
482 .compatible = "marvell,armadaxp-gpio", 482 .compatible = "marvell,armadaxp-gpio",
483 .data = (void*) MVEBU_GPIO_SOC_VARIANT_ARMADAXP, 483 .data = (void *) MVEBU_GPIO_SOC_VARIANT_ARMADAXP,
484 }, 484 },
485 { 485 {
486 /* sentinel */ 486 /* sentinel */
@@ -507,13 +507,13 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
507 soc_variant = MVEBU_GPIO_SOC_VARIANT_ORION; 507 soc_variant = MVEBU_GPIO_SOC_VARIANT_ORION;
508 508
509 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 509 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
510 if (! res) { 510 if (!res) {
511 dev_err(&pdev->dev, "Cannot get memory resource\n"); 511 dev_err(&pdev->dev, "Cannot get memory resource\n");
512 return -ENODEV; 512 return -ENODEV;
513 } 513 }
514 514
515 mvchip = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_gpio_chip), GFP_KERNEL); 515 mvchip = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_gpio_chip), GFP_KERNEL);
516 if (! mvchip){ 516 if (!mvchip) {
517 dev_err(&pdev->dev, "Cannot allocate memory\n"); 517 dev_err(&pdev->dev, "Cannot allocate memory\n");
518 return -ENOMEM; 518 return -ENOMEM;
519 } 519 }
@@ -553,21 +553,21 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
553 * per-CPU registers */ 553 * per-CPU registers */
554 if (soc_variant == MVEBU_GPIO_SOC_VARIANT_ARMADAXP) { 554 if (soc_variant == MVEBU_GPIO_SOC_VARIANT_ARMADAXP) {
555 res = platform_get_resource(pdev, IORESOURCE_MEM, 1); 555 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
556 if (! res) { 556 if (!res) {
557 dev_err(&pdev->dev, "Cannot get memory resource\n"); 557 dev_err(&pdev->dev, "Cannot get memory resource\n");
558 return -ENODEV; 558 return -ENODEV;
559 } 559 }
560 560
561 mvchip->percpu_membase = devm_ioremap_resource(&pdev->dev, 561 mvchip->percpu_membase = devm_ioremap_resource(&pdev->dev,
562 res); 562 res);
563 if (IS_ERR(mvchip->percpu_membase)) 563 if (IS_ERR(mvchip->percpu_membase))
564 return PTR_ERR(mvchip->percpu_membase); 564 return PTR_ERR(mvchip->percpu_membase);
565 } 565 }
566 566
567 /* 567 /*
568 * Mask and clear GPIO interrupts. 568 * Mask and clear GPIO interrupts.
569 */ 569 */
570 switch(soc_variant) { 570 switch (soc_variant) {
571 case MVEBU_GPIO_SOC_VARIANT_ORION: 571 case MVEBU_GPIO_SOC_VARIANT_ORION:
572 writel_relaxed(0, mvchip->membase + GPIO_EDGE_CAUSE_OFF); 572 writel_relaxed(0, mvchip->membase + GPIO_EDGE_CAUSE_OFF);
573 writel_relaxed(0, mvchip->membase + GPIO_EDGE_MASK_OFF); 573 writel_relaxed(0, mvchip->membase + GPIO_EDGE_MASK_OFF);
@@ -625,7 +625,7 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
625 625
626 gc = irq_alloc_generic_chip("mvebu_gpio_irq", 2, mvchip->irqbase, 626 gc = irq_alloc_generic_chip("mvebu_gpio_irq", 2, mvchip->irqbase,
627 mvchip->membase, handle_level_irq); 627 mvchip->membase, handle_level_irq);
628 if (! gc) { 628 if (!gc) {
629 dev_err(&pdev->dev, "Cannot allocate generic irq_chip\n"); 629 dev_err(&pdev->dev, "Cannot allocate generic irq_chip\n");
630 return -ENOMEM; 630 return -ENOMEM;
631 } 631 }