diff options
author | Linus Walleij <linus.walleij@linaro.org> | 2015-12-04 08:02:58 -0500 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2016-01-05 05:21:00 -0500 |
commit | 0f4630f3720e7e6e921bf525c8357fea7ef3dbab (patch) | |
tree | 61c1904593d1ee424464c2d57668ba0fd2fbcbb4 /drivers/gpio/gpio-dwapb.c | |
parent | 3208b0f0c010b26e4d461a3bca59989d03ed9087 (diff) |
gpio: generic: factor into gpio_chip struct
The separate struct bgpio_chip has been a pain to handle, both
by being confusingly similar in name to struct gpio_chip and
for being contained inside a struct so that struct gpio_chip
is contained in a struct contained in a struct, making several
steps of dereferencing necessary.
Make things simpler: include the fields directly into
<linux/gpio/driver.h>, #ifdef:ed for CONFIG_GENERIC_GPIO, and
get rid of the <linux/basic_mmio_gpio.h> altogether. Prefix
some of the member variables with bgpio_* and add proper
kerneldoc while we're at it.
Modify all users to handle the change and use a struct
gpio_chip directly. And while we're at it: replace all
container_of() dereferencing by gpiochip_get_data() and
registering the gpio_chip with gpiochip_add_data().
Cc: arm@kernel.org
Cc: Alexander Shiyan <shc_work@mail.ru>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Nicolas Pitre <nicolas.pitre@linaro.org>
Cc: Olof Johansson <olof@lixom.net>
Cc: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Cc: Rabin Vincent <rabin@rab.in>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-omap@vger.kernel.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: bcm-kernel-feedback-list@broadcom.com
Acked-by: Gregory Fong <gregory.0xf0@gmail.com>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio/gpio-dwapb.c')
-rw-r--r-- | drivers/gpio/gpio-dwapb.c | 92 |
1 files changed, 43 insertions, 49 deletions
diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c index fcd5b0acfc72..597de1ef497b 100644 --- a/drivers/gpio/gpio-dwapb.c +++ b/drivers/gpio/gpio-dwapb.c | |||
@@ -7,7 +7,9 @@ | |||
7 | * | 7 | * |
8 | * All enquiries to support@picochip.com | 8 | * All enquiries to support@picochip.com |
9 | */ | 9 | */ |
10 | #include <linux/basic_mmio_gpio.h> | 10 | #include <linux/gpio/driver.h> |
11 | /* FIXME: for gpio_get_value(), replace this with direct register read */ | ||
12 | #include <linux/gpio.h> | ||
11 | #include <linux/err.h> | 13 | #include <linux/err.h> |
12 | #include <linux/init.h> | 14 | #include <linux/init.h> |
13 | #include <linux/interrupt.h> | 15 | #include <linux/interrupt.h> |
@@ -66,7 +68,7 @@ struct dwapb_context { | |||
66 | #endif | 68 | #endif |
67 | 69 | ||
68 | struct dwapb_gpio_port { | 70 | struct dwapb_gpio_port { |
69 | struct bgpio_chip bgc; | 71 | struct gpio_chip gc; |
70 | bool is_registered; | 72 | bool is_registered; |
71 | struct dwapb_gpio *gpio; | 73 | struct dwapb_gpio *gpio; |
72 | #ifdef CONFIG_PM_SLEEP | 74 | #ifdef CONFIG_PM_SLEEP |
@@ -83,33 +85,26 @@ struct dwapb_gpio { | |||
83 | struct irq_domain *domain; | 85 | struct irq_domain *domain; |
84 | }; | 86 | }; |
85 | 87 | ||
86 | static inline struct dwapb_gpio_port * | ||
87 | to_dwapb_gpio_port(struct bgpio_chip *bgc) | ||
88 | { | ||
89 | return container_of(bgc, struct dwapb_gpio_port, bgc); | ||
90 | } | ||
91 | |||
92 | static inline u32 dwapb_read(struct dwapb_gpio *gpio, unsigned int offset) | 88 | static inline u32 dwapb_read(struct dwapb_gpio *gpio, unsigned int offset) |
93 | { | 89 | { |
94 | struct bgpio_chip *bgc = &gpio->ports[0].bgc; | 90 | struct gpio_chip *gc = &gpio->ports[0].gc; |
95 | void __iomem *reg_base = gpio->regs; | 91 | void __iomem *reg_base = gpio->regs; |
96 | 92 | ||
97 | return bgc->read_reg(reg_base + offset); | 93 | return gc->read_reg(reg_base + offset); |
98 | } | 94 | } |
99 | 95 | ||
100 | static inline void dwapb_write(struct dwapb_gpio *gpio, unsigned int offset, | 96 | static inline void dwapb_write(struct dwapb_gpio *gpio, unsigned int offset, |
101 | u32 val) | 97 | u32 val) |
102 | { | 98 | { |
103 | struct bgpio_chip *bgc = &gpio->ports[0].bgc; | 99 | struct gpio_chip *gc = &gpio->ports[0].gc; |
104 | void __iomem *reg_base = gpio->regs; | 100 | void __iomem *reg_base = gpio->regs; |
105 | 101 | ||
106 | bgc->write_reg(reg_base + offset, val); | 102 | gc->write_reg(reg_base + offset, val); |
107 | } | 103 | } |
108 | 104 | ||
109 | static int dwapb_gpio_to_irq(struct gpio_chip *gc, unsigned offset) | 105 | static int dwapb_gpio_to_irq(struct gpio_chip *gc, unsigned offset) |
110 | { | 106 | { |
111 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | 107 | struct dwapb_gpio_port *port = gpiochip_get_data(gc); |
112 | struct dwapb_gpio_port *port = to_dwapb_gpio_port(bgc); | ||
113 | struct dwapb_gpio *gpio = port->gpio; | 108 | struct dwapb_gpio *gpio = port->gpio; |
114 | 109 | ||
115 | return irq_find_mapping(gpio->domain, offset); | 110 | return irq_find_mapping(gpio->domain, offset); |
@@ -119,7 +114,7 @@ static void dwapb_toggle_trigger(struct dwapb_gpio *gpio, unsigned int offs) | |||
119 | { | 114 | { |
120 | u32 v = dwapb_read(gpio, GPIO_INT_POLARITY); | 115 | u32 v = dwapb_read(gpio, GPIO_INT_POLARITY); |
121 | 116 | ||
122 | if (gpio_get_value(gpio->ports[0].bgc.gc.base + offs)) | 117 | if (gpio_get_value(gpio->ports[0].gc.base + offs)) |
123 | v &= ~BIT(offs); | 118 | v &= ~BIT(offs); |
124 | else | 119 | else |
125 | v |= BIT(offs); | 120 | v |= BIT(offs); |
@@ -162,39 +157,39 @@ static void dwapb_irq_enable(struct irq_data *d) | |||
162 | { | 157 | { |
163 | struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); | 158 | struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); |
164 | struct dwapb_gpio *gpio = igc->private; | 159 | struct dwapb_gpio *gpio = igc->private; |
165 | struct bgpio_chip *bgc = &gpio->ports[0].bgc; | 160 | struct gpio_chip *gc = &gpio->ports[0].gc; |
166 | unsigned long flags; | 161 | unsigned long flags; |
167 | u32 val; | 162 | u32 val; |
168 | 163 | ||
169 | spin_lock_irqsave(&bgc->lock, flags); | 164 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
170 | val = dwapb_read(gpio, GPIO_INTEN); | 165 | val = dwapb_read(gpio, GPIO_INTEN); |
171 | val |= BIT(d->hwirq); | 166 | val |= BIT(d->hwirq); |
172 | dwapb_write(gpio, GPIO_INTEN, val); | 167 | dwapb_write(gpio, GPIO_INTEN, val); |
173 | spin_unlock_irqrestore(&bgc->lock, flags); | 168 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
174 | } | 169 | } |
175 | 170 | ||
176 | static void dwapb_irq_disable(struct irq_data *d) | 171 | static void dwapb_irq_disable(struct irq_data *d) |
177 | { | 172 | { |
178 | struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); | 173 | struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); |
179 | struct dwapb_gpio *gpio = igc->private; | 174 | struct dwapb_gpio *gpio = igc->private; |
180 | struct bgpio_chip *bgc = &gpio->ports[0].bgc; | 175 | struct gpio_chip *gc = &gpio->ports[0].gc; |
181 | unsigned long flags; | 176 | unsigned long flags; |
182 | u32 val; | 177 | u32 val; |
183 | 178 | ||
184 | spin_lock_irqsave(&bgc->lock, flags); | 179 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
185 | val = dwapb_read(gpio, GPIO_INTEN); | 180 | val = dwapb_read(gpio, GPIO_INTEN); |
186 | val &= ~BIT(d->hwirq); | 181 | val &= ~BIT(d->hwirq); |
187 | dwapb_write(gpio, GPIO_INTEN, val); | 182 | dwapb_write(gpio, GPIO_INTEN, val); |
188 | spin_unlock_irqrestore(&bgc->lock, flags); | 183 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
189 | } | 184 | } |
190 | 185 | ||
191 | static int dwapb_irq_reqres(struct irq_data *d) | 186 | static int dwapb_irq_reqres(struct irq_data *d) |
192 | { | 187 | { |
193 | struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); | 188 | struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); |
194 | struct dwapb_gpio *gpio = igc->private; | 189 | struct dwapb_gpio *gpio = igc->private; |
195 | struct bgpio_chip *bgc = &gpio->ports[0].bgc; | 190 | struct gpio_chip *gc = &gpio->ports[0].gc; |
196 | 191 | ||
197 | if (gpiochip_lock_as_irq(&bgc->gc, irqd_to_hwirq(d))) { | 192 | if (gpiochip_lock_as_irq(gc, irqd_to_hwirq(d))) { |
198 | dev_err(gpio->dev, "unable to lock HW IRQ %lu for IRQ\n", | 193 | dev_err(gpio->dev, "unable to lock HW IRQ %lu for IRQ\n", |
199 | irqd_to_hwirq(d)); | 194 | irqd_to_hwirq(d)); |
200 | return -EINVAL; | 195 | return -EINVAL; |
@@ -206,16 +201,16 @@ static void dwapb_irq_relres(struct irq_data *d) | |||
206 | { | 201 | { |
207 | struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); | 202 | struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); |
208 | struct dwapb_gpio *gpio = igc->private; | 203 | struct dwapb_gpio *gpio = igc->private; |
209 | struct bgpio_chip *bgc = &gpio->ports[0].bgc; | 204 | struct gpio_chip *gc = &gpio->ports[0].gc; |
210 | 205 | ||
211 | gpiochip_unlock_as_irq(&bgc->gc, irqd_to_hwirq(d)); | 206 | gpiochip_unlock_as_irq(gc, irqd_to_hwirq(d)); |
212 | } | 207 | } |
213 | 208 | ||
214 | static int dwapb_irq_set_type(struct irq_data *d, u32 type) | 209 | static int dwapb_irq_set_type(struct irq_data *d, u32 type) |
215 | { | 210 | { |
216 | struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); | 211 | struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); |
217 | struct dwapb_gpio *gpio = igc->private; | 212 | struct dwapb_gpio *gpio = igc->private; |
218 | struct bgpio_chip *bgc = &gpio->ports[0].bgc; | 213 | struct gpio_chip *gc = &gpio->ports[0].gc; |
219 | int bit = d->hwirq; | 214 | int bit = d->hwirq; |
220 | unsigned long level, polarity, flags; | 215 | unsigned long level, polarity, flags; |
221 | 216 | ||
@@ -223,7 +218,7 @@ static int dwapb_irq_set_type(struct irq_data *d, u32 type) | |||
223 | IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) | 218 | IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) |
224 | return -EINVAL; | 219 | return -EINVAL; |
225 | 220 | ||
226 | spin_lock_irqsave(&bgc->lock, flags); | 221 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
227 | level = dwapb_read(gpio, GPIO_INTTYPE_LEVEL); | 222 | level = dwapb_read(gpio, GPIO_INTTYPE_LEVEL); |
228 | polarity = dwapb_read(gpio, GPIO_INT_POLARITY); | 223 | polarity = dwapb_read(gpio, GPIO_INT_POLARITY); |
229 | 224 | ||
@@ -254,7 +249,7 @@ static int dwapb_irq_set_type(struct irq_data *d, u32 type) | |||
254 | 249 | ||
255 | dwapb_write(gpio, GPIO_INTTYPE_LEVEL, level); | 250 | dwapb_write(gpio, GPIO_INTTYPE_LEVEL, level); |
256 | dwapb_write(gpio, GPIO_INT_POLARITY, polarity); | 251 | dwapb_write(gpio, GPIO_INT_POLARITY, polarity); |
257 | spin_unlock_irqrestore(&bgc->lock, flags); | 252 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
258 | 253 | ||
259 | return 0; | 254 | return 0; |
260 | } | 255 | } |
@@ -262,13 +257,12 @@ static int dwapb_irq_set_type(struct irq_data *d, u32 type) | |||
262 | static int dwapb_gpio_set_debounce(struct gpio_chip *gc, | 257 | static int dwapb_gpio_set_debounce(struct gpio_chip *gc, |
263 | unsigned offset, unsigned debounce) | 258 | unsigned offset, unsigned debounce) |
264 | { | 259 | { |
265 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | 260 | struct dwapb_gpio_port *port = gpiochip_get_data(gc); |
266 | struct dwapb_gpio_port *port = to_dwapb_gpio_port(bgc); | ||
267 | struct dwapb_gpio *gpio = port->gpio; | 261 | struct dwapb_gpio *gpio = port->gpio; |
268 | unsigned long flags, val_deb; | 262 | unsigned long flags, val_deb; |
269 | unsigned long mask = bgc->pin2mask(bgc, offset); | 263 | unsigned long mask = gc->pin2mask(gc, offset); |
270 | 264 | ||
271 | spin_lock_irqsave(&bgc->lock, flags); | 265 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
272 | 266 | ||
273 | val_deb = dwapb_read(gpio, GPIO_PORTA_DEBOUNCE); | 267 | val_deb = dwapb_read(gpio, GPIO_PORTA_DEBOUNCE); |
274 | if (debounce) | 268 | if (debounce) |
@@ -276,7 +270,7 @@ static int dwapb_gpio_set_debounce(struct gpio_chip *gc, | |||
276 | else | 270 | else |
277 | dwapb_write(gpio, GPIO_PORTA_DEBOUNCE, val_deb & ~mask); | 271 | dwapb_write(gpio, GPIO_PORTA_DEBOUNCE, val_deb & ~mask); |
278 | 272 | ||
279 | spin_unlock_irqrestore(&bgc->lock, flags); | 273 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
280 | 274 | ||
281 | return 0; | 275 | return 0; |
282 | } | 276 | } |
@@ -295,7 +289,7 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio, | |||
295 | struct dwapb_gpio_port *port, | 289 | struct dwapb_gpio_port *port, |
296 | struct dwapb_port_property *pp) | 290 | struct dwapb_port_property *pp) |
297 | { | 291 | { |
298 | struct gpio_chip *gc = &port->bgc.gc; | 292 | struct gpio_chip *gc = &port->gc; |
299 | struct device_node *node = pp->node; | 293 | struct device_node *node = pp->node; |
300 | struct irq_chip_generic *irq_gc = NULL; | 294 | struct irq_chip_generic *irq_gc = NULL; |
301 | unsigned int hwirq, ngpio = gc->ngpio; | 295 | unsigned int hwirq, ngpio = gc->ngpio; |
@@ -369,13 +363,13 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio, | |||
369 | for (hwirq = 0 ; hwirq < ngpio ; hwirq++) | 363 | for (hwirq = 0 ; hwirq < ngpio ; hwirq++) |
370 | irq_create_mapping(gpio->domain, hwirq); | 364 | irq_create_mapping(gpio->domain, hwirq); |
371 | 365 | ||
372 | port->bgc.gc.to_irq = dwapb_gpio_to_irq; | 366 | port->gc.to_irq = dwapb_gpio_to_irq; |
373 | } | 367 | } |
374 | 368 | ||
375 | static void dwapb_irq_teardown(struct dwapb_gpio *gpio) | 369 | static void dwapb_irq_teardown(struct dwapb_gpio *gpio) |
376 | { | 370 | { |
377 | struct dwapb_gpio_port *port = &gpio->ports[0]; | 371 | struct dwapb_gpio_port *port = &gpio->ports[0]; |
378 | struct gpio_chip *gc = &port->bgc.gc; | 372 | struct gpio_chip *gc = &port->gc; |
379 | unsigned int ngpio = gc->ngpio; | 373 | unsigned int ngpio = gc->ngpio; |
380 | irq_hw_number_t hwirq; | 374 | irq_hw_number_t hwirq; |
381 | 375 | ||
@@ -412,7 +406,7 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio, | |||
412 | dirout = gpio->regs + GPIO_SWPORTA_DDR + | 406 | dirout = gpio->regs + GPIO_SWPORTA_DDR + |
413 | (pp->idx * GPIO_SWPORT_DDR_SIZE); | 407 | (pp->idx * GPIO_SWPORT_DDR_SIZE); |
414 | 408 | ||
415 | err = bgpio_init(&port->bgc, gpio->dev, 4, dat, set, NULL, dirout, | 409 | err = bgpio_init(&port->gc, gpio->dev, 4, dat, set, NULL, dirout, |
416 | NULL, false); | 410 | NULL, false); |
417 | if (err) { | 411 | if (err) { |
418 | dev_err(gpio->dev, "failed to init gpio chip for %s\n", | 412 | dev_err(gpio->dev, "failed to init gpio chip for %s\n", |
@@ -421,19 +415,19 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio, | |||
421 | } | 415 | } |
422 | 416 | ||
423 | #ifdef CONFIG_OF_GPIO | 417 | #ifdef CONFIG_OF_GPIO |
424 | port->bgc.gc.of_node = pp->node; | 418 | port->gc.of_node = pp->node; |
425 | #endif | 419 | #endif |
426 | port->bgc.gc.ngpio = pp->ngpio; | 420 | port->gc.ngpio = pp->ngpio; |
427 | port->bgc.gc.base = pp->gpio_base; | 421 | port->gc.base = pp->gpio_base; |
428 | 422 | ||
429 | /* Only port A support debounce */ | 423 | /* Only port A support debounce */ |
430 | if (pp->idx == 0) | 424 | if (pp->idx == 0) |
431 | port->bgc.gc.set_debounce = dwapb_gpio_set_debounce; | 425 | port->gc.set_debounce = dwapb_gpio_set_debounce; |
432 | 426 | ||
433 | if (pp->irq) | 427 | if (pp->irq) |
434 | dwapb_configure_irqs(gpio, port, pp); | 428 | dwapb_configure_irqs(gpio, port, pp); |
435 | 429 | ||
436 | err = gpiochip_add(&port->bgc.gc); | 430 | err = gpiochip_add_data(&port->gc, port); |
437 | if (err) | 431 | if (err) |
438 | dev_err(gpio->dev, "failed to register gpiochip for %s\n", | 432 | dev_err(gpio->dev, "failed to register gpiochip for %s\n", |
439 | pp->name); | 433 | pp->name); |
@@ -449,7 +443,7 @@ static void dwapb_gpio_unregister(struct dwapb_gpio *gpio) | |||
449 | 443 | ||
450 | for (m = 0; m < gpio->nr_ports; ++m) | 444 | for (m = 0; m < gpio->nr_ports; ++m) |
451 | if (gpio->ports[m].is_registered) | 445 | if (gpio->ports[m].is_registered) |
452 | gpiochip_remove(&gpio->ports[m].bgc.gc); | 446 | gpiochip_remove(&gpio->ports[m].gc); |
453 | } | 447 | } |
454 | 448 | ||
455 | static struct dwapb_platform_data * | 449 | static struct dwapb_platform_data * |
@@ -591,11 +585,11 @@ static int dwapb_gpio_suspend(struct device *dev) | |||
591 | { | 585 | { |
592 | struct platform_device *pdev = to_platform_device(dev); | 586 | struct platform_device *pdev = to_platform_device(dev); |
593 | struct dwapb_gpio *gpio = platform_get_drvdata(pdev); | 587 | struct dwapb_gpio *gpio = platform_get_drvdata(pdev); |
594 | struct bgpio_chip *bgc = &gpio->ports[0].bgc; | 588 | struct gpio_chip *gc = &gpio->ports[0].gc; |
595 | unsigned long flags; | 589 | unsigned long flags; |
596 | int i; | 590 | int i; |
597 | 591 | ||
598 | spin_lock_irqsave(&bgc->lock, flags); | 592 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
599 | for (i = 0; i < gpio->nr_ports; i++) { | 593 | for (i = 0; i < gpio->nr_ports; i++) { |
600 | unsigned int offset; | 594 | unsigned int offset; |
601 | unsigned int idx = gpio->ports[i].idx; | 595 | unsigned int idx = gpio->ports[i].idx; |
@@ -624,7 +618,7 @@ static int dwapb_gpio_suspend(struct device *dev) | |||
624 | dwapb_write(gpio, GPIO_INTMASK, 0xffffffff); | 618 | dwapb_write(gpio, GPIO_INTMASK, 0xffffffff); |
625 | } | 619 | } |
626 | } | 620 | } |
627 | spin_unlock_irqrestore(&bgc->lock, flags); | 621 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
628 | 622 | ||
629 | return 0; | 623 | return 0; |
630 | } | 624 | } |
@@ -633,11 +627,11 @@ static int dwapb_gpio_resume(struct device *dev) | |||
633 | { | 627 | { |
634 | struct platform_device *pdev = to_platform_device(dev); | 628 | struct platform_device *pdev = to_platform_device(dev); |
635 | struct dwapb_gpio *gpio = platform_get_drvdata(pdev); | 629 | struct dwapb_gpio *gpio = platform_get_drvdata(pdev); |
636 | struct bgpio_chip *bgc = &gpio->ports[0].bgc; | 630 | struct gpio_chip *gc = &gpio->ports[0].gc; |
637 | unsigned long flags; | 631 | unsigned long flags; |
638 | int i; | 632 | int i; |
639 | 633 | ||
640 | spin_lock_irqsave(&bgc->lock, flags); | 634 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
641 | for (i = 0; i < gpio->nr_ports; i++) { | 635 | for (i = 0; i < gpio->nr_ports; i++) { |
642 | unsigned int offset; | 636 | unsigned int offset; |
643 | unsigned int idx = gpio->ports[i].idx; | 637 | unsigned int idx = gpio->ports[i].idx; |
@@ -666,7 +660,7 @@ static int dwapb_gpio_resume(struct device *dev) | |||
666 | dwapb_write(gpio, GPIO_PORTA_EOI, 0xffffffff); | 660 | dwapb_write(gpio, GPIO_PORTA_EOI, 0xffffffff); |
667 | } | 661 | } |
668 | } | 662 | } |
669 | spin_unlock_irqrestore(&bgc->lock, flags); | 663 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
670 | 664 | ||
671 | return 0; | 665 | return 0; |
672 | } | 666 | } |