Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus

Pull MIPS updates from Ralf Baechle:
 "This is the main pull request for 4.3 for MIPS.  Here's the summary:

  Three fixes that didn't make 4.2-stable:

   - a -Os build might compile the kernel using the MIPS16 instruction
     set but the R2 optimized inline functions in <uapi/asm/swab.h> are
     implemented using 32-bit wide instructions which is invalid.

   - a build error in pgtable-bits.h for a particular kernel
     configuration.

   - accessing registers of the CM GCR might have been compiled to use
     64 bit accesses but these registers are onl 32 bit wide.

  And also a few new bits:

   - move the ATH79 GPIO driver to drivers/gpio

   - the definition of IRQCHIP_DECLARE has moved to linux/irqchip.h,
     change ATH79 accordingly.

   - fix definition of pgprot_writecombine

   - add an implementation of dma_map_ops.mmap

   - fix alignment of quiet build output for vmlinuz link

   - BCM47xx: Use kmemdup rather than duplicating its implementation

   - Netlogic: Fix 0x0x prefixes of constants.

   - merge Bjorn Helgaas' series to remove most of the weak keywords
     from function declarations.

   - CP0 and CP1 registers are best considered treated as unsigned
     values to avoid large values from becoming negative values.

   - improve support for the MIPS GIC timer.

   - enable common clock framework for Malta and SEAD3.

   - a number of improvments and fixes to dump_tlb().

   - document the MIPS TLB dump functionality in Magic SysRq.

   - Cavium Octeon CN68XX improvments.

   - NetLogic improvments.

   - irq: Use access helper irq_data_get_affinity_mask.

   - handle MSA unaligned accesses.

   - a number of R6-related math-emu fixes.

   - support for I6400.

   - improvments to MSA support.

   - add uprobes support.

   - move from deprecated __initcall to arch_initcall.

   - remove finish_arch_switch().

   - IRQ cleanups by Thomas Gleixner.

   - migrate to new 'set-state' interface.

   - random small cleanups"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (148 commits)
  MIPS: UAPI: Fix unrecognized opcode WSBH/DSBH/DSHD when using MIPS16.
  MIPS: Fix alignment of quiet build output for vmlinuz link
  MIPS: math-emu: Remove unused handle_dsemul function declaration
  MIPS: math-emu: Add support for the MIPS R6 MAX{, A} FPU instruction
  MIPS: math-emu: Add support for the MIPS R6 MIN{, A} FPU instruction
  MIPS: math-emu: Add support for the MIPS R6 CLASS FPU instruction
  MIPS: math-emu: Add support for the MIPS R6 RINT FPU instruction
  MIPS: math-emu: Add support for the MIPS R6 MSUBF FPU instruction
  MIPS: math-emu: Add support for the MIPS R6 MADDF FPU instruction
  MIPS: math-emu: Add support for the MIPS R6 SELNEZ FPU instruction
  MIPS: math-emu: Add support for the MIPS R6 SELEQZ FPU instruction
  MIPS: math-emu: Add support for the CMP.condn.fmt R6 instruction
  MIPS: inst.h: Add new MIPS R6 FPU opcodes
  MIPS: Octeon: Fix management port MII address on Kontron S1901
  MIPS: BCM47xx: Use kmemdup rather than duplicating its implementation
  STAGING: Octeon: Use common helpers for determining interface and port
  MIPS: Octeon: Support interfaces 4 and 5
  MIPS: Octeon: Set up 1:1 mapping between CN68XX PKO queues and ports
  MIPS: Octeon: Initialize CN68XX PKO
  STAGING: Octeon: Support CN68XX style WQE
  ...

4 files changed, 278 insertions, 9 deletions

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index c03f04d82c6a..552c9b134cc5 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -111,6 +111,10 @@ config CLKSRC_LPC32XX
         select CLKSRC_MMIO
         select CLKSRC_OF
 
+config CLKSRC_PISTACHIO
+        bool
+        select CLKSRC_OF
+
 config CLKSRC_STM32
         bool "Clocksource for STM32 SoCs" if !ARCH_STM32
         depends on OF && ARM && (ARCH_STM32 || COMPILE_TEST)
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index f228354961ca..066337e24737 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -44,6 +44,7 @@ obj-$(CONFIG_FSL_FTM_TIMER)	+= fsl_ftm_timer.o
 obj-$(CONFIG_VF_PIT_TIMER)      += vf_pit_timer.o
 obj-$(CONFIG_CLKSRC_QCOM)       += qcom-timer.o
 obj-$(CONFIG_MTK_TIMER)         += mtk_timer.o
+obj-$(CONFIG_CLKSRC_PISTACHIO)  += time-pistachio.o
 
 obj-$(CONFIG_ARM_ARCH_TIMER)            += arm_arch_timer.o
 obj-$(CONFIG_ARM_GLOBAL_TIMER)          += arm_global_timer.o
diff --git a/drivers/clocksource/mips-gic-timer.c b/drivers/clocksource/mips-gic-timer.c
index c3810b61c815..02a1945e5093 100644
--- a/drivers/clocksource/mips-gic-timer.c
+++ b/drivers/clocksource/mips-gic-timer.c
@@ -72,6 +72,13 @@ static void gic_clockevent_cpu_exit(struct clock_event_device *cd)
         disable_percpu_irq(gic_timer_irq);
 }
 
+static void gic_update_frequency(void *data)
+{
+        unsigned long rate = (unsigned long)data;
+
+        clockevents_update_freq(this_cpu_ptr(&gic_clockevent_device), rate);
+}
+
 static int gic_cpu_notifier(struct notifier_block *nb, unsigned long action,
                                 void *data)
 {
@@ -87,18 +94,40 @@ static int gic_cpu_notifier(struct notifier_block *nb, unsigned long action,
         return NOTIFY_OK;
 }
 
+static int gic_clk_notifier(struct notifier_block *nb, unsigned long action,
+                            void *data)
+{
+        struct clk_notifier_data *cnd = data;
+
+        if (action == POST_RATE_CHANGE)
+                on_each_cpu(gic_update_frequency, (void *)cnd->new_rate, 1);
+
+        return NOTIFY_OK;
+}
+
+
 static struct notifier_block gic_cpu_nb = {
         .notifier_call = gic_cpu_notifier,
 };
 
+static struct notifier_block gic_clk_nb = {
+        .notifier_call = gic_clk_notifier,
+};
+
 static int gic_clockevent_init(void)
 {
+        int ret;
+
         if (!cpu_has_counter || !gic_frequency)
                 return -ENXIO;
 
-        setup_percpu_irq(gic_timer_irq, &gic_compare_irqaction);
+        ret = setup_percpu_irq(gic_timer_irq, &gic_compare_irqaction);
+        if (ret < 0)
+                return ret;
 
-        register_cpu_notifier(&gic_cpu_nb);
+        ret = register_cpu_notifier(&gic_cpu_nb);
+        if (ret < 0)
+                pr_warn("GIC: Unable to register CPU notifier\n");
 
         gic_clockevent_cpu_init(this_cpu_ptr(&gic_clockevent_device));
 
@@ -118,18 +147,17 @@ static struct clocksource gic_clocksource = {
 
 static void __init __gic_clocksource_init(void)
 {
+        int ret;
+
         /* Set clocksource mask. */
         gic_clocksource.mask = CLOCKSOURCE_MASK(gic_get_count_width());
 
         /* Calculate a somewhat reasonable rating value. */
         gic_clocksource.rating = 200 + gic_frequency / 10000000;
 
-        clocksource_register_hz(&gic_clocksource, gic_frequency);
-
-        gic_clockevent_init();
-
-        /* And finally start the counter */
-        gic_start_count();
+        ret = clocksource_register_hz(&gic_clocksource, gic_frequency);
+        if (ret < 0)
+                pr_warn("GIC: Unable to register clocksource\n");
 }
 
 void __init gic_clocksource_init(unsigned int frequency)
@@ -139,11 +167,16 @@ void __init gic_clocksource_init(unsigned int frequency)
                 GIC_LOCAL_TO_HWIRQ(GIC_LOCAL_INT_COMPARE);
 
         __gic_clocksource_init();
+        gic_clockevent_init();
+
+        /* And finally start the counter */
+        gic_start_count();
 }
 
 static void __init gic_clocksource_of_init(struct device_node *node)
 {
         struct clk *clk;
+        int ret;
 
         if (WARN_ON(!gic_present || !node->parent ||
                     !of_device_is_compatible(node->parent, "mti,gic")))
@@ -151,8 +184,13 @@ static void __init gic_clocksource_of_init(struct device_node *node)
 
         clk = of_clk_get(node, 0);
         if (!IS_ERR(clk)) {
+                if (clk_prepare_enable(clk) < 0) {
+                        pr_err("GIC failed to enable clock\n");
+                        clk_put(clk);
+                        return;
+                }
+
                 gic_frequency = clk_get_rate(clk);
-                clk_put(clk);
         } else if (of_property_read_u32(node, "clock-frequency",
                                         &gic_frequency)) {
                 pr_err("GIC frequency not specified.\n");
@@ -165,6 +203,15 @@ static void __init gic_clocksource_of_init(struct device_node *node)
         }
 
         __gic_clocksource_init();
+
+        ret = gic_clockevent_init();
+        if (!ret && !IS_ERR(clk)) {
+                if (clk_notifier_register(clk, &gic_clk_nb) < 0)
+                        pr_warn("GIC: Unable to register clock notifier\n");
+        }
+
+        /* And finally start the counter */
+        gic_start_count();
 }
 CLOCKSOURCE_OF_DECLARE(mips_gic_timer, "mti,gic-timer",
                        gic_clocksource_of_init);
diff --git a/drivers/clocksource/time-pistachio.c b/drivers/clocksource/time-pistachio.c
new file mode 100644
index 000000000000..18d4266c2986
--- /dev/null
+++ b/