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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2016-10-08 00:23:40 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2016-10-08 00:23:40 -0400 |
| commit | 6afd563d4bbc1924b7de9e053324c007e0d36476 (patch) | |
| tree | 619c2270f6f09ce8c9eb7f6aa448f07f67ffa8e8 /drivers/clocksource | |
| parent | b4f33f6ddd0c218e12454e1379de3aaa73f2e8dc (diff) | |
| parent | d6db68b2deaa0158d25b236edffcf6dd2117208f (diff) | |
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"Driver updates for ARM SoCs, including a couple of newly added
drivers:
- The Qualcomm external bus interface 2 (EBI2), used in some of their
mobile phone chips for connecting flash memory, LCD displays or
other peripherals
- Secure monitor firmware for Amlogic SoCs, and an NVMEM driver for
the EFUSE based on that firmware interface.
- Perf support for the AppliedMicro X-Gene performance monitor unit
- Reset driver for STMicroelectronics STM32
- Reset driver for SocioNext UniPhier SoCs
Aside from these, there are minor updates to SoC-specific bus,
clocksource, firmware, pinctrl, reset, rtc and pmic drivers"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (50 commits)
bus: qcom-ebi2: depend on HAS_IOMEM
pinctrl: mvebu: orion5x: Generalise mv88f5181l support for 88f5181
clk: mvebu: Add clk support for the orion5x SoC mv88f5181
dt-bindings: EXYNOS: Add Exynos5433 PMU compatible
clocksource: exynos_mct: Add the support for ARM64
perf: xgene: Add APM X-Gene SoC Performance Monitoring Unit driver
Documentation: Add documentation for APM X-Gene SoC PMU DTS binding
MAINTAINERS: Add entry for APM X-Gene SoC PMU driver
bus: qcom: add EBI2 driver
bus: qcom: add EBI2 device tree bindings
rtc: rtc-pm8xxx: Add support for pm8018 rtc
nvmem: amlogic: Add Amlogic Meson EFUSE driver
firmware: Amlogic: Add secure monitor driver
soc: qcom: smd: Reset rx tail rather than tx
memory: atmel-sdramc: fix a possible NULL dereference
reset: hi6220: allow to compile test driver on other architectures
reset: zynq: add driver Kconfig option
reset: sunxi: add driver Kconfig option
reset: stm32: add driver Kconfig option
reset: socfpga: add driver Kconfig option
...
Diffstat (limited to 'drivers/clocksource')
| -rw-r--r-- | drivers/clocksource/Kconfig | 2 | ||||
| -rw-r--r-- | drivers/clocksource/exynos_mct.c | 4 |
2 files changed, 5 insertions, 1 deletions
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 8a753fd5b79d..245190839359 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig | |||
| @@ -361,7 +361,7 @@ config CLKSRC_METAG_GENERIC | |||
| 361 | 361 | ||
| 362 | config CLKSRC_EXYNOS_MCT | 362 | config CLKSRC_EXYNOS_MCT |
| 363 | bool "Exynos multi core timer driver" if COMPILE_TEST | 363 | bool "Exynos multi core timer driver" if COMPILE_TEST |
| 364 | depends on ARM | 364 | depends on ARM || ARM64 |
| 365 | help | 365 | help |
| 366 | Support for Multi Core Timer controller on Exynos SoCs. | 366 | Support for Multi Core Timer controller on Exynos SoCs. |
| 367 | 367 | ||
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index 41840d02c331..8f3488b80896 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c | |||
| @@ -223,6 +223,7 @@ static u64 notrace exynos4_read_sched_clock(void) | |||
| 223 | return exynos4_read_count_32(); | 223 | return exynos4_read_count_32(); |
| 224 | } | 224 | } |
| 225 | 225 | ||
| 226 | #if defined(CONFIG_ARM) | ||
| 226 | static struct delay_timer exynos4_delay_timer; | 227 | static struct delay_timer exynos4_delay_timer; |
| 227 | 228 | ||
| 228 | static cycles_t exynos4_read_current_timer(void) | 229 | static cycles_t exynos4_read_current_timer(void) |
| @@ -231,14 +232,17 @@ static cycles_t exynos4_read_current_timer(void) | |||
| 231 | "cycles_t needs to move to 32-bit for ARM64 usage"); | 232 | "cycles_t needs to move to 32-bit for ARM64 usage"); |
| 232 | return exynos4_read_count_32(); | 233 | return exynos4_read_count_32(); |
| 233 | } | 234 | } |
| 235 | #endif | ||
| 234 | 236 | ||
| 235 | static int __init exynos4_clocksource_init(void) | 237 | static int __init exynos4_clocksource_init(void) |
| 236 | { | 238 | { |
| 237 | exynos4_mct_frc_start(); | 239 | exynos4_mct_frc_start(); |
| 238 | 240 | ||
| 241 | #if defined(CONFIG_ARM) | ||
| 239 | exynos4_delay_timer.read_current_timer = &exynos4_read_current_timer; | 242 | exynos4_delay_timer.read_current_timer = &exynos4_read_current_timer; |
| 240 | exynos4_delay_timer.freq = clk_rate; | 243 | exynos4_delay_timer.freq = clk_rate; |
| 241 | register_current_timer_delay(&exynos4_delay_timer); | 244 | register_current_timer_delay(&exynos4_delay_timer); |
| 245 | #endif | ||
| 242 | 246 | ||
| 243 | if (clocksource_register_hz(&mct_frc, clk_rate)) | 247 | if (clocksource_register_hz(&mct_frc, clk_rate)) |
| 244 | panic("%s: can't register clocksource\n", mct_frc.name); | 248 | panic("%s: can't register clocksource\n", mct_frc.name); |
