aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/clocksource/h8300_tpu.c
diff options
context:
space:
mode:
authorYoshinori Sato <ysato@users.sourceforge.jp>2015-11-06 11:31:44 -0500
committerDaniel Lezcano <daniel.lezcano@linaro.org>2015-12-15 03:42:02 -0500
commit4633f4cac85ad19f586fdd4f832ebd145190a68c (patch)
tree07b57732b20c61f6cc32e3fd3d2541297c4cf401 /drivers/clocksource/h8300_tpu.c
parent9115df89d12c2cf6db080a7ee57cd076f8416e4a (diff)
clocksource/drivers/h8300: Cleanup startup and remove module code.
Remove some legacy code and replace it by the clksrc-of code. Do some cleanup and code consolidation. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'drivers/clocksource/h8300_tpu.c')
-rw-r--r--drivers/clocksource/h8300_tpu.c117
1 files changed, 39 insertions, 78 deletions
diff --git a/drivers/clocksource/h8300_tpu.c b/drivers/clocksource/h8300_tpu.c
index 5487410bfabb..ed0b49344577 100644
--- a/drivers/clocksource/h8300_tpu.c
+++ b/drivers/clocksource/h8300_tpu.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * H8/300 TPU Driver 2 * H8S TPU Driver
3 * 3 *
4 * Copyright 2015 Yoshinori Sato <ysato@users.sourcefoge.jp> 4 * Copyright 2015 Yoshinori Sato <ysato@users.sourcefoge.jp>
5 * 5 *
@@ -17,8 +17,8 @@
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/of.h> 19#include <linux/of.h>
20 20#include <linux/of_address.h>
21#include <asm/irq.h> 21#include <linux/of_irq.h>
22 22
23#define TCR 0 23#define TCR 0
24#define TMDR 1 24#define TMDR 1
@@ -32,9 +32,7 @@
32#define TGRD 14 32#define TGRD 14
33 33
34struct tpu_priv { 34struct tpu_priv {
35 struct platform_device *pdev;
36 struct clocksource cs; 35 struct clocksource cs;
37 struct clk *clk;
38 unsigned long mapbase1; 36 unsigned long mapbase1;
39 unsigned long mapbase2; 37 unsigned long mapbase2;
40 raw_spinlock_t lock; 38 raw_spinlock_t lock;
@@ -116,91 +114,54 @@ static void tpu_clocksource_disable(struct clocksource *cs)
116 p->cs_enabled = false; 114 p->cs_enabled = false;
117} 115}
118 116
117static struct tpu_priv tpu_priv = {
118 .cs = {
119 .name = "H8S_TPU",
120 .rating = 200,
121 .read = tpu_clocksource_read,
122 .enable = tpu_clocksource_enable,
123 .disable = tpu_clocksource_disable,
124 .mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8),
125 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
126 },
127};
128
119#define CH_L 0 129#define CH_L 0
120#define CH_H 1 130#define CH_H 1
121 131
122static int __init tpu_setup(struct tpu_priv *p, struct platform_device *pdev) 132static void __init h8300_tpu_init(struct device_node *node)
123{ 133{
124 struct resource *res[2]; 134 void __iomem *base[2];
125 135 struct clk *clk;
126 p->pdev = pdev;
127 136
128 res[CH_L] = platform_get_resource(p->pdev, IORESOURCE_MEM, CH_L); 137 clk = of_clk_get(node, 0);
129 res[CH_H] = platform_get_resource(p->pdev, IORESOURCE_MEM, CH_H); 138 if (IS_ERR(clk)) {
130 if (!res[CH_L] || !res[CH_H]) { 139 pr_err("failed to get clock for clocksource\n");
131 dev_err(&p->pdev->dev, "failed to get I/O memory\n"); 140 return;
132 return -ENXIO;
133 } 141 }
134 142
135 p->clk = clk_get(&p->pdev->dev, "fck"); 143 base[CH_L] = of_iomap(node, CH_L);
136 if (IS_ERR(p->clk)) { 144 if (!base[CH_L]) {
137 dev_err(&p->pdev->dev, "can't get clk\n"); 145 pr_err("failed to map registers for clocksource\n");
138 return PTR_ERR(p->clk); 146 goto free_clk;
139 } 147 }
140 148 base[CH_H] = of_iomap(node, CH_H);
141 p->mapbase1 = res[CH_L]->start; 149 if (!base[CH_H]) {
142 p->mapbase2 = res[CH_H]->start; 150 pr_err("failed to map registers for clocksource\n");
143 151 goto unmap_L;
144 p->cs.name = pdev->name;
145 p->cs.rating = 200;
146 p->cs.read = tpu_clocksource_read;
147 p->cs.enable = tpu_clocksource_enable;
148 p->cs.disable = tpu_clocksource_disable;
149 p->cs.mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8);
150 p->cs.flags = CLOCK_SOURCE_IS_CONTINUOUS;
151 clocksource_register_hz(&p->cs, clk_get_rate(p->clk) / 64);
152 platform_set_drvdata(pdev, p);
153
154 return 0;
155}
156
157static int tpu_probe(struct platform_device *pdev)
158{
159 struct tpu_priv *p = platform_get_drvdata(pdev);
160
161 if (p) {
162 dev_info(&pdev->dev, "kept as earlytimer\n");
163 return 0;
164 } 152 }
165 153
166 p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL); 154 tpu_priv.mapbase1 = (unsigned long)base[CH_L];
167 if (!p) 155 tpu_priv.mapbase2 = (unsigned long)base[CH_H];
168 return -ENOMEM;
169 156
170 return tpu_setup(p, pdev); 157 clocksource_register_hz(&tpu_priv.cs, clk_get_rate(clk) / 64);
171}
172 158
173static int tpu_remove(struct platform_device *pdev) 159 return;
174{
175 return -EBUSY;
176}
177 160
178static const struct of_device_id tpu_of_table[] = { 161unmap_L:
179 { .compatible = "renesas,tpu" }, 162 iounmap(base[CH_H]);
180 { } 163free_clk:
181}; 164 clk_put(clk);
182
183static struct platform_driver tpu_driver = {
184 .probe = tpu_probe,
185 .remove = tpu_remove,
186 .driver = {
187 .name = "h8s-tpu",
188 .of_match_table = of_match_ptr(tpu_of_table),
189 }
190};
191
192static int __init tpu_init(void)
193{
194 return platform_driver_register(&tpu_driver);
195}
196
197static void __exit tpu_exit(void)
198{
199 platform_driver_unregister(&tpu_driver);
200} 165}
201 166
202subsys_initcall(tpu_init); 167CLOCKSOURCE_OF_DECLARE(h8300_tpu, "renesas,tpu", h8300_tpu_init);
203module_exit(tpu_exit);
204MODULE_AUTHOR("Yoshinori Sato");
205MODULE_DESCRIPTION("H8S Timer Pulse Unit Driver");
206MODULE_LICENSE("GPL v2");