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authorSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>2014-01-25 13:19:09 -0500
committerJason Cooper <jason@lakedaemon.net>2014-02-06 13:06:52 -0500
commit8f7fc5450b64210b08cb3daabb3473dbad197e54 (patch)
tree4a8aea7d6efa633e41c4392fdf01844002c610b9 /drivers/clk/mvebu
parent0a11a6ae94373f37e738f7dc8f51d60a78d78a58 (diff)
clk: mvebu: dove: maintain clock init order
Init order of CLK_OF_DECLARE'd drivers depends on compile order. Unfortunately, clk_of_init does not allow drivers to return errors, e.g. -EPROBE_DEFER if parent clocks have not been registered, yet. To avoid init order woes for MVEBU clock drivers, we take care of proper init order ourselves. This patch joins core-clk and gating-clk init to maintain proper init order. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'drivers/clk/mvebu')
-rw-r--r--drivers/clk/mvebu/dove.c19
1 files changed, 9 insertions, 10 deletions
diff --git a/drivers/clk/mvebu/dove.c b/drivers/clk/mvebu/dove.c
index 38aee1e3f242..b8c2424ac926 100644
--- a/drivers/clk/mvebu/dove.c
+++ b/drivers/clk/mvebu/dove.c
@@ -154,12 +154,6 @@ static const struct coreclk_soc_desc dove_coreclks = {
154 .num_ratios = ARRAY_SIZE(dove_coreclk_ratios), 154 .num_ratios = ARRAY_SIZE(dove_coreclk_ratios),
155}; 155};
156 156
157static void __init dove_coreclk_init(struct device_node *np)
158{
159 mvebu_coreclk_setup(np, &dove_coreclks);
160}
161CLK_OF_DECLARE(dove_core_clk, "marvell,dove-core-clock", dove_coreclk_init);
162
163/* 157/*
164 * Clock Gating Control 158 * Clock Gating Control
165 */ 159 */
@@ -186,9 +180,14 @@ static const struct clk_gating_soc_desc dove_gating_desc[] __initconst = {
186 { } 180 { }
187}; 181};
188 182
189static void __init dove_clk_gating_init(struct device_node *np) 183static void __init dove_clk_init(struct device_node *np)
190{ 184{
191 mvebu_clk_gating_setup(np, dove_gating_desc); 185 struct device_node *cgnp =
186 of_find_compatible_node(NULL, NULL, "marvell,dove-gating-clock");
187
188 mvebu_coreclk_setup(np, &dove_coreclks);
189
190 if (cgnp)
191 mvebu_clk_gating_setup(cgnp, dove_gating_desc);
192} 192}
193CLK_OF_DECLARE(dove_clk_gating, "marvell,dove-gating-clock", 193CLK_OF_DECLARE(dove_clk, "marvell,dove-core-clock", dove_clk_init);
194 dove_clk_gating_init);