diff options
author | Viresh Kumar <viresh.kumar@linaro.org> | 2015-09-26 18:04:07 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-10-04 06:36:07 -0400 |
commit | 621a5f7ad9cd1ce7933f1d302067cbd58354173c (patch) | |
tree | a9cd51d4b4e70286a339ffc463618d0f33279c67 /drivers/base | |
parent | 6e58f752a6502b43e039fd7df2c7c5cde8dde437 (diff) |
debugfs: Pass bool pointer to debugfs_create_bool()
Its a bit odd that debugfs_create_bool() takes 'u32 *' as an argument,
when all it needs is a boolean pointer.
It would be better to update this API to make it accept 'bool *'
instead, as that will make it more consistent and often more convenient.
Over that bool takes just a byte.
That required updates to all user sites as well, in the same commit
updating the API. regmap core was also using
debugfs_{read|write}_file_bool(), directly and variable types were
updated for that to be bool as well.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/base')
-rw-r--r-- | drivers/base/regmap/internal.h | 6 | ||||
-rw-r--r-- | drivers/base/regmap/regcache-lzo.c | 4 | ||||
-rw-r--r-- | drivers/base/regmap/regcache.c | 24 |
3 files changed, 17 insertions, 17 deletions
diff --git a/drivers/base/regmap/internal.h b/drivers/base/regmap/internal.h index cc557886ab23..5b907f2c62b9 100644 --- a/drivers/base/regmap/internal.h +++ b/drivers/base/regmap/internal.h | |||
@@ -122,9 +122,9 @@ struct regmap { | |||
122 | unsigned int num_reg_defaults_raw; | 122 | unsigned int num_reg_defaults_raw; |
123 | 123 | ||
124 | /* if set, only the cache is modified not the HW */ | 124 | /* if set, only the cache is modified not the HW */ |
125 | u32 cache_only; | 125 | bool cache_only; |
126 | /* if set, only the HW is modified not the cache */ | 126 | /* if set, only the HW is modified not the cache */ |
127 | u32 cache_bypass; | 127 | bool cache_bypass; |
128 | /* if set, remember to free reg_defaults_raw */ | 128 | /* if set, remember to free reg_defaults_raw */ |
129 | bool cache_free; | 129 | bool cache_free; |
130 | 130 | ||
@@ -132,7 +132,7 @@ struct regmap { | |||
132 | const void *reg_defaults_raw; | 132 | const void *reg_defaults_raw; |
133 | void *cache; | 133 | void *cache; |
134 | /* if set, the cache contains newer data than the HW */ | 134 | /* if set, the cache contains newer data than the HW */ |
135 | u32 cache_dirty; | 135 | bool cache_dirty; |
136 | /* if set, the HW registers are known to match map->reg_defaults */ | 136 | /* if set, the HW registers are known to match map->reg_defaults */ |
137 | bool no_sync_defaults; | 137 | bool no_sync_defaults; |
138 | 138 | ||
diff --git a/drivers/base/regmap/regcache-lzo.c b/drivers/base/regmap/regcache-lzo.c index 2d53f6f138e1..736e0d378567 100644 --- a/drivers/base/regmap/regcache-lzo.c +++ b/drivers/base/regmap/regcache-lzo.c | |||
@@ -355,9 +355,9 @@ static int regcache_lzo_sync(struct regmap *map, unsigned int min, | |||
355 | if (ret > 0 && val == map->reg_defaults[ret].def) | 355 | if (ret > 0 && val == map->reg_defaults[ret].def) |
356 | continue; | 356 | continue; |
357 | 357 | ||
358 | map->cache_bypass = 1; | 358 | map->cache_bypass = true; |
359 | ret = _regmap_write(map, i, val); | 359 | ret = _regmap_write(map, i, val); |
360 | map->cache_bypass = 0; | 360 | map->cache_bypass = false; |
361 | if (ret) | 361 | if (ret) |
362 | return ret; | 362 | return ret; |
363 | dev_dbg(map->dev, "Synced register %#x, value %#x\n", | 363 | dev_dbg(map->dev, "Synced register %#x, value %#x\n", |
diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c index 6f8a13ec32a4..4c07802986b2 100644 --- a/drivers/base/regmap/regcache.c +++ b/drivers/base/regmap/regcache.c | |||
@@ -54,11 +54,11 @@ static int regcache_hw_init(struct regmap *map) | |||
54 | return -ENOMEM; | 54 | return -ENOMEM; |
55 | 55 | ||
56 | if (!map->reg_defaults_raw) { | 56 | if (!map->reg_defaults_raw) { |
57 | u32 cache_bypass = map->cache_bypass; | 57 | bool cache_bypass = map->cache_bypass; |
58 | dev_warn(map->dev, "No cache defaults, reading back from HW\n"); | 58 | dev_warn(map->dev, "No cache defaults, reading back from HW\n"); |
59 | 59 | ||
60 | /* Bypass the cache access till data read from HW*/ | 60 | /* Bypass the cache access till data read from HW*/ |
61 | map->cache_bypass = 1; | 61 | map->cache_bypass = true; |
62 | tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL); | 62 | tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL); |
63 | if (!tmp_buf) { | 63 | if (!tmp_buf) { |
64 | ret = -ENOMEM; | 64 | ret = -ENOMEM; |
@@ -285,9 +285,9 @@ static int regcache_default_sync(struct regmap *map, unsigned int min, | |||
285 | if (!regcache_reg_needs_sync(map, reg, val)) | 285 | if (!regcache_reg_needs_sync(map, reg, val)) |
286 | continue; | 286 | continue; |
287 | 287 | ||
288 | map->cache_bypass = 1; | 288 | map->cache_bypass = true; |
289 | ret = _regmap_write(map, reg, val); | 289 | ret = _regmap_write(map, reg, val); |
290 | map->cache_bypass = 0; | 290 | map->cache_bypass = false; |
291 | if (ret) { | 291 | if (ret) { |
292 | dev_err(map->dev, "Unable to sync register %#x. %d\n", | 292 | dev_err(map->dev, "Unable to sync register %#x. %d\n", |
293 | reg, ret); | 293 | reg, ret); |
@@ -315,7 +315,7 @@ int regcache_sync(struct regmap *map) | |||
315 | int ret = 0; | 315 | int ret = 0; |
316 | unsigned int i; | 316 | unsigned int i; |
317 | const char *name; | 317 | const char *name; |
318 | unsigned int bypass; | 318 | bool bypass; |
319 | 319 | ||
320 | BUG_ON(!map->cache_ops); | 320 | BUG_ON(!map->cache_ops); |
321 | 321 | ||
@@ -333,7 +333,7 @@ int regcache_sync(struct regmap *map) | |||
333 | map->async = true; | 333 | map->async = true; |
334 | 334 | ||
335 | /* Apply any patch first */ | 335 | /* Apply any patch first */ |
336 | map->cache_bypass = 1; | 336 | map->cache_bypass = true; |
337 | for (i = 0; i < map->patch_regs; i++) { | 337 | for (i = 0; i < map->patch_regs; i++) { |
338 | ret = _regmap_write(map, map->patch[i].reg, map->patch[i].def); | 338 | ret = _regmap_write(map, map->patch[i].reg, map->patch[i].def); |
339 | if (ret != 0) { | 339 | if (ret != 0) { |
@@ -342,7 +342,7 @@ int regcache_sync(struct regmap *map) | |||
342 | goto out; | 342 | goto out; |
343 | } | 343 | } |
344 | } | 344 | } |
345 | map->cache_bypass = 0; | 345 | map->cache_bypass = false; |
346 | 346 | ||
347 | if (map->cache_ops->sync) | 347 | if (map->cache_ops->sync) |
348 | ret = map->cache_ops->sync(map, 0, map->max_register); | 348 | ret = map->cache_ops->sync(map, 0, map->max_register); |
@@ -384,7 +384,7 @@ int regcache_sync_region(struct regmap *map, unsigned int min, | |||
384 | { | 384 | { |
385 | int ret = 0; | 385 | int ret = 0; |
386 | const char *name; | 386 | const char *name; |
387 | unsigned int bypass; | 387 | bool bypass; |
388 | 388 | ||
389 | BUG_ON(!map->cache_ops); | 389 | BUG_ON(!map->cache_ops); |
390 | 390 | ||
@@ -637,11 +637,11 @@ static int regcache_sync_block_single(struct regmap *map, void *block, | |||
637 | if (!regcache_reg_needs_sync(map, regtmp, val)) | 637 | if (!regcache_reg_needs_sync(map, regtmp, val)) |
638 | continue; | 638 | continue; |
639 | 639 | ||
640 | map->cache_bypass = 1; | 640 | map->cache_bypass = true; |
641 | 641 | ||
642 | ret = _regmap_write(map, regtmp, val); | 642 | ret = _regmap_write(map, regtmp, val); |
643 | 643 | ||
644 | map->cache_bypass = 0; | 644 | map->cache_bypass = false; |
645 | if (ret != 0) { | 645 | if (ret != 0) { |
646 | dev_err(map->dev, "Unable to sync register %#x. %d\n", | 646 | dev_err(map->dev, "Unable to sync register %#x. %d\n", |
647 | regtmp, ret); | 647 | regtmp, ret); |
@@ -668,14 +668,14 @@ static int regcache_sync_block_raw_flush(struct regmap *map, const void **data, | |||
668 | dev_dbg(map->dev, "Writing %zu bytes for %d registers from 0x%x-0x%x\n", | 668 | dev_dbg(map->dev, "Writing %zu bytes for %d registers from 0x%x-0x%x\n", |
669 | count * val_bytes, count, base, cur - map->reg_stride); | 669 | count * val_bytes, count, base, cur - map->reg_stride); |
670 | 670 | ||
671 | map->cache_bypass = 1; | 671 | map->cache_bypass = true; |
672 | 672 | ||
673 | ret = _regmap_raw_write(map, base, *data, count * val_bytes); | 673 | ret = _regmap_raw_write(map, base, *data, count * val_bytes); |
674 | if (ret) | 674 | if (ret) |
675 | dev_err(map->dev, "Unable to sync registers %#x-%#x. %d\n", | 675 | dev_err(map->dev, "Unable to sync registers %#x-%#x. %d\n", |
676 | base, cur - map->reg_stride, ret); | 676 | base, cur - map->reg_stride, ret); |
677 | 677 | ||
678 | map->cache_bypass = 0; | 678 | map->cache_bypass = false; |
679 | 679 | ||
680 | *data = NULL; | 680 | *data = NULL; |
681 | 681 | ||