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authorSimon Arlott <simon@fire.lp0.eu>2015-10-29 15:58:47 -0400
committerMark Brown <broonie@kernel.org>2015-11-16 04:43:54 -0500
commit29bb45f25ff3051354ed330c0d0f10418a2b8c7c (patch)
treea9fb3b022d66d5c87f7a41727d22b6ff0eabf3d2 /drivers/base/regmap
parent8005c49d9aea74d382f474ce11afbbc7d7130bec (diff)
regmap-mmio: Use native endianness for read/write
The regmap API has an endianness setting for formatting reads and writes. This can be set by the usual DT "little-endian" and "big-endian" properties. To work properly the associated regmap_bus needs to read/write in native endian. The "syscon" DT device binding creates an mmio-based regmap_bus which performs all reads/writes as little-endian. These values are then converted again by regmap, which means that all of the MIPS BCM boards (which are big-endian) have been declared as "little-endian" to get regmap to convert them back to big-endian. Modify regmap-mmio to use the native-endian functions __raw_read*() and __raw_write*() instead of the little-endian functions read*() and write*(). Modify the big-endian MIPS BCM boards to use what will now be the correct endianness instead of pretending that the devices are little-endian. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/base/regmap')
-rw-r--r--drivers/base/regmap/regmap-mmio.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/base/regmap/regmap-mmio.c b/drivers/base/regmap/regmap-mmio.c
index 426a57e41ac7..8a77876d439a 100644
--- a/drivers/base/regmap/regmap-mmio.c
+++ b/drivers/base/regmap/regmap-mmio.c
@@ -106,17 +106,17 @@ static int regmap_mmio_gather_write(void *context,
106 while (val_size) { 106 while (val_size) {
107 switch (ctx->val_bytes) { 107 switch (ctx->val_bytes) {
108 case 1: 108 case 1:
109 writeb(*(u8 *)val, ctx->regs + offset); 109 __raw_writeb(*(u8 *)val, ctx->regs + offset);
110 break; 110 break;
111 case 2: 111 case 2:
112 writew(*(u16 *)val, ctx->regs + offset); 112 __raw_writew(*(u16 *)val, ctx->regs + offset);
113 break; 113 break;
114 case 4: 114 case 4:
115 writel(*(u32 *)val, ctx->regs + offset); 115 __raw_writel(*(u32 *)val, ctx->regs + offset);
116 break; 116 break;
117#ifdef CONFIG_64BIT 117#ifdef CONFIG_64BIT
118 case 8: 118 case 8:
119 writeq(*(u64 *)val, ctx->regs + offset); 119 __raw_writeq(*(u64 *)val, ctx->regs + offset);
120 break; 120 break;
121#endif 121#endif
122 default: 122 default:
@@ -166,17 +166,17 @@ static int regmap_mmio_read(void *context,
166 while (val_size) { 166 while (val_size) {
167 switch (ctx->val_bytes) { 167 switch (ctx->val_bytes) {
168 case 1: 168 case 1:
169 *(u8 *)val = readb(ctx->regs + offset); 169 *(u8 *)val = __raw_readb(ctx->regs + offset);
170 break; 170 break;
171 case 2: 171 case 2:
172 *(u16 *)val = readw(ctx->regs + offset); 172 *(u16 *)val = __raw_readw(ctx->regs + offset);
173 break; 173 break;
174 case 4: 174 case 4:
175 *(u32 *)val = readl(ctx->regs + offset); 175 *(u32 *)val = __raw_readl(ctx->regs + offset);
176 break; 176 break;
177#ifdef CONFIG_64BIT 177#ifdef CONFIG_64BIT
178 case 8: 178 case 8:
179 *(u64 *)val = readq(ctx->regs + offset); 179 *(u64 *)val = __raw_readq(ctx->regs + offset);
180 break; 180 break;
181#endif 181#endif
182 default: 182 default: