MIPS: 74K/1074K: Correct erratum workaround.

Make sure 74K revision numbers are not applied to the 1074K.  Also catch
invalid usage.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5857/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 18 insertions, 8 deletions

diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index ae500ca76580..627883bc6d5f 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -786,20 +786,30 @@ static inline void rm7k_erratum31(void)
 
 static inline void alias_74k_erratum(struct cpuinfo_mips *c)
 {
+        unsigned int imp = c->processor_id & PRID_IMP_MASK;
+        unsigned int rev = c->processor_id & PRID_REV_MASK;
+
         /*
          * Early versions of the 74K do not update the cache tags on a
          * vtag miss/ptag hit which can occur in the case of KSEG0/KUSEG
          * aliases. In this case it is better to treat the cache as always
          * having aliases.
          */
-        if ((c->processor_id & PRID_REV_MASK) <= PRID_REV_ENCODE_332(2, 4, 0))
-                c->dcache.flags |= MIPS_CACHE_VTAG;
-        if ((c->processor_id & PRID_REV_MASK) == PRID_REV_ENCODE_332(2, 4, 0))
-                write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
-        if ((c->processor_id & PRID_IMP_MASK) == PRID_IMP_1074K &&
-            (c->processor_id & PRID_REV_MASK) <= PRID_REV_ENCODE_332(1, 1, 0)) {
-                c->dcache.flags |= MIPS_CACHE_VTAG;
-                write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
+        switch (imp) {
+        case PRID_IMP_74K:
+                if (rev <= PRID_REV_ENCODE_332(2, 4, 0))
+                        c->dcache.flags |= MIPS_CACHE_VTAG;
+                if (rev == PRID_REV_ENCODE_332(2, 4, 0))
+                        write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
+                break;
+        case PRID_IMP_1074K:
+                if (rev <= PRID_REV_ENCODE_332(1, 1, 0)) {
+                        c->dcache.flags |= MIPS_CACHE_VTAG;
+                        write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
+                }
+                break;
+        default:
+                BUG();
         }
 }