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authorMasahiro Yamada <yamada.masahiro@socionext.com>2015-08-04 07:21:02 -0400
committerOlof Johansson <olof@lixom.net>2015-08-11 09:09:21 -0400
commit68f46897ea7efbcb30d19304072074fac4569c54 (patch)
tree407569de9d7cf01bbd56c41caccd6db07d7d59b3 /arch
parentb9efb8e30e99fe8ca9f886e0332eb0f29b6b48bb (diff)
ARM: dts: uniphier: add I2C controller device nodes
Add I2C controller device nodes for PH1-sLD3, PH1-LD4, PH1-sLD8 (FIFO-less I2C) and PH1-Pro4 (FIFO-builtin I2C). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts8
-rw-r--r--arch/arm/boot/dts/uniphier-ph1-ld4.dtsi58
-rw-r--r--arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts10
-rw-r--r--arch/arm/boot/dts/uniphier-ph1-pro4.dtsi82
-rw-r--r--arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts9
-rw-r--r--arch/arm/boot/dts/uniphier-ph1-sld3.dtsi61
-rw-r--r--arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts8
-rw-r--r--arch/arm/boot/dts/uniphier-ph1-sld8.dtsi58
-rw-r--r--arch/arm/boot/dts/uniphier-pinctrl.dtsi20
9 files changed, 314 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts b/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts
index 7ac053d0ba11..5d24c57521c7 100644
--- a/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts
@@ -65,6 +65,10 @@
65 serial1 = &serial1; 65 serial1 = &serial1;
66 serial2 = &serial2; 66 serial2 = &serial2;
67 serial3 = &serial3; 67 serial3 = &serial3;
68 i2c0 = &i2c0;
69 i2c1 = &i2c1;
70 i2c2 = &i2c2;
71 i2c3 = &i2c3;
68 }; 72 };
69}; 73};
70 74
@@ -93,6 +97,10 @@
93 status = "okay"; 97 status = "okay";
94}; 98};
95 99
100&i2c0 {
101 status = "okay";
102};
103
96&usb0 { 104&usb0 {
97 status = "okay"; 105 status = "okay";
98}; 106};
diff --git a/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi b/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
index 4add90b97eb8..a6a185fae8f1 100644
--- a/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
@@ -70,6 +70,12 @@
70 compatible = "fixed-clock"; 70 compatible = "fixed-clock";
71 clock-frequency = <36864000>; 71 clock-frequency = <36864000>;
72 }; 72 };
73
74 iobus_clk: iobus_clk {
75 #clock-cells = <0>;
76 compatible = "fixed-clock";
77 clock-frequency = <100000000>;
78 };
73 }; 79 };
74 80
75 soc { 81 soc {
@@ -129,6 +135,58 @@
129 fifo-size = <64>; 135 fifo-size = <64>;
130 }; 136 };
131 137
138 i2c0: i2c@58400000 {
139 compatible = "socionext,uniphier-i2c";
140 status = "disabled";
141 reg = <0x58400000 0x40>;
142 #address-cells = <1>;
143 #size-cells = <0>;
144 pinctrl-names = "default";
145 pinctrl-0 = <&pinctrl_i2c0>;
146 interrupts = <0 41 1>;
147 clocks = <&iobus_clk>;
148 clock-frequency = <100000>;
149 };
150
151 i2c1: i2c@58480000 {
152 compatible = "socionext,uniphier-i2c";
153 status = "disabled";
154 reg = <0x58480000 0x40>;
155 #address-cells = <1>;
156 #size-cells = <0>;
157 pinctrl-names = "default";
158 pinctrl-0 = <&pinctrl_i2c1>;
159 interrupts = <0 42 1>;
160 clocks = <&iobus_clk>;
161 clock-frequency = <100000>;
162 };
163
164 /* chip-internal connection for DMD */
165 i2c2: i2c@58500000 {
166 compatible = "socionext,uniphier-i2c";
167 reg = <0x58500000 0x40>;
168 #address-cells = <1>;
169 #size-cells = <0>;
170 pinctrl-names = "default";
171 pinctrl-0 = <&pinctrl_i2c2>;
172 interrupts = <0 43 1>;
173 clocks = <&iobus_clk>;
174 clock-frequency = <400000>;
175 };
176
177 i2c3: i2c@58580000 {
178 compatible = "socionext,uniphier-i2c";
179 status = "disabled";
180 reg = <0x58580000 0x40>;
181 #address-cells = <1>;
182 #size-cells = <0>;
183 pinctrl-names = "default";
184 pinctrl-0 = <&pinctrl_i2c3>;
185 interrupts = <0 44 1>;
186 clocks = <&iobus_clk>;
187 clock-frequency = <100000>;
188 };
189
132 system-bus-controller-misc@59800000 { 190 system-bus-controller-misc@59800000 {
133 compatible = "socionext,uniphier-system-bus-controller-misc", 191 compatible = "socionext,uniphier-system-bus-controller-misc",
134 "syscon"; 192 "syscon";
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts b/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts
index b669d32ff4a9..26c18ac710e9 100644
--- a/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts
@@ -65,6 +65,12 @@
65 serial1 = &serial1; 65 serial1 = &serial1;
66 serial2 = &serial2; 66 serial2 = &serial2;
67 serial3 = &serial3; 67 serial3 = &serial3;
68 i2c0 = &i2c0;
69 i2c1 = &i2c1;
70 i2c2 = &i2c2;
71 i2c3 = &i2c3;
72 i2c5 = &i2c5;
73 i2c6 = &i2c6;
68 }; 74 };
69}; 75};
70 76
@@ -93,6 +99,10 @@
93 status = "okay"; 99 status = "okay";
94}; 100};
95 101
102&i2c0 {
103 status = "okay";
104};
105
96&usb2 { 106&usb2 {
97 status = "okay"; 107 status = "okay";
98}; 108};
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi b/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
index d0ca4c86c8e4..e8bbc454d788 100644
--- a/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
@@ -77,6 +77,12 @@
77 compatible = "fixed-clock"; 77 compatible = "fixed-clock";
78 clock-frequency = <73728000>; 78 clock-frequency = <73728000>;
79 }; 79 };
80
81 i2c_clk: i2c_clk {
82 #clock-cells = <0>;
83 compatible = "fixed-clock";
84 clock-frequency = <50000000>;
85 };
80 }; 86 };
81 87
82 soc { 88 soc {
@@ -136,6 +142,82 @@
136 fifo-size = <64>; 142 fifo-size = <64>;
137 }; 143 };
138 144
145 i2c0: i2c@58780000 {
146 compatible = "socionext,uniphier-fi2c";
147 status = "disabled";
148 reg = <0x58780000 0x80>;
149 #address-cells = <1>;
150 #size-cells = <0>;
151 pinctrl-names = "default";
152 pinctrl-0 = <&pinctrl_i2c0>;
153 interrupts = <0 41 4>;
154 clocks = <&i2c_clk>;
155 clock-frequency = <100000>;
156 };
157
158 i2c1: i2c@58781000 {
159 compatible = "socionext,uniphier-fi2c";
160 status = "disabled";
161 reg = <0x58781000 0x80>;
162 #address-cells = <1>;
163 #size-cells = <0>;
164 pinctrl-names = "default";
165 pinctrl-0 = <&pinctrl_i2c1>;
166 interrupts = <0 42 4>;
167 clocks = <&i2c_clk>;
168 clock-frequency = <100000>;
169 };
170
171 i2c2: i2c@58782000 {
172 compatible = "socionext,uniphier-fi2c";
173 status = "disabled";
174 reg = <0x58782000 0x80>;
175 #address-cells = <1>;
176 #size-cells = <0>;
177 pinctrl-names = "default";
178 pinctrl-0 = <&pinctrl_i2c2>;
179 interrupts = <0 43 4>;
180 clocks = <&i2c_clk>;
181 clock-frequency = <100000>;
182 };
183
184 i2c3: i2c@58783000 {
185 compatible = "socionext,uniphier-fi2c";
186 status = "disabled";
187 reg = <0x58783000 0x80>;
188 #address-cells = <1>;
189 #size-cells = <0>;
190 pinctrl-names = "default";
191 pinctrl-0 = <&pinctrl_i2c3>;
192 interrupts = <0 44 4>;
193 clocks = <&i2c_clk>;
194 clock-frequency = <100000>;
195 };
196
197 /* i2c4 does not exist */
198
199 /* chip-internal connection for DMD */
200 i2c5: i2c@58785000 {
201 compatible = "socionext,uniphier-fi2c";
202 reg = <0x58785000 0x80>;
203 #address-cells = <1>;
204 #size-cells = <0>;
205 interrupts = <0 25 4>;
206 clocks = <&i2c_clk>;
207 clock-frequency = <400000>;
208 };
209
210 /* chip-internal connection for HDMI */
211 i2c6: i2c@58786000 {
212 compatible = "socionext,uniphier-fi2c";
213 reg = <0x58786000 0x80>;
214 #address-cells = <1>;
215 #size-cells = <0>;
216 interrupts = <0 26 4>;
217 clocks = <&i2c_clk>;
218 clock-frequency = <400000>;
219 };
220
139 system-bus-controller-misc@59800000 { 221 system-bus-controller-misc@59800000 {
140 compatible = "socionext,uniphier-system-bus-controller-misc", 222 compatible = "socionext,uniphier-system-bus-controller-misc",
141 "syscon"; 223 "syscon";
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts b/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts
index 48f7361ee547..cb6e9aa91bb4 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts
@@ -65,6 +65,11 @@
65 serial0 = &serial0; 65 serial0 = &serial0;
66 serial1 = &serial1; 66 serial1 = &serial1;
67 serial2 = &serial2; 67 serial2 = &serial2;
68 i2c0 = &i2c0;
69 i2c1 = &i2c1;
70 i2c2 = &i2c2;
71 i2c3 = &i2c3;
72 i2c4 = &i2c4;
68 }; 73 };
69}; 74};
70 75
@@ -93,6 +98,10 @@
93 status = "okay"; 98 status = "okay";
94}; 99};
95 100
101&i2c0 {
102 status = "okay";
103};
104
96&usb0 { 105&usb0 {
97 status = "okay"; 106 status = "okay";
98}; 107};
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi b/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
index db74457232c5..3cc90cd37a26 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
@@ -77,6 +77,12 @@
77 compatible = "fixed-clock"; 77 compatible = "fixed-clock";
78 clock-frequency = <36864000>; 78 clock-frequency = <36864000>;
79 }; 79 };
80
81 iobus_clk: iobus_clk {
82 #clock-cells = <0>;
83 compatible = "fixed-clock";
84 clock-frequency = <100000000>;
85 };
80 }; 86 };
81 87
82 soc { 88 soc {
@@ -141,6 +147,61 @@
141 fifo-size = <64>; 147 fifo-size = <64>;
142 }; 148 };
143 149
150 i2c0: i2c@58400000 {
151 compatible = "socionext,uniphier-i2c";
152 status = "disabled";
153 reg = <0x58400000 0x40>;
154 #address-cells = <1>;
155 #size-cells = <0>;
156 interrupts = <0 41 1>;
157 clocks = <&iobus_clk>;
158 clock-frequency = <100000>;
159 };
160
161 i2c1: i2c@58480000 {
162 compatible = "socionext,uniphier-i2c";
163 status = "disabled";
164 reg = <0x58480000 0x40>;
165 #address-cells = <1>;
166 #size-cells = <0>;
167 interrupts = <0 42 1>;
168 clocks = <&iobus_clk>;
169 clock-frequency = <100000>;
170 };
171
172 i2c2: i2c@58500000 {
173 compatible = "socionext,uniphier-i2c";
174 status = "disabled";
175 reg = <0x58500000 0x40>;
176 #address-cells = <1>;
177 #size-cells = <0>;
178 interrupts = <0 43 1>;
179 clocks = <&iobus_clk>;
180 clock-frequency = <100000>;
181 };
182
183 i2c3: i2c@58580000 {
184 compatible = "socionext,uniphier-i2c";
185 status = "disabled";
186 reg = <0x58580000 0x40>;
187 #address-cells = <1>;
188 #size-cells = <0>;
189 interrupts = <0 44 1>;
190 clocks = <&iobus_clk>;
191 clock-frequency = <100000>;
192 };
193
194 /* chip-internal connection for DMD */
195 i2c4: i2c@58600000 {
196 compatible = "socionext,uniphier-i2c";
197 reg = <0x58600000 0x40>;
198 #address-cells = <1>;
199 #size-cells = <0>;
200 interrupts = <0 45 1>;
201 clocks = <&iobus_clk>;
202 clock-frequency = <400000>;
203 };
204
144 system-bus-controller-misc@59800000 { 205 system-bus-controller-misc@59800000 {
145 compatible = "socionext,uniphier-system-bus-controller-misc", 206 compatible = "socionext,uniphier-system-bus-controller-misc",
146 "syscon"; 207 "syscon";
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts b/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts
index 9b5992a77821..a40a0fb8f23c 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts
@@ -65,6 +65,10 @@
65 serial1 = &serial1; 65 serial1 = &serial1;
66 serial2 = &serial2; 66 serial2 = &serial2;
67 serial3 = &serial3; 67 serial3 = &serial3;
68 i2c0 = &i2c0;
69 i2c1 = &i2c1;
70 i2c2 = &i2c2;
71 i2c3 = &i2c3;
68 }; 72 };
69}; 73};
70 74
@@ -93,6 +97,10 @@
93 status = "okay"; 97 status = "okay";
94}; 98};
95 99
100&i2c0 {
101 status = "okay";
102};
103
96&usb0 { 104&usb0 {
97 status = "okay"; 105 status = "okay";
98}; 106};
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi b/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
index 3ead9102d02a..58067dfc16e5 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
@@ -70,6 +70,12 @@
70 compatible = "fixed-clock"; 70 compatible = "fixed-clock";
71 clock-frequency = <80000000>; 71 clock-frequency = <80000000>;
72 }; 72 };
73
74 iobus_clk: iobus_clk {
75 #clock-cells = <0>;
76 compatible = "fixed-clock";
77 clock-frequency = <100000000>;
78 };
73 }; 79 };
74 80
75 soc { 81 soc {
@@ -129,6 +135,58 @@
129 fifo-size = <64>; 135 fifo-size = <64>;
130 }; 136 };
131 137
138 i2c0: i2c@58400000 {
139 compatible = "socionext,uniphier-i2c";
140 status = "disabled";
141 reg = <0x58400000 0x40>;
142 #address-cells = <1>;
143 #size-cells = <0>;
144 pinctrl-names = "default";
145 pinctrl-0 = <&pinctrl_i2c0>;
146 interrupts = <0 41 1>;
147 clocks = <&iobus_clk>;
148 clock-frequency = <100000>;
149 };
150
151 i2c1: i2c@58480000 {
152 compatible = "socionext,uniphier-i2c";
153 status = "disabled";
154 reg = <0x58480000 0x40>;
155 #address-cells = <1>;
156 #size-cells = <0>;
157 pinctrl-names = "default";
158 pinctrl-0 = <&pinctrl_i2c1>;
159 interrupts = <0 42 1>;
160 clocks = <&iobus_clk>;
161 clock-frequency = <100000>;
162 };
163
164 /* chip-internal connection for DMD */
165 i2c2: i2c@58500000 {
166 compatible = "socionext,uniphier-i2c";
167 reg = <0x58500000 0x40>;
168 #address-cells = <1>;
169 #size-cells = <0>;
170 pinctrl-names = "default";
171 pinctrl-0 = <&pinctrl_i2c2>;
172 interrupts = <0 43 1>;
173 clocks = <&iobus_clk>;
174 clock-frequency = <400000>;
175 };
176
177 i2c3: i2c@58580000 {
178 compatible = "socionext,uniphier-i2c";
179 status = "disabled";
180 reg = <0x58580000 0x40>;
181 #address-cells = <1>;
182 #size-cells = <0>;
183 pinctrl-names = "default";
184 pinctrl-0 = <&pinctrl_i2c3>;
185 interrupts = <0 44 1>;
186 clocks = <&iobus_clk>;
187 clock-frequency = <100000>;
188 };
189
132 system-bus-controller-misc@59800000 { 190 system-bus-controller-misc@59800000 {
133 compatible = "socionext,uniphier-system-bus-controller-misc", 191 compatible = "socionext,uniphier-system-bus-controller-misc",
134 "syscon"; 192 "syscon";
diff --git a/arch/arm/boot/dts/uniphier-pinctrl.dtsi b/arch/arm/boot/dts/uniphier-pinctrl.dtsi
index 1b5b4fe65043..f67445f4f10d 100644
--- a/arch/arm/boot/dts/uniphier-pinctrl.dtsi
+++ b/arch/arm/boot/dts/uniphier-pinctrl.dtsi
@@ -43,6 +43,26 @@
43 */ 43 */
44 44
45&pinctrl { 45&pinctrl {
46 pinctrl_i2c0: i2c0_grp {
47 groups = "i2c0";
48 function = "i2c0";
49 };
50
51 pinctrl_i2c1: i2c1_grp {
52 groups = "i2c1";
53 function = "i2c1";
54 };
55
56 pinctrl_i2c2: i2c2_grp {
57 groups = "i2c2";
58 function = "i2c2";
59 };
60
61 pinctrl_i2c3: i2c3_grp {
62 groups = "i2c3";
63 function = "i2c3";
64 };
65
46 pinctrl_uart0: uart0_grp { 66 pinctrl_uart0: uart0_grp {
47 groups = "uart0"; 67 groups = "uart0";
48 function = "uart0"; 68 function = "uart0";
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-03 23:04:57 -0500