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author | Linus Torvalds <torvalds@linux-foundation.org> | 2015-05-10 14:16:48 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2015-05-10 14:16:48 -0400 |
commit | 41f2a93cc6d13fa1c82db1281162500fcc57ba3e (patch) | |
tree | 7a58f9a8b664a5af0920831f8bff4eb419d93981 /arch | |
parent | 8425ac7a0d56731df5455c3015c59484f39eab6d (diff) | |
parent | 3b8786ff7a1b31645ae2c26a2ec32dbd42ac1094 (diff) |
Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King:
"A set of ARM fixes:
- fix an off-by-one error in the iommu DMA ops, which caused errors
with a 4GiB size.
- remove comments mentioning the non-existent CONFIG_CPU_ARM1020_CPU_IDLE
macro.
- remove useless CONFIG_CPU_ICACHE_STREAMING_DISABLE blocks, where
this symbol never appeared in any Kconfig.
- fix Feroceon code to cope with a previous change correctly (it
incorrectly left an additional word in an assembly structure
definition)
- avoid a misleading IRQ affinity warning in the ARM PMU code for
IRQs which are already affine to their CPUs.
- fix the node name printed in the IRQ affinity warning"
* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
ARM: 8352/1: perf: Fix the pmu node name in warning message
ARM: 8351/1: perf: don't warn about missing interrupt-affinity property for PPIs
ARM: 8350/1: proc-feroceon: Fix feroceon_proc_info macro
ARM: 8349/1: arch/arm/mm/proc-arm925.S: remove dead #ifdef block
ARM: 8348/1: remove comments on CPU_ARM1020_CPU_IDLE
ARM: 8347/1: dma-mapping: fix off-by-one check in arm_setup_iommu_dma_ops
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/include/asm/dma-iommu.h | 2 | ||||
-rw-r--r-- | arch/arm/kernel/perf_event_cpu.c | 9 | ||||
-rw-r--r-- | arch/arm/mm/dma-mapping.c | 13 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm1020.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm1020e.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm925.S | 3 | ||||
-rw-r--r-- | arch/arm/mm/proc-feroceon.S | 1 |
7 files changed, 13 insertions, 19 deletions
diff --git a/arch/arm/include/asm/dma-iommu.h b/arch/arm/include/asm/dma-iommu.h index 8e3fcb924db6..2ef282f96651 100644 --- a/arch/arm/include/asm/dma-iommu.h +++ b/arch/arm/include/asm/dma-iommu.h | |||
@@ -25,7 +25,7 @@ struct dma_iommu_mapping { | |||
25 | }; | 25 | }; |
26 | 26 | ||
27 | struct dma_iommu_mapping * | 27 | struct dma_iommu_mapping * |
28 | arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, size_t size); | 28 | arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, u64 size); |
29 | 29 | ||
30 | void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping); | 30 | void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping); |
31 | 31 | ||
diff --git a/arch/arm/kernel/perf_event_cpu.c b/arch/arm/kernel/perf_event_cpu.c index 91c7ba182dcd..213919ba326f 100644 --- a/arch/arm/kernel/perf_event_cpu.c +++ b/arch/arm/kernel/perf_event_cpu.c | |||
@@ -303,12 +303,17 @@ static int probe_current_pmu(struct arm_pmu *pmu) | |||
303 | 303 | ||
304 | static int of_pmu_irq_cfg(struct platform_device *pdev) | 304 | static int of_pmu_irq_cfg(struct platform_device *pdev) |
305 | { | 305 | { |
306 | int i; | 306 | int i, irq; |
307 | int *irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL); | 307 | int *irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL); |
308 | 308 | ||
309 | if (!irqs) | 309 | if (!irqs) |
310 | return -ENOMEM; | 310 | return -ENOMEM; |
311 | 311 | ||
312 | /* Don't bother with PPIs; they're already affine */ | ||
313 | irq = platform_get_irq(pdev, 0); | ||
314 | if (irq >= 0 && irq_is_percpu(irq)) | ||
315 | return 0; | ||
316 | |||
312 | for (i = 0; i < pdev->num_resources; ++i) { | 317 | for (i = 0; i < pdev->num_resources; ++i) { |
313 | struct device_node *dn; | 318 | struct device_node *dn; |
314 | int cpu; | 319 | int cpu; |
@@ -317,7 +322,7 @@ static int of_pmu_irq_cfg(struct platform_device *pdev) | |||
317 | i); | 322 | i); |
318 | if (!dn) { | 323 | if (!dn) { |
319 | pr_warn("Failed to parse %s/interrupt-affinity[%d]\n", | 324 | pr_warn("Failed to parse %s/interrupt-affinity[%d]\n", |
320 | of_node_full_name(dn), i); | 325 | of_node_full_name(pdev->dev.of_node), i); |
321 | break; | 326 | break; |
322 | } | 327 | } |
323 | 328 | ||
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index 09c5fe3d30c2..7e7583ddd607 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c | |||
@@ -1878,7 +1878,7 @@ struct dma_map_ops iommu_coherent_ops = { | |||
1878 | * arm_iommu_attach_device function. | 1878 | * arm_iommu_attach_device function. |
1879 | */ | 1879 | */ |
1880 | struct dma_iommu_mapping * | 1880 | struct dma_iommu_mapping * |
1881 | arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, size_t size) | 1881 | arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, u64 size) |
1882 | { | 1882 | { |
1883 | unsigned int bits = size >> PAGE_SHIFT; | 1883 | unsigned int bits = size >> PAGE_SHIFT; |
1884 | unsigned int bitmap_size = BITS_TO_LONGS(bits) * sizeof(long); | 1884 | unsigned int bitmap_size = BITS_TO_LONGS(bits) * sizeof(long); |
@@ -1886,6 +1886,10 @@ arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, size_t size) | |||
1886 | int extensions = 1; | 1886 | int extensions = 1; |
1887 | int err = -ENOMEM; | 1887 | int err = -ENOMEM; |
1888 | 1888 | ||
1889 | /* currently only 32-bit DMA address space is supported */ | ||
1890 | if (size > DMA_BIT_MASK(32) + 1) | ||
1891 | return ERR_PTR(-ERANGE); | ||
1892 | |||
1889 | if (!bitmap_size) | 1893 | if (!bitmap_size) |
1890 | return ERR_PTR(-EINVAL); | 1894 | return ERR_PTR(-EINVAL); |
1891 | 1895 | ||
@@ -2057,13 +2061,6 @@ static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size, | |||
2057 | if (!iommu) | 2061 | if (!iommu) |
2058 | return false; | 2062 | return false; |
2059 | 2063 | ||
2060 | /* | ||
2061 | * currently arm_iommu_create_mapping() takes a max of size_t | ||
2062 | * for size param. So check this limit for now. | ||
2063 | */ | ||
2064 | if (size > SIZE_MAX) | ||
2065 | return false; | ||
2066 | |||
2067 | mapping = arm_iommu_create_mapping(dev->bus, dma_base, size); | 2064 | mapping = arm_iommu_create_mapping(dev->bus, dma_base, size); |
2068 | if (IS_ERR(mapping)) { | 2065 | if (IS_ERR(mapping)) { |
2069 | pr_warn("Failed to create %llu-byte IOMMU mapping for device %s\n", | 2066 | pr_warn("Failed to create %llu-byte IOMMU mapping for device %s\n", |
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S index aa0519eed698..774ef1323554 100644 --- a/arch/arm/mm/proc-arm1020.S +++ b/arch/arm/mm/proc-arm1020.S | |||
@@ -22,8 +22,6 @@ | |||
22 | * | 22 | * |
23 | * These are the low level assembler for performing cache and TLB | 23 | * These are the low level assembler for performing cache and TLB |
24 | * functions on the arm1020. | 24 | * functions on the arm1020. |
25 | * | ||
26 | * CONFIG_CPU_ARM1020_CPU_IDLE -> nohlt | ||
27 | */ | 25 | */ |
28 | #include <linux/linkage.h> | 26 | #include <linux/linkage.h> |
29 | #include <linux/init.h> | 27 | #include <linux/init.h> |
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S index bff4c7f70fd6..ae3c27b71594 100644 --- a/arch/arm/mm/proc-arm1020e.S +++ b/arch/arm/mm/proc-arm1020e.S | |||
@@ -22,8 +22,6 @@ | |||
22 | * | 22 | * |
23 | * These are the low level assembler for performing cache and TLB | 23 | * These are the low level assembler for performing cache and TLB |
24 | * functions on the arm1020e. | 24 | * functions on the arm1020e. |
25 | * | ||
26 | * CONFIG_CPU_ARM1020_CPU_IDLE -> nohlt | ||
27 | */ | 25 | */ |
28 | #include <linux/linkage.h> | 26 | #include <linux/linkage.h> |
29 | #include <linux/init.h> | 27 | #include <linux/init.h> |
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S index ede8c54ab4aa..32a47cc19076 100644 --- a/arch/arm/mm/proc-arm925.S +++ b/arch/arm/mm/proc-arm925.S | |||
@@ -441,9 +441,6 @@ ENTRY(cpu_arm925_set_pte_ext) | |||
441 | .type __arm925_setup, #function | 441 | .type __arm925_setup, #function |
442 | __arm925_setup: | 442 | __arm925_setup: |
443 | mov r0, #0 | 443 | mov r0, #0 |
444 | #if defined(CONFIG_CPU_ICACHE_STREAMING_DISABLE) | ||
445 | orr r0,r0,#1 << 7 | ||
446 | #endif | ||
447 | 444 | ||
448 | /* Transparent on, D-cache clean & flush mode. See NOTE2 above */ | 445 | /* Transparent on, D-cache clean & flush mode. See NOTE2 above */ |
449 | orr r0,r0,#1 << 1 @ transparent mode on | 446 | orr r0,r0,#1 << 1 @ transparent mode on |
diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S index e494d6d6acbe..92e08bf37aad 100644 --- a/arch/arm/mm/proc-feroceon.S +++ b/arch/arm/mm/proc-feroceon.S | |||
@@ -602,7 +602,6 @@ __\name\()_proc_info: | |||
602 | PMD_SECT_AP_WRITE | \ | 602 | PMD_SECT_AP_WRITE | \ |
603 | PMD_SECT_AP_READ | 603 | PMD_SECT_AP_READ |
604 | initfn __feroceon_setup, __\name\()_proc_info | 604 | initfn __feroceon_setup, __\name\()_proc_info |
605 | .long __feroceon_setup | ||
606 | .long cpu_arch_name | 605 | .long cpu_arch_name |
607 | .long cpu_elf_name | 606 | .long cpu_elf_name |
608 | .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP | 607 | .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP |