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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2015-11-11 12:59:29 -0500
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2015-12-08 19:18:34 -0500
commit4077a387b79f41e262e9e7332a23b24860407b18 (patch)
tree0eddd69e9dba02a817c444a9387aca9eff8b8936 /arch/x86/include
parent527e9316f8ec44bd53d90fb9f611fa7ffff52bb9 (diff)
x86/platform/iosf_mbi: Remove duplicate definitions
The read and write opcodes are global for all units on SoC and even across Intel SoCs. Remove duplication of corresponding constants. At the same time convert all current users. No functional change. Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Boon Leong Ong <boon.leong.ong@intel.com> Acked-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'arch/x86/include')
-rw-r--r--arch/x86/include/asm/iosf_mbi.h49
1 files changed, 11 insertions, 38 deletions
diff --git a/arch/x86/include/asm/iosf_mbi.h b/arch/x86/include/asm/iosf_mbi.h
index b72ad0faa6c5..cdc5f6352ac5 100644
--- a/arch/x86/include/asm/iosf_mbi.h
+++ b/arch/x86/include/asm/iosf_mbi.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * iosf_mbi.h: Intel OnChip System Fabric MailBox access support 2 * Intel OnChip System Fabric MailBox access support
3 */ 3 */
4 4
5#ifndef IOSF_MBI_SYMS_H 5#ifndef IOSF_MBI_SYMS_H
@@ -16,6 +16,16 @@
16#define MBI_MASK_LO 0x000000FF 16#define MBI_MASK_LO 0x000000FF
17#define MBI_ENABLE 0xF0 17#define MBI_ENABLE 0xF0
18 18
19/* IOSF SB read/write opcodes */
20#define MBI_MMIO_READ 0x00
21#define MBI_MMIO_WRITE 0x01
22#define MBI_CR_READ 0x06
23#define MBI_CR_WRITE 0x07
24#define MBI_REG_READ 0x10
25#define MBI_REG_WRITE 0x11
26#define MBI_ESRAM_READ 0x12
27#define MBI_ESRAM_WRITE 0x13
28
19/* Baytrail available units */ 29/* Baytrail available units */
20#define BT_MBI_UNIT_AUNIT 0x00 30#define BT_MBI_UNIT_AUNIT 0x00
21#define BT_MBI_UNIT_SMC 0x01 31#define BT_MBI_UNIT_SMC 0x01
@@ -28,50 +38,13 @@
28#define BT_MBI_UNIT_SATA 0xA3 38#define BT_MBI_UNIT_SATA 0xA3
29#define BT_MBI_UNIT_PCIE 0xA6 39#define BT_MBI_UNIT_PCIE 0xA6
30 40
31/* Baytrail read/write opcodes */
32#define BT_MBI_AUNIT_READ 0x10
33#define BT_MBI_AUNIT_WRITE 0x11
34#define BT_MBI_SMC_READ 0x10
35#define BT_MBI_SMC_WRITE 0x11
36#define BT_MBI_CPU_READ 0x10
37#define BT_MBI_CPU_WRITE 0x11
38#define BT_MBI_BUNIT_READ 0x10
39#define BT_MBI_BUNIT_WRITE 0x11
40#define BT_MBI_PMC_READ 0x06
41#define BT_MBI_PMC_WRITE 0x07
42#define BT_MBI_GFX_READ 0x00
43#define BT_MBI_GFX_WRITE 0x01
44#define BT_MBI_SMIO_READ 0x06
45#define BT_MBI_SMIO_WRITE 0x07
46#define BT_MBI_USB_READ 0x06
47#define BT_MBI_USB_WRITE 0x07
48#define BT_MBI_SATA_READ 0x00
49#define BT_MBI_SATA_WRITE 0x01
50#define BT_MBI_PCIE_READ 0x00
51#define BT_MBI_PCIE_WRITE 0x01
52
53/* Quark available units */ 41/* Quark available units */
54#define QRK_MBI_UNIT_HBA 0x00 42#define QRK_MBI_UNIT_HBA 0x00
55#define QRK_MBI_UNIT_HB 0x03 43#define QRK_MBI_UNIT_HB 0x03
56#define QRK_MBI_UNIT_RMU 0x04 44#define QRK_MBI_UNIT_RMU 0x04
57#define QRK_MBI_UNIT_MM 0x05 45#define QRK_MBI_UNIT_MM 0x05
58#define QRK_MBI_UNIT_MMESRAM 0x05
59#define QRK_MBI_UNIT_SOC 0x31 46#define QRK_MBI_UNIT_SOC 0x31
60 47
61/* Quark read/write opcodes */
62#define QRK_MBI_HBA_READ 0x10
63#define QRK_MBI_HBA_WRITE 0x11
64#define QRK_MBI_HB_READ 0x10
65#define QRK_MBI_HB_WRITE 0x11
66#define QRK_MBI_RMU_READ 0x10
67#define QRK_MBI_RMU_WRITE 0x11
68#define QRK_MBI_MM_READ 0x10
69#define QRK_MBI_MM_WRITE 0x11
70#define QRK_MBI_MMESRAM_READ 0x12
71#define QRK_MBI_MMESRAM_WRITE 0x13
72#define QRK_MBI_SOC_READ 0x06
73#define QRK_MBI_SOC_WRITE 0x07
74
75#if IS_ENABLED(CONFIG_IOSF_MBI) 48#if IS_ENABLED(CONFIG_IOSF_MBI)
76 49
77bool iosf_mbi_available(void); 50bool iosf_mbi_available(void);