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authorBorislav Petkov <bp@suse.de>2015-12-07 04:39:41 -0500
committerThomas Gleixner <tglx@linutronix.de>2015-12-19 05:49:55 -0500
commit362f924b64ba0f4be2ee0cb697690c33d40be721 (patch)
treedcfba0fc2301d1b81ad2c7220ad7edd8e6166db7 /arch/x86/include
parent39c06df4dc10a41de5fe706f4378ee5f09beba73 (diff)
x86/cpufeature: Remove unused and seldomly used cpu_has_xx macros
Those are stupid and code should use static_cpu_has_safe() or boot_cpu_has() instead. Kill the least used and unused ones. The remaining ones need more careful inspection before a conversion can happen. On the TODO. Signed-off-by: Borislav Petkov <bp@suse.de> Link: http://lkml.kernel.org/r/1449481182-27541-4-git-send-email-bp@alien8.de Cc: David Sterba <dsterba@suse.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Matt Mackall <mpm@selenic.com> Cc: Chris Mason <clm@fb.com> Cc: Josef Bacik <jbacik@fb.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/include')
-rw-r--r--arch/x86/include/asm/cmpxchg_32.h2
-rw-r--r--arch/x86/include/asm/cmpxchg_64.h2
-rw-r--r--arch/x86/include/asm/cpufeature.h37
-rw-r--r--arch/x86/include/asm/xor_32.h2
4 files changed, 7 insertions, 36 deletions
diff --git a/arch/x86/include/asm/cmpxchg_32.h b/arch/x86/include/asm/cmpxchg_32.h
index f7e142926481..e4959d023af8 100644
--- a/arch/x86/include/asm/cmpxchg_32.h
+++ b/arch/x86/include/asm/cmpxchg_32.h
@@ -109,6 +109,6 @@ static inline u64 __cmpxchg64_local(volatile u64 *ptr, u64 old, u64 new)
109 109
110#endif 110#endif
111 111
112#define system_has_cmpxchg_double() cpu_has_cx8 112#define system_has_cmpxchg_double() boot_cpu_has(X86_FEATURE_CX8)
113 113
114#endif /* _ASM_X86_CMPXCHG_32_H */ 114#endif /* _ASM_X86_CMPXCHG_32_H */
diff --git a/arch/x86/include/asm/cmpxchg_64.h b/arch/x86/include/asm/cmpxchg_64.h
index 1af94697aae5..caa23a34c963 100644
--- a/arch/x86/include/asm/cmpxchg_64.h
+++ b/arch/x86/include/asm/cmpxchg_64.h
@@ -18,6 +18,6 @@ static inline void set_64bit(volatile u64 *ptr, u64 val)
18 cmpxchg_local((ptr), (o), (n)); \ 18 cmpxchg_local((ptr), (o), (n)); \
19}) 19})
20 20
21#define system_has_cmpxchg_double() cpu_has_cx16 21#define system_has_cmpxchg_double() boot_cpu_has(X86_FEATURE_CX16)
22 22
23#endif /* _ASM_X86_CMPXCHG_64_H */ 23#endif /* _ASM_X86_CMPXCHG_64_H */
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 35401fef0d75..144b042c0872 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -385,58 +385,29 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
385} while (0) 385} while (0)
386 386
387#define cpu_has_fpu boot_cpu_has(X86_FEATURE_FPU) 387#define cpu_has_fpu boot_cpu_has(X86_FEATURE_FPU)
388#define cpu_has_de boot_cpu_has(X86_FEATURE_DE)
389#define cpu_has_pse boot_cpu_has(X86_FEATURE_PSE) 388#define cpu_has_pse boot_cpu_has(X86_FEATURE_PSE)
390#define cpu_has_tsc boot_cpu_has(X86_FEATURE_TSC) 389#define cpu_has_tsc boot_cpu_has(X86_FEATURE_TSC)
391#define cpu_has_pge boot_cpu_has(X86_FEATURE_PGE) 390#define cpu_has_pge boot_cpu_has(X86_FEATURE_PGE)
392#define cpu_has_apic boot_cpu_has(X86_FEATURE_APIC) 391#define cpu_has_apic boot_cpu_has(X86_FEATURE_APIC)
393#define cpu_has_sep boot_cpu_has(X86_FEATURE_SEP)
394#define cpu_has_mtrr boot_cpu_has(X86_FEATURE_MTRR)
395#define cpu_has_mmx boot_cpu_has(X86_FEATURE_MMX)
396#define cpu_has_fxsr boot_cpu_has(X86_FEATURE_FXSR) 392#define cpu_has_fxsr boot_cpu_has(X86_FEATURE_FXSR)
397#define cpu_has_xmm boot_cpu_has(X86_FEATURE_XMM) 393#define cpu_has_xmm boot_cpu_has(X86_FEATURE_XMM)
398#define cpu_has_xmm2 boot_cpu_has(X86_FEATURE_XMM2) 394#define cpu_has_xmm2 boot_cpu_has(X86_FEATURE_XMM2)
399#define cpu_has_xmm3 boot_cpu_has(X86_FEATURE_XMM3)
400#define cpu_has_ssse3 boot_cpu_has(X86_FEATURE_SSSE3)
401#define cpu_has_aes boot_cpu_has(X86_FEATURE_AES) 395#define cpu_has_aes boot_cpu_has(X86_FEATURE_AES)
402#define cpu_has_avx boot_cpu_has(X86_FEATURE_AVX) 396#define cpu_has_avx boot_cpu_has(X86_FEATURE_AVX)
403#define cpu_has_avx2 boot_cpu_has(X86_FEATURE_AVX2) 397#define cpu_has_avx2 boot_cpu_has(X86_FEATURE_AVX2)
404#define cpu_has_ht boot_cpu_has(X86_FEATURE_HT)
405#define cpu_has_nx boot_cpu_has(X86_FEATURE_NX)
406#define cpu_has_xstore boot_cpu_has(X86_FEATURE_XSTORE)
407#define cpu_has_xstore_enabled boot_cpu_has(X86_FEATURE_XSTORE_EN)
408#define cpu_has_xcrypt boot_cpu_has(X86_FEATURE_XCRYPT)
409#define cpu_has_xcrypt_enabled boot_cpu_has(X86_FEATURE_XCRYPT_EN)
410#define cpu_has_ace2 boot_cpu_has(X86_FEATURE_ACE2)
411#define cpu_has_ace2_enabled boot_cpu_has(X86_FEATURE_ACE2_EN)
412#define cpu_has_phe boot_cpu_has(X86_FEATURE_PHE)
413#define cpu_has_phe_enabled boot_cpu_has(X86_FEATURE_PHE_EN)
414#define cpu_has_pmm boot_cpu_has(X86_FEATURE_PMM)
415#define cpu_has_pmm_enabled boot_cpu_has(X86_FEATURE_PMM_EN)
416#define cpu_has_ds boot_cpu_has(X86_FEATURE_DS)
417#define cpu_has_pebs boot_cpu_has(X86_FEATURE_PEBS)
418#define cpu_has_clflush boot_cpu_has(X86_FEATURE_CLFLUSH) 398#define cpu_has_clflush boot_cpu_has(X86_FEATURE_CLFLUSH)
419#define cpu_has_bts boot_cpu_has(X86_FEATURE_BTS)
420#define cpu_has_gbpages boot_cpu_has(X86_FEATURE_GBPAGES) 399#define cpu_has_gbpages boot_cpu_has(X86_FEATURE_GBPAGES)
421#define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) 400#define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON)
422#define cpu_has_pat boot_cpu_has(X86_FEATURE_PAT) 401#define cpu_has_pat boot_cpu_has(X86_FEATURE_PAT)
423#define cpu_has_xmm4_1 boot_cpu_has(X86_FEATURE_XMM4_1)
424#define cpu_has_xmm4_2 boot_cpu_has(X86_FEATURE_XMM4_2)
425#define cpu_has_x2apic boot_cpu_has(X86_FEATURE_X2APIC) 402#define cpu_has_x2apic boot_cpu_has(X86_FEATURE_X2APIC)
426#define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE) 403#define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE)
427#define cpu_has_xsaveopt boot_cpu_has(X86_FEATURE_XSAVEOPT)
428#define cpu_has_xsaves boot_cpu_has(X86_FEATURE_XSAVES) 404#define cpu_has_xsaves boot_cpu_has(X86_FEATURE_XSAVES)
429#define cpu_has_osxsave boot_cpu_has(X86_FEATURE_OSXSAVE) 405#define cpu_has_osxsave boot_cpu_has(X86_FEATURE_OSXSAVE)
430#define cpu_has_hypervisor boot_cpu_has(X86_FEATURE_HYPERVISOR) 406#define cpu_has_hypervisor boot_cpu_has(X86_FEATURE_HYPERVISOR)
431#define cpu_has_pclmulqdq boot_cpu_has(X86_FEATURE_PCLMULQDQ) 407/*
432#define cpu_has_perfctr_core boot_cpu_has(X86_FEATURE_PERFCTR_CORE) 408 * Do not add any more of those clumsy macros - use static_cpu_has_safe() for
433#define cpu_has_perfctr_nb boot_cpu_has(X86_FEATURE_PERFCTR_NB) 409 * fast paths and boot_cpu_has() otherwise!
434#define cpu_has_perfctr_l2 boot_cpu_has(X86_FEATURE_PERFCTR_L2) 410 */
435#define cpu_has_cx8 boot_cpu_has(X86_FEATURE_CX8)
436#define cpu_has_cx16 boot_cpu_has(X86_FEATURE_CX16)
437#define cpu_has_eager_fpu boot_cpu_has(X86_FEATURE_EAGER_FPU)
438#define cpu_has_topoext boot_cpu_has(X86_FEATURE_TOPOEXT)
439#define cpu_has_bpext boot_cpu_has(X86_FEATURE_BPEXT)
440 411
441#if __GNUC__ >= 4 412#if __GNUC__ >= 4
442extern void warn_pre_alternatives(void); 413extern void warn_pre_alternatives(void);
diff --git a/arch/x86/include/asm/xor_32.h b/arch/x86/include/asm/xor_32.h
index 5a08bc8bff33..c54beb44c4c1 100644
--- a/arch/x86/include/asm/xor_32.h
+++ b/arch/x86/include/asm/xor_32.h
@@ -553,7 +553,7 @@ do { \
553 if (cpu_has_xmm) { \ 553 if (cpu_has_xmm) { \
554 xor_speed(&xor_block_pIII_sse); \ 554 xor_speed(&xor_block_pIII_sse); \
555 xor_speed(&xor_block_sse_pf64); \ 555 xor_speed(&xor_block_sse_pf64); \
556 } else if (cpu_has_mmx) { \ 556 } else if (boot_cpu_has(X86_FEATURE_MMX)) { \
557 xor_speed(&xor_block_pII_mmx); \ 557 xor_speed(&xor_block_pII_mmx); \
558 xor_speed(&xor_block_p5_mmx); \ 558 xor_speed(&xor_block_p5_mmx); \
559 } else { \ 559 } else { \