Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mpe/linux

Pull powerpc updates from Michael Ellerman:
 "Here's a first pull request for powerpc updates for 3.18.

  The bulk of the additions are for the "cxl" driver, for IBM's Coherent
  Accelerator Processor Interface (CAPI).  Most of it's in drivers/misc,
  which Greg & Arnd maintain, Greg said he was happy for us to take it
  through our tree.

  There's the usual minor cleanups and fixes, including a bit of noise
  in drivers from some of those.  A bunch of updates to our EEH code,
  which has been getting more testing.  Several nice speedups from
  Anton, including 20% in clear_page().

  And a bunch of updates for freescale from Scott"

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mpe/linux: (130 commits)
  cxl: Fix afu_read() not doing finish_wait() on signal or non-blocking
  cxl: Add documentation for userspace APIs
  cxl: Add driver to Kbuild and Makefiles
  cxl: Add userspace header file
  cxl: Driver code for powernv PCIe based cards for userspace access
  cxl: Add base builtin support
  powerpc/mm: Add hooks for cxl
  powerpc/opal: Add PHB to cxl mode call
  powerpc/mm: Add new hash_page_mm()
  powerpc/powerpc: Add new PCIe functions for allocating cxl interrupts
  cxl: Add new header for call backs and structs
  powerpc/powernv: Split out set MSI IRQ chip code
  powerpc/mm: Export mmu_kernel_ssize and mmu_linear_psize
  powerpc/msi: Improve IRQ bitmap allocator
  powerpc/cell: Make spu_flush_all_slbs() generic
  powerpc/cell: Move data segment faulting code out of cell platform
  powerpc/cell: Move spu_handle_mm_fault() out of cell platform
  powerpc/pseries: Use new defines when calling H_SET_MODE
  powerpc: Update contact info in Documentation files
  powerpc/perf/hv-24x7: Simplify catalog_read()
  ...

13 files changed, 116 insertions, 68 deletions

diff --git a/arch/powerpc/sysdev/axonram.c b/arch/powerpc/sysdev/axonram.c
index 47b6b9f81d43..ad56edc39919 100644
--- a/arch/powerpc/sysdev/axonram.c
+++ b/arch/powerpc/sysdev/axonram.c
@@ -314,7 +314,7 @@ axon_ram_remove(struct platform_device *device)
         return 0;
 }
 
-static struct of_device_id axon_ram_device_id[] = {
+static const struct of_device_id axon_ram_device_id[] = {
         {
                 .type   = "dma-memory"
         },
diff --git a/arch/powerpc/sysdev/dcr.c b/arch/powerpc/sysdev/dcr.c
index e9056e438575..2d8a101b6b9e 100644
--- a/arch/powerpc/sysdev/dcr.c
+++ b/arch/powerpc/sysdev/dcr.c
@@ -230,5 +230,6 @@ EXPORT_SYMBOL_GPL(dcr_unmap_mmio);
 
 #ifdef CONFIG_PPC_DCR_NATIVE
 DEFINE_SPINLOCK(dcr_ind_lock);
+EXPORT_SYMBOL_GPL(dcr_ind_lock);
 #endif  /* defined(CONFIG_PPC_DCR_NATIVE) */
 
diff --git a/arch/powerpc/sysdev/fsl_85xx_l2ctlr.c b/arch/powerpc/sysdev/fsl_85xx_l2ctlr.c
index afc2dbf37011..90545ad1626e 100644
--- a/arch/powerpc/sysdev/fsl_85xx_l2ctlr.c
+++ b/arch/powerpc/sysdev/fsl_85xx_l2ctlr.c
@@ -171,7 +171,7 @@ static int mpc85xx_l2ctlr_of_remove(struct platform_device *dev)
         return 0;
 }
 
-static struct of_device_id mpc85xx_l2ctlr_of_match[] = {
+static const struct of_device_id mpc85xx_l2ctlr_of_match[] = {
         {
                 .compatible = "fsl,p2020-l2-cache-controller",
         },
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index b32e79dbef4f..de40b48b460e 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -18,6 +18,8 @@
 #include <linux/pci.h>
 #include <linux/slab.h>
 #include <linux/of_platform.h>
+#include <linux/interrupt.h>
+#include <linux/seq_file.h>
 #include <sysdev/fsl_soc.h>
 #include <asm/prom.h>
 #include <asm/hw_irq.h>
@@ -50,6 +52,7 @@ struct fsl_msi_feature {
 struct fsl_msi_cascade_data {
         struct fsl_msi *msi_data;
         int index;
+        int virq;
 };
 
 static inline u32 fsl_msi_read(u32 __iomem *base, unsigned int reg)
@@ -65,11 +68,24 @@ static void fsl_msi_end_irq(struct irq_data *d)
 {
 }
 
+static void fsl_msi_print_chip(struct irq_data *irqd, struct seq_file *p)
+{
+        struct fsl_msi *msi_data = irqd->domain->host_data;
+        irq_hw_number_t hwirq = irqd_to_hwirq(irqd);
+        int cascade_virq, srs;
+
+        srs = (hwirq >> msi_data->srs_shift) & MSI_SRS_MASK;
+        cascade_virq = msi_data->cascade_array[srs]->virq;
+
+        seq_printf(p, " fsl-msi-%d", cascade_virq);
+}
+
+
 static struct irq_chip fsl_msi_chip = {
         .irq_mask       = mask_msi_irq,
         .irq_unmask     = unmask_msi_irq,
         .irq_ack        = fsl_msi_end_irq,
-        .name           = "FSL-MSI",
+        .irq_print_chip = fsl_msi_print_chip,
 };
 
 static int fsl_msi_host_map(struct irq_domain *h, unsigned int virq,
@@ -175,7 +191,8 @@ static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
         np = of_parse_phandle(hose->dn, "fsl,msi", 0);
         if (np) {
                 if (of_device_is_compatible(np, "fsl,mpic-msi") ||
-                    of_device_is_compatible(np, "fsl,vmpic-msi"))
+                    of_device_is_compatible(np, "fsl,vmpic-msi") ||
+                    of_device_is_compatible(np, "fsl,vmpic-msi-v4.3"))
                         phandle = np->phandle;
                 else {
                         dev_err(&pdev->dev,
@@ -234,40 +251,24 @@ out_free:
         return rc;
 }
 
-static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
+static irqreturn_t fsl_msi_cascade(int irq, void *data)
 {
-        struct irq_chip *chip = irq_desc_get_chip(desc);
-        struct irq_data *idata = irq_desc_get_irq_data(desc);
         unsigned int cascade_irq;
         struct fsl_msi *msi_data;
         int msir_index = -1;
         u32 msir_value = 0;
         u32 intr_index;
         u32 have_shift = 0;
-        struct fsl_msi_cascade_data *cascade_data;
+        struct fsl_msi_cascade_data *cascade_data = data;
+        irqreturn_t ret = IRQ_NONE;
 
-        cascade_data = irq_get_handler_data(irq);
         msi_data = cascade_data->msi_data;
 
-        raw_spin_lock(&desc->lock);
-        if ((msi_data->feature &  FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) {
-                if (chip->irq_mask_ack)
-                        chip->irq_mask_ack(idata);
-                else {
-                        chip->irq_mask(idata);
-                        chip->irq_ack(idata);
-                }
-        }
-
-        if (unlikely(irqd_irq_inprogress(idata)))
-                goto unlock;
-
         msir_index = cascade_data->index;
 
         if (msir_index >= NR_MSI_REG_MAX)
                 cascade_irq = NO_IRQ;
 
-        irqd_set_chained_irq_inprogress(idata);
         switch (msi_data->feature & FSL_PIC_IP_MASK) {
         case FSL_PIC_IP_MPIC:
                 msir_value = fsl_msi_read(msi_data->msi_regs,
@@ -296,40 +297,32 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
                 cascade_irq = irq_linear_revmap(msi_data->irqhost,
                                 msi_hwirq(msi_data, msir_index,
                                           intr_index + have_shift));
-                if (cascade_irq != NO_IRQ)
+                if (cascade_irq != NO_IRQ) {
                         generic_handle_irq(cascade_irq);
+                        ret = IRQ_HANDLED;
+                }
                 have_shift += intr_index + 1;
                 msir_value = msir_value >> (intr_index + 1);
         }
-        irqd_clr_chained_irq_inprogress(idata);
 
-        switch (msi_data->feature & FSL_PIC_IP_MASK) {
-        case FSL_PIC_IP_MPIC:
-        case FSL_PIC_IP_VMPIC:
-                chip->irq_eoi(idata);
-                break;
-        case FSL_PIC_IP_IPIC:
-                if (!irqd_irq_disabled(idata) && chip->irq_unmask)
-                        chip->irq_unmask(idata);
-                break;
-        }
-unlock:
-        raw_spin_unlock(&desc->lock);
+        return ret;
 }
 
 static int fsl_of_msi_remove(struct platform_device *ofdev)
 {
         struct fsl_msi *msi = platform_get_drvdata(ofdev);
         int virq, i;
-        struct fsl_msi_cascade_data *cascade_data;
 
         if (msi->list.prev != NULL)
                 list_del(&msi->list);
         for (i = 0; i < NR_MSI_REG_MAX; i++) {
-                virq = msi->msi_virqs[i];
-                if (virq != NO_IRQ) {
-                        cascade_data = irq_get_handler_data(virq);
-                        kfree(cascade_data);
+                if (msi->cascade_array[i]) {
+                        virq = msi->cascade_array[i]->virq;
+
+                        BUG_ON(virq == NO_IRQ);
+
+                        free_irq(virq, msi->cascade_array[i]);
+                        kfree(msi->cascade_array[i]);
                         irq_dispose_mapping(virq);
                 }
         }
@@ -348,7 +341,7 @@ static int fsl_msi_setup_hwirq(struct fsl_msi *msi, struct platform_device *dev,
                                int offset, int irq_index)
 {
         struct fsl_msi_cascade_data *cascade_data = NULL;
-        int virt_msir, i;
+        int virt_msir, i, ret;
 
         virt_msir = irq_of_parse_and_map(dev->dev.of_node, irq_index);
         if (virt_msir == NO_IRQ) {
@@ -363,11 +356,18 @@ static int fsl_msi_setup_hwirq(struct fsl_msi *msi, struct platform_device *dev,
                 return -ENOMEM;
         }
         irq_set_lockdep_class(virt_msir, &fsl_msi_irq_class);
-        msi->msi_virqs[irq_index] = virt_msir;
         cascade_data->index = offset;
         cascade_data->msi_data = msi;
-        irq_set_handler_data(virt_msir, cascade_data);
-        irq_set_chained_handler(virt_msir, fsl_msi_cascade);
+        cascade_data->virq = virt_msir;
+        msi->cascade_array[irq_index] = cascade_data;
+
+        ret = request_irq(virt_msir, fsl_msi_cascade, 0,
+                          "fsl-msi-cascade", cascade_data);
+        if (ret) {
+                dev_err(&dev->dev, "failed to request_irq(%d), ret = %d\n",
+                        virt_msir, ret);
+                return ret;
+        }
 
         /* Release the hwirqs corresponding to this MSI register */
         for (i = 0; i < IRQS_PER_MSI_REG; i++)
@@ -461,7 +461,8 @@ static int fsl_of_msi_probe(struct platform_device *dev)
 
         p = of_get_property(dev->dev.of_node, "msi-available-ranges", &len);
 
-        if (of_device_is_compatible(dev->dev.of_node, "fsl,mpic-msi-v4.3")) {
+        if (of_device_is_compatible(dev->dev.of_node, "fsl,mpic-msi-v4.3") ||
+            of_device_is_compatible(dev->dev.of_node, "fsl,vmpic-msi-v4.3")) {
                 msi->srs_shift = MSIIR1_SRS_SHIFT;
                 msi->ibs_shift = MSIIR1_IBS_SHIFT;
                 if (p)
@@ -566,6 +567,10 @@ static const struct of_device_id fsl_of_msi_ids[] = {
                 .compatible = "fsl,vmpic-msi",
                 .data = &vmpic_msi_feature,
         },
+        {
+                .compatible = "fsl,vmpic-msi-v4.3",
+                .data = &vmpic_msi_feature,
+        },
 #endif
         {}
 };
diff --git a/arch/powerpc/sysdev/fsl_msi.h b/arch/powerpc/sysdev/fsl_msi.h
index df9aa9fe0933..420cfcbdac01 100644
--- a/arch/powerpc/sysdev/fsl_msi.h
+++ b/arch/powerpc/sysdev/fsl_msi.h
@@ -27,6 +27,8 @@
 #define FSL_PIC_IP_IPIC   0x00000002
 #define FSL_PIC_IP_VMPIC  0x00000003
 
+struct fsl_msi_cascade_data;
+
 struct fsl_msi {
         struct irq_domain *irqhost;
 
@@ -37,7 +39,7 @@ struct fsl_msi {
         u32 srs_shift; /* Shift of the shared interrupt register select */
         void __iomem *msi_regs;
         u32 feature;
-        int msi_virqs[NR_MSI_REG_MAX];
+        struct fsl_msi_cascade_data *cascade_array[NR_MSI_REG_MAX];
 
         struct msi_bitmap bitmap;
 
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index c5077673bd94..65d2ed4549e6 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -522,7 +522,8 @@ int fsl_add_bridge(struct platform_device *pdev, int is_primary)
         } else {
                 /* For PCI read PROG to identify controller mode */
                 early_read_config_byte(hose, 0, 0, PCI_CLASS_PROG, &progif);
-                if ((progif & 1) == 1)
+                if ((progif & 1) &&
+                    !of_property_read_bool(dev, "fsl,pci-agent-force-enum"))
                         goto no_bridge;
         }
 
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index be33c9768ea1..89cec0ed6a58 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -960,7 +960,7 @@ void mpic_set_vector(unsigned int virq, unsigned int vector)
         mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI), vecpri);
 }
 
-void mpic_set_destination(unsigned int virq, unsigned int cpuid)
+static void mpic_set_destination(unsigned int virq, unsigned int cpuid)
 {
         struct mpic *mpic = mpic_from_irq(virq);
         unsigned int src = virq_to_hw(virq);
diff --git a/arch/powerpc/sysdev/msi_bitmap.c b/arch/powerpc/sysdev/msi_bitmap.c
index 2ff630267e9e..0c75214b6f92 100644
--- a/arch/powerpc/sysdev/msi_bitmap.c
+++ b/arch/powerpc/sysdev/msi_bitmap.c
@@ -20,32 +20,37 @@ int msi_bitmap_alloc_hwirqs(struct msi_bitmap *bmp, int num)
         int offset, order = get_count_order(num);
 
         spin_lock_irqsave(&bmp->lock, flags);
-        /*
-         * This is fast, but stricter than we need. We might want to add
-         * a fallback routine which does a linear search with no alignment.
-         */
-        offset = bitmap_find_free_region(bmp->bitmap, bmp->irq_count, order);
+
+        offset = bitmap_find_next_zero_area(bmp->bitmap, bmp->irq_count, 0,
+                                            num, (1 << order) - 1);
+        if (offset > bmp->irq_count)
+                goto err;
+
+        bitmap_set(bmp->bitmap, offset, num);
         spin_unlock_irqrestore(&bmp->lock, flags);
 
-        pr_debug("msi_bitmap: allocated 0x%x (2^%d) at offset 0x%x\n",
-                 num, order, offset);
+        pr_debug("msi_bitmap: allocated 0x%x at offset 0x%x\n", num, offset);
 
         return offset;
+err:
+        spin_unlock_irqrestore(&bmp->lock, flags);
+        return -ENOMEM;
 }
+EXPORT_SYMBOL(msi_bitmap_alloc_hwirqs);
 
 void msi_bitmap_free_hwirqs(struct msi_bitmap *bmp, unsigned int offset,
                             unsigned int num)
 {
         unsigned long flags;
-        int order = get_count_order(num);
 
-        pr_debug("msi_bitmap: freeing 0x%x (2^%d) at offset 0x%x\n",
-                 num, order, offset);
+        pr_debug("msi_bitmap: freeing 0x%x at offset 0x%x\n",
+                 num, offset);
 
         spin_lock_irqsave(&bmp->lock, flags);
-        bitmap_release_region(bmp->bitmap, offset, order);
+        bitmap_clear(bmp->bitmap, offset, num);
         spin_unlock_irqrestore(&bmp->lock, flags);
 }
+EXPORT_SYMBOL(msi_bitmap_free_hwirqs);
 
 void msi_bitmap_reserve_hwirq(struct msi_bitmap *bmp, unsigned int hwirq)
 {
@@ -143,7 +148,7 @@ void msi_bitmap_free(struct msi_bitmap *bmp)
 #define check(x)        \
         if (!(x)) printk("msi_bitmap: test failed at line %d\n", __LINE__);
 
-void __init test_basics(void)
+static void __init test_basics(void)
 {
         struct msi_bitmap bmp;
         int i, size = 512;
@@ -180,6 +185,15 @@ void __init test_basics(void)
         msi_bitmap_free_hwirqs(&bmp, size / 2, 1);
         check(msi_bitmap_alloc_hwirqs(&bmp, 1) == size / 2);
 
+        /* Check we get a naturally aligned offset */
+        check(msi_bitmap_alloc_hwirqs(&bmp, 2) % 2 == 0);
+        check(msi_bitmap_alloc_hwirqs(&bmp, 4) % 4 == 0);
+        check(msi_bitmap_alloc_hwirqs(&bmp, 8) % 8 == 0);
+        check(msi_bitmap_alloc_hwirqs(&bmp, 9) % 16 == 0);
+        check(msi_bitmap_alloc_hwirqs(&bmp, 3) % 4 == 0);
+        check(msi_bitmap_alloc_hwirqs(&bmp, 7) % 8 == 0);
+        check(msi_bitmap_alloc_hwirqs(&bmp, 121) % 128 == 0);
+
         msi_bitmap_free(&bmp);
 
         /* Clients may check bitmap == NULL for "not-allocated" */
@@ -188,7 +202,7 @@ void __init test_basics(void)
         kfree(bmp.bitmap);
 }
 
-void __init test_of_node(void)
+static void __init test_of_node(void)
 {
         u32 prop_data[] = { 10, 10, 25, 3, 40, 1, 100, 100, 200, 20 };
         const char *expected_str = "0-9,20-24,28-39,41-99,220-255";
@@ -236,7 +250,7 @@ void __init test_of_node(void)
         kfree(bmp.bitmap);
 }
 
-int __init msi_bitmap_selftest(void)
+static int __init msi_bitmap_selftest(void)
 {
         printk(KERN_DEBUG "Running MSI bitmap self-tests ...\n");
 
diff --git a/arch/powerpc/sysdev/mv64x60_dev.c b/arch/powerpc/sysdev/mv64x60_dev.c
index c2dba7db71ad..026bbc3b2c47 100644
--- a/arch/powerpc/sysdev/mv64x60_dev.c
+++ b/arch/powerpc/sysdev/mv64x60_dev.c
@@ -23,7 +23,7 @@
 
 /* These functions provide the necessary setup for the mv64x60 drivers. */
 
-static struct of_device_id __initdata of_mv64x60_devices[] = {
+static const struct of_device_id of_mv64x60_devices[] __initconst = {
         { .compatible = "marvell,mv64306-devctrl", },
         {}
 };
diff --git a/arch/powerpc/sysdev/pmi.c b/arch/powerpc/sysdev/pmi.c
index 5aaf86c03893..13e67d93a7c1 100644
--- a/arch/powerpc/sysdev/pmi.c
+++ b/arch/powerpc/sysdev/pmi.c
@@ -101,7 +101,7 @@ out:
 }
 
 
-static struct of_device_id pmi_match[] = {
+static const struct of_device_id pmi_match[] = {
         { .type = "ibm,pmi", .name = "ibm,pmi" },
         { .type = "ibm,pmi" },
         {},
diff --git a/arch/powerpc/sysdev/xics/icp-native.c b/arch/powerpc/sysdev/xics/icp-native.c
index de8d9483bbe8..2fc4cf1b7557 100644
--- a/arch/powerpc/sysdev/xics/icp-native.c
+++ b/arch/powerpc/sysdev/xics/icp-native.c
@@ -155,6 +155,31 @@ static void icp_native_cause_ipi(int cpu, unsigned long data)
                 icp_native_set_qirr(cpu, IPI_PRIORITY);
 }
 
+/*
+ * Called when an interrupt is received on an off-line CPU to
+ * clear the interrupt, so that the CPU can go back to nap mode.
+ */
+void icp_native_flush_interrupt(void)
+{
+        unsigned int xirr = icp_native_get_xirr();
+        unsigned int vec = xirr & 0x00ffffff;
+
+        if (vec == XICS_IRQ_SPURIOUS)
+                return;
+        if (vec == XICS_IPI) {
+                /* Clear pending IPI */
+                int cpu = smp_processor_id();
+                kvmppc_set_host_ipi(cpu, 0);
+                icp_native_set_qirr(cpu, 0xff);
+        } else {
+                pr_err("XICS: hw interrupt 0x%x to offline cpu, disabling\n",
+                       vec);
+                xics_mask_unknown_vec(vec);
+        }
+        /* EOI the interrupt */
+        icp_native_set_xirr(xirr);
+}
+
 void xics_wake_cpu(int cpu)
 {
         icp_native_set_qirr(cpu, IPI_PRIORITY);
diff --git a/arch/powerpc/sysdev/xilinx_intc.c b/arch/powerpc/sysdev/xilinx_intc.c
index 83f943a8e0db..56f0524e47a6 100644
--- a/arch/powerpc/sysdev/xilinx_intc.c
+++ b/arch/powerpc/sysdev/xilinx_intc.c
@@ -265,7 +265,7 @@ static void __init xilinx_i8259_setup_cascade(void)
 static inline void xilinx_i8259_setup_cascade(void) { return; }
 #endif /* defined(CONFIG_PPC_I8259) */
 
-static struct of_device_id xilinx_intc_match[] __initconst = {
+static const struct of_device_id xilinx_intc_match[] __initconst = {
         { .compatible = "xlnx,opb-intc-1.00.c", },
         { .compatible = "xlnx,xps-intc-1.00.a", },
         {}
diff --git a/arch/powerpc/sysdev/xilinx_pci.c b/arch/powerpc/sysdev/xilinx_pci.c
index 1453b0eed220..fea5667699ed 100644
--- a/arch/powerpc/sysdev/xilinx_pci.c
+++ b/arch/powerpc/sysdev/xilinx_pci.c
@@ -27,7 +27,7 @@
 
 #define PCI_HOST_ENABLE_CMD PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY
 
-static struct of_device_id xilinx_pci_match[] = {
+static const struct of_device_id xilinx_pci_match[] = {
         { .compatible = "xlnx,plbv46-pci-1.03.a", },
         {}
 };