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authorLinus Torvalds <torvalds@linux-foundation.org>2012-04-04 20:13:43 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-04-04 20:13:43 -0400
commit58bca4a8fa90fcf9069379653b396b2cec642f7f (patch)
tree483c535136b5b168f36326956453e80ce5aa6543 /arch/powerpc/platforms/cell
parent64ebe987311853ea857a244439de5b947a4b1b07 (diff)
parent64d70fe5d3640e1a89790ed21120921278f8cb86 (diff)
Merge branch 'for-linus' of git://git.linaro.org/people/mszyprowski/linux-dma-mapping
Pull DMA mapping branch from Marek Szyprowski: "Short summary for the whole series: A few limitations have been identified in the current dma-mapping design and its implementations for various architectures. There exist more than one function for allocating and freeing the buffers: currently these 3 are used dma_{alloc, free}_coherent, dma_{alloc,free}_writecombine, dma_{alloc,free}_noncoherent. For most of the systems these calls are almost equivalent and can be interchanged. For others, especially the truly non-coherent ones (like ARM), the difference can be easily noticed in overall driver performance. Sadly not all architectures provide implementations for all of them, so the drivers might need to be adapted and cannot be easily shared between different architectures. The provided patches unify all these functions and hide the differences under the already existing dma attributes concept. The thread with more references is available here: http://www.spinics.net/lists/linux-sh/msg09777.html These patches are also a prerequisite for unifying DMA-mapping implementation on ARM architecture with the common one provided by dma_map_ops structure and extending it with IOMMU support. More information is available in the following thread: http://thread.gmane.org/gmane.linux.kernel.cross-arch/12819 More works on dma-mapping framework are planned, especially in the area of buffer sharing and managing the shared mappings (together with the recently introduced dma_buf interface: commit d15bd7ee445d "dma-buf: Introduce dma buffer sharing mechanism"). The patches in the current set introduce a new alloc/free methods (with support for memory attributes) in dma_map_ops structure, which will later replace dma_alloc_coherent and dma_alloc_writecombine functions." People finally started piping up with support for merging this, so I'm merging it as the last of the pending stuff from the merge window. Looks like pohmelfs is going to wait for 3.5 and more external support for merging. * 'for-linus' of git://git.linaro.org/people/mszyprowski/linux-dma-mapping: common: DMA-mapping: add NON-CONSISTENT attribute common: DMA-mapping: add WRITE_COMBINE attribute common: dma-mapping: introduce mmap method common: dma-mapping: remove old alloc_coherent and free_coherent methods Hexagon: adapt for dma_map_ops changes Unicore32: adapt for dma_map_ops changes Microblaze: adapt for dma_map_ops changes SH: adapt for dma_map_ops changes Alpha: adapt for dma_map_ops changes SPARC: adapt for dma_map_ops changes PowerPC: adapt for dma_map_ops changes MIPS: adapt for dma_map_ops changes X86 & IA64: adapt for dma_map_ops changes common: dma-mapping: introduce generic alloc() and free() methods
Diffstat (limited to 'arch/powerpc/platforms/cell')
-rw-r--r--arch/powerpc/platforms/cell/iommu.c16
1 files changed, 9 insertions, 7 deletions
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c
index ae9fc7bc17d6..b9f509a34c01 100644
--- a/arch/powerpc/platforms/cell/iommu.c
+++ b/arch/powerpc/platforms/cell/iommu.c
@@ -564,7 +564,8 @@ static struct iommu_table *cell_get_iommu_table(struct device *dev)
564/* A coherent allocation implies strong ordering */ 564/* A coherent allocation implies strong ordering */
565 565
566static void *dma_fixed_alloc_coherent(struct device *dev, size_t size, 566static void *dma_fixed_alloc_coherent(struct device *dev, size_t size,
567 dma_addr_t *dma_handle, gfp_t flag) 567 dma_addr_t *dma_handle, gfp_t flag,
568 struct dma_attrs *attrs)
568{ 569{
569 if (iommu_fixed_is_weak) 570 if (iommu_fixed_is_weak)
570 return iommu_alloc_coherent(dev, cell_get_iommu_table(dev), 571 return iommu_alloc_coherent(dev, cell_get_iommu_table(dev),
@@ -572,18 +573,19 @@ static void *dma_fixed_alloc_coherent(struct device *dev, size_t size,
572 device_to_mask(dev), flag, 573 device_to_mask(dev), flag,
573 dev_to_node(dev)); 574 dev_to_node(dev));
574 else 575 else
575 return dma_direct_ops.alloc_coherent(dev, size, dma_handle, 576 return dma_direct_ops.alloc(dev, size, dma_handle, flag,
576 flag); 577 attrs);
577} 578}
578 579
579static void dma_fixed_free_coherent(struct device *dev, size_t size, 580static void dma_fixed_free_coherent(struct device *dev, size_t size,
580 void *vaddr, dma_addr_t dma_handle) 581 void *vaddr, dma_addr_t dma_handle,
582 struct dma_attrs *attrs)
581{ 583{
582 if (iommu_fixed_is_weak) 584 if (iommu_fixed_is_weak)
583 iommu_free_coherent(cell_get_iommu_table(dev), size, vaddr, 585 iommu_free_coherent(cell_get_iommu_table(dev), size, vaddr,
584 dma_handle); 586 dma_handle);
585 else 587 else
586 dma_direct_ops.free_coherent(dev, size, vaddr, dma_handle); 588 dma_direct_ops.free(dev, size, vaddr, dma_handle, attrs);
587} 589}
588 590
589static dma_addr_t dma_fixed_map_page(struct device *dev, struct page *page, 591static dma_addr_t dma_fixed_map_page(struct device *dev, struct page *page,
@@ -642,8 +644,8 @@ static int dma_fixed_dma_supported(struct device *dev, u64 mask)
642static int dma_set_mask_and_switch(struct device *dev, u64 dma_mask); 644static int dma_set_mask_and_switch(struct device *dev, u64 dma_mask);
643 645
644struct dma_map_ops dma_iommu_fixed_ops = { 646struct dma_map_ops dma_iommu_fixed_ops = {
645 .alloc_coherent = dma_fixed_alloc_coherent, 647 .alloc = dma_fixed_alloc_coherent,
646 .free_coherent = dma_fixed_free_coherent, 648 .free = dma_fixed_free_coherent,
647 .map_sg = dma_fixed_map_sg, 649 .map_sg = dma_fixed_map_sg,
648 .unmap_sg = dma_fixed_unmap_sg, 650 .unmap_sg = dma_fixed_unmap_sg,
649 .dma_supported = dma_fixed_dma_supported, 651 .dma_supported = dma_fixed_dma_supported,