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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2016-07-05 01:03:49 -0400
committerMichael Ellerman <mpe@ellerman.id.au>2016-07-21 04:56:31 -0400
commitd3cbff1b5a90afe6cb201aa2187c9609e21f92ad (patch)
treef0ced407effcad48705b598ed5618c222d82983a /arch/powerpc/kernel/setup_64.c
parent3808a88985b4f5f5e947c364debce4441a380fb8 (diff)
powerpc: Put exception configuration in a common place
The various calls to establish exception endianness and AIL are now done from a single point using already established CPU and FW feature bits to decide what to do. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/kernel/setup_64.c')
-rw-r--r--arch/powerpc/kernel/setup_64.c56
1 files changed, 42 insertions, 14 deletions
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 155dbcce8ef8..4ffd090633de 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -69,6 +69,7 @@
69#include <asm/kvm_ppc.h> 69#include <asm/kvm_ppc.h>
70#include <asm/hugetlb.h> 70#include <asm/hugetlb.h>
71#include <asm/livepatch.h> 71#include <asm/livepatch.h>
72#include <asm/opal.h>
72 73
73#ifdef DEBUG 74#ifdef DEBUG
74#define DBG(fmt...) udbg_printf(fmt) 75#define DBG(fmt...) udbg_printf(fmt)
@@ -205,23 +206,50 @@ static void fixup_boot_paca(void)
205 get_paca()->data_offset = 0; 206 get_paca()->data_offset = 0;
206} 207}
207 208
208static void cpu_ready_for_interrupts(void) 209static void configure_exceptions(void)
209{ 210{
210 /* Set IR and DR in PACA MSR */
211 get_paca()->kernel_msr = MSR_KERNEL;
212
213 /* 211 /*
214 * Enable AIL if supported, and we are in hypervisor mode. If we are 212 * Setup the trampolines from the lowmem exception vectors
215 * not in hypervisor mode, we enable relocation-on interrupts later 213 * to the kdump kernel when not using a relocatable kernel.
216 * in pSeries_setup_arch() using the H_SET_MODE hcall.
217 */ 214 */
218 if (cpu_has_feature(CPU_FTR_HVMODE) && 215 setup_kdump_trampoline();
219 cpu_has_feature(CPU_FTR_ARCH_207S)) { 216
220 unsigned long lpcr = mfspr(SPRN_LPCR); 217 /* Under a PAPR hypervisor, we need hypercalls */
221 mtspr(SPRN_LPCR, lpcr | LPCR_AIL_3); 218 if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
219 /* Enable AIL if possible */
220 pseries_enable_reloc_on_exc();
221
222 /*
223 * Tell the hypervisor that we want our exceptions to
224 * be taken in little endian mode.
225 *
226 * We don't call this for big endian as our calling convention
227 * makes us always enter in BE, and the call may fail under
228 * some circumstances with kdump.
229 */
230#ifdef __LITTLE_ENDIAN__
231 pseries_little_endian_exceptions();
232#endif
233 } else {
234 /* Set endian mode using OPAL */
235 if (firmware_has_feature(FW_FEATURE_OPAL))
236 opal_configure_cores();
237
238 /* Enable AIL if supported, and we are in hypervisor mode */
239 if (cpu_has_feature(CPU_FTR_HVMODE) &&
240 cpu_has_feature(CPU_FTR_ARCH_207S)) {
241 unsigned long lpcr = mfspr(SPRN_LPCR);
242 mtspr(SPRN_LPCR, lpcr | LPCR_AIL_3);
243 }
222 } 244 }
223} 245}
224 246
247static void cpu_ready_for_interrupts(void)
248{
249 /* Set IR and DR in PACA MSR */
250 get_paca()->kernel_msr = MSR_KERNEL;
251}
252
225/* 253/*
226 * Early initialization entry point. This is called by head.S 254 * Early initialization entry point. This is called by head.S
227 * with MMU translation disabled. We rely on the "feature" of 255 * with MMU translation disabled. We rely on the "feature" of
@@ -277,10 +305,10 @@ void __init early_setup(unsigned long dt_ptr)
277 probe_machine(); 305 probe_machine();
278 306
279 /* 307 /*
280 * Setup the trampolines from the lowmem exception vectors 308 * Configure exception handlers. This include setting up trampolines
281 * to the kdump kernel when not using a relocatable kernel. 309 * if needed, setting exception endian mode, etc...
282 */ 310 */
283 setup_kdump_trampoline(); 311 configure_exceptions();
284 312
285 /* Initialize the hash table or TLB handling */ 313 /* Initialize the hash table or TLB handling */
286 early_init_mmu(); 314 early_init_mmu();