MIPS: Refactor GIC clocksource code.

Reorganize some of the GIC clocksource driver code. Below is a list of
the various changes.

  * No longer select CSRC_GIC by default for Malta platform.
  * Limit choice for either the GIC or R4K clocksource, not both.
  * Change location in Makefile.
  * Created new 'gic_read_count' function in common 'irq-gic.c' file.
  * Change 'git_hpt_read' function in 'csrc-gic.c' to use new function.
  * Surround GIC specific code in Malta platform code with #ifdef's.
  * Only initialize the GIC clocksource if it was selected. Original
    code called it unconditionally if a GIC was found.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>

1 files changed, 24 insertions, 13 deletions

diff --git a/arch/mips/mti-malta/malta-time.c b/arch/mips/mti-malta/malta-time.c
index 381ad062f192..79e5169eabd3 100644
--- a/arch/mips/mti-malta/malta-time.c
+++ b/arch/mips/mti-malta/malta-time.c
@@ -71,7 +71,9 @@ static void __init estimate_frequencies(void)
 {
         unsigned long flags;
         unsigned int count, start;
+#ifdef CONFIG_IRQ_GIC
         unsigned int giccount = 0, gicstart = 0;
+#endif
 
         local_irq_save(flags);
 
@@ -81,26 +83,32 @@ static void __init estimate_frequencies(void)
 
         /* Initialize counters. */
         start = read_c0_count();
+#ifdef CONFIG_IRQ_GIC
         if (gic_present)
                 GICREAD(GIC_REG(SHARED, GIC_SH_COUNTER_31_00), gicstart);
+#endif
 
         /* Read counter exactly on falling edge of update flag. */
         while (CMOS_READ(RTC_REG_A) & RTC_UIP);
         while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
 
         count = read_c0_count();
+#ifdef CONFIG_IRQ_GIC
         if (gic_present)
                 GICREAD(GIC_REG(SHARED, GIC_SH_COUNTER_31_00), giccount);
+#endif
 
         local_irq_restore(flags);
 
         count -= start;
-        if (gic_present)
-                giccount -= gicstart;
-
         mips_hpt_frequency = count;
-        if (gic_present)
+
+#ifdef CONFIG_IRQ_GIC
+        if (gic_present) {
+                giccount -= gicstart;
                 gic_frequency = giccount;
+        }
+#endif
 }
 
 void read_persistent_clock(struct timespec *ts)
@@ -156,24 +164,27 @@ void __init plat_time_init(void)
             (prid != (PRID_COMP_MIPS | PRID_IMP_25KF)))
                 freq *= 2;
         freq = freqround(freq, 5000);
-        pr_debug("CPU frequency %d.%02d MHz\n", freq/1000000,
+        printk("CPU frequency %d.%02d MHz\n", freq/1000000,
                (freq%1000000)*100/1000000);
         cpu_khz = freq / 1000;
 
-        if (gic_present) {
-                freq = freqround(gic_frequency, 5000);
-                pr_debug("GIC frequency %d.%02d MHz\n", freq/1000000,
-                       (freq%1000000)*100/1000000);
-                gic_clocksource_init(gic_frequency);
-        } else
-                init_r4k_clocksource();
+        mips_scroll_message();
 
 #ifdef CONFIG_I8253
         /* Only Malta has a PIT. */
         setup_pit_timer();
 #endif
 
-        mips_scroll_message();
+#ifdef CONFIG_IRQ_GIC
+        if (gic_present) {
+                freq = freqround(gic_frequency, 5000);
+                printk("GIC frequency %d.%02d MHz\n", freq/1000000,
+                       (freq%1000000)*100/1000000);
+#ifdef CONFIG_CSRC_GIC
+                gic_clocksource_init(gic_frequency);
+#endif
+        }
+#endif
 
         plat_perf_setup();
 }