diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2013-01-22 06:59:30 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2013-02-01 04:00:22 -0500 |
commit | 7034228792cc561e79ff8600f02884bd4c80e287 (patch) | |
tree | 89b77af37d087d9de236fc5d21f60bf552d0a2c6 /arch/mips/mti-malta | |
parent | 405ab01c70e18058d9c01a1256769a61fc65413e (diff) |
MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mti-malta')
-rw-r--r-- | arch/mips/mti-malta/malta-amon.c | 6 | ||||
-rw-r--r-- | arch/mips/mti-malta/malta-cmdline.c | 2 | ||||
-rw-r--r-- | arch/mips/mti-malta/malta-display.c | 6 | ||||
-rw-r--r-- | arch/mips/mti-malta/malta-init.c | 14 | ||||
-rw-r--r-- | arch/mips/mti-malta/malta-int.c | 40 | ||||
-rw-r--r-- | arch/mips/mti-malta/malta-memory.c | 4 | ||||
-rw-r--r-- | arch/mips/mti-malta/malta-pci.c | 6 | ||||
-rw-r--r-- | arch/mips/mti-malta/malta-platform.c | 2 | ||||
-rw-r--r-- | arch/mips/mti-malta/malta-setup.c | 4 | ||||
-rw-r--r-- | arch/mips/mti-malta/malta-smtc.c | 2 | ||||
-rw-r--r-- | arch/mips/mti-malta/malta-time.c | 8 |
11 files changed, 47 insertions, 47 deletions
diff --git a/arch/mips/mti-malta/malta-amon.c b/arch/mips/mti-malta/malta-amon.c index 469d9b0cee6d..1e4784458016 100644 --- a/arch/mips/mti-malta/malta-amon.c +++ b/arch/mips/mti-malta/malta-amon.c | |||
@@ -70,12 +70,12 @@ void amon_cpu_start(int cpu, | |||
70 | launch->sp = sp; | 70 | launch->sp = sp; |
71 | launch->a0 = a0; | 71 | launch->a0 = a0; |
72 | 72 | ||
73 | smp_wmb(); /* Target must see parameters before go */ | 73 | smp_wmb(); /* Target must see parameters before go */ |
74 | launch->flags |= LAUNCH_FGO; | 74 | launch->flags |= LAUNCH_FGO; |
75 | smp_wmb(); /* Target must see go before we poll */ | 75 | smp_wmb(); /* Target must see go before we poll */ |
76 | 76 | ||
77 | while ((launch->flags & LAUNCH_FGONE) == 0) | 77 | while ((launch->flags & LAUNCH_FGONE) == 0) |
78 | ; | 78 | ; |
79 | smp_rmb(); /* Target will be updating flags soon */ | 79 | smp_rmb(); /* Target will be updating flags soon */ |
80 | pr_debug("launch: cpu%d gone!\n", cpu); | 80 | pr_debug("launch: cpu%d gone!\n", cpu); |
81 | } | 81 | } |
diff --git a/arch/mips/mti-malta/malta-cmdline.c b/arch/mips/mti-malta/malta-cmdline.c index 1871c30ed2eb..5576a306a145 100644 --- a/arch/mips/mti-malta/malta-cmdline.c +++ b/arch/mips/mti-malta/malta-cmdline.c | |||
@@ -46,7 +46,7 @@ void __init prom_init_cmdline(void) | |||
46 | 46 | ||
47 | cp = &(arcs_cmdline[0]); | 47 | cp = &(arcs_cmdline[0]); |
48 | while(actr < prom_argc) { | 48 | while(actr < prom_argc) { |
49 | strcpy(cp, prom_argv(actr)); | 49 | strcpy(cp, prom_argv(actr)); |
50 | cp += strlen(prom_argv(actr)); | 50 | cp += strlen(prom_argv(actr)); |
51 | *cp++ = ' '; | 51 | *cp++ = ' '; |
52 | actr++; | 52 | actr++; |
diff --git a/arch/mips/mti-malta/malta-display.c b/arch/mips/mti-malta/malta-display.c index 7c8828fcb0ad..9bc58a24e80a 100644 --- a/arch/mips/mti-malta/malta-display.c +++ b/arch/mips/mti-malta/malta-display.c | |||
@@ -37,10 +37,10 @@ void mips_display_message(const char *str) | |||
37 | display = ioremap(ASCII_DISPLAY_POS_BASE, 16*sizeof(int)); | 37 | display = ioremap(ASCII_DISPLAY_POS_BASE, 16*sizeof(int)); |
38 | 38 | ||
39 | for (i = 0; i <= 14; i=i+2) { | 39 | for (i = 0; i <= 14; i=i+2) { |
40 | if (*str) | 40 | if (*str) |
41 | __raw_writel(*str++, display + i); | 41 | __raw_writel(*str++, display + i); |
42 | else | 42 | else |
43 | __raw_writel(' ', display + i); | 43 | __raw_writel(' ', display + i); |
44 | } | 44 | } |
45 | } | 45 | } |
46 | 46 | ||
diff --git a/arch/mips/mti-malta/malta-init.c b/arch/mips/mti-malta/malta-init.c index 27a6cdb36e37..c2cbce9e435e 100644 --- a/arch/mips/mti-malta/malta-init.c +++ b/arch/mips/mti-malta/malta-init.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 1999, 2000, 2004, 2005 MIPS Technologies, Inc. | 2 | * Copyright (C) 1999, 2000, 2004, 2005 MIPS Technologies, Inc. |
3 | * All rights reserved. | 3 | * All rights reserved. |
4 | * Authors: Carsten Langgaard <carstenl@mips.com> | 4 | * Authors: Carsten Langgaard <carstenl@mips.com> |
5 | * Maciej W. Rozycki <macro@mips.com> | 5 | * Maciej W. Rozycki <macro@mips.com> |
@@ -110,20 +110,20 @@ static inline void str2eaddr(unsigned char *ea, unsigned char *str) | |||
110 | 110 | ||
111 | int get_ethernet_addr(char *ethernet_addr) | 111 | int get_ethernet_addr(char *ethernet_addr) |
112 | { | 112 | { |
113 | char *ethaddr_str; | 113 | char *ethaddr_str; |
114 | 114 | ||
115 | ethaddr_str = prom_getenv("ethaddr"); | 115 | ethaddr_str = prom_getenv("ethaddr"); |
116 | if (!ethaddr_str) { | 116 | if (!ethaddr_str) { |
117 | printk("ethaddr not set in boot prom\n"); | 117 | printk("ethaddr not set in boot prom\n"); |
118 | return -1; | 118 | return -1; |
119 | } | 119 | } |
120 | str2eaddr(ethernet_addr, ethaddr_str); | 120 | str2eaddr(ethernet_addr, ethaddr_str); |
121 | 121 | ||
122 | if (init_debug > 1) { | 122 | if (init_debug > 1) { |
123 | int i; | 123 | int i; |
124 | printk("get_ethernet_addr: "); | 124 | printk("get_ethernet_addr: "); |
125 | for (i=0; i<5; i++) | 125 | for (i=0; i<5; i++) |
126 | printk("%02x:", (unsigned char)*(ethernet_addr+i)); | 126 | printk("%02x:", (unsigned char)*(ethernet_addr+i)); |
127 | printk("%02x\n", *(ethernet_addr+i)); | 127 | printk("%02x\n", *(ethernet_addr+i)); |
128 | } | 128 | } |
129 | 129 | ||
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c index 647b86383184..e364af70e6cf 100644 --- a/arch/mips/mti-malta/malta-int.c +++ b/arch/mips/mti-malta/malta-int.c | |||
@@ -84,10 +84,10 @@ static inline int mips_pcibios_iack(void) | |||
84 | 84 | ||
85 | /* Flush Bonito register block */ | 85 | /* Flush Bonito register block */ |
86 | (void) BONITO_PCIMAP_CFG; | 86 | (void) BONITO_PCIMAP_CFG; |
87 | iob(); /* sync */ | 87 | iob(); /* sync */ |
88 | 88 | ||
89 | irq = __raw_readl((u32 *)_pcictrl_bonito_pcicfg); | 89 | irq = __raw_readl((u32 *)_pcictrl_bonito_pcicfg); |
90 | iob(); /* sync */ | 90 | iob(); /* sync */ |
91 | irq &= 0xff; | 91 | irq &= 0xff; |
92 | BONITO_PCIMAP_CFG = 0; | 92 | BONITO_PCIMAP_CFG = 0; |
93 | break; | 93 | break; |
@@ -136,7 +136,7 @@ static void malta_ipi_irqdispatch(void) | |||
136 | 136 | ||
137 | irq = gic_get_int(); | 137 | irq = gic_get_int(); |
138 | if (irq < 0) | 138 | if (irq < 0) |
139 | return; /* interrupt has already been cleared */ | 139 | return; /* interrupt has already been cleared */ |
140 | 140 | ||
141 | do_IRQ(MIPS_GIC_IRQ_BASE + irq); | 141 | do_IRQ(MIPS_GIC_IRQ_BASE + irq); |
142 | } | 142 | } |
@@ -149,7 +149,7 @@ static void corehi_irqdispatch(void) | |||
149 | struct pt_regs *regs = get_irq_regs(); | 149 | struct pt_regs *regs = get_irq_regs(); |
150 | 150 | ||
151 | printk(KERN_EMERG "CoreHI interrupt, shouldn't happen, we die here!\n"); | 151 | printk(KERN_EMERG "CoreHI interrupt, shouldn't happen, we die here!\n"); |
152 | printk(KERN_EMERG "epc : %08lx\nStatus: %08lx\n" | 152 | printk(KERN_EMERG "epc : %08lx\nStatus: %08lx\n" |
153 | "Cause : %08lx\nbadVaddr : %08lx\n", | 153 | "Cause : %08lx\nbadVaddr : %08lx\n", |
154 | regs->cp0_epc, regs->cp0_status, | 154 | regs->cp0_epc, regs->cp0_status, |
155 | regs->cp0_cause, regs->cp0_badvaddr); | 155 | regs->cp0_cause, regs->cp0_badvaddr); |
@@ -249,20 +249,20 @@ static inline unsigned int irq_ffs(unsigned int pending) | |||
249 | * on hardware interrupt 0 (MIPS IRQ 2)) like: | 249 | * on hardware interrupt 0 (MIPS IRQ 2)) like: |
250 | * | 250 | * |
251 | * MIPS IRQ Source | 251 | * MIPS IRQ Source |
252 | * -------- ------ | 252 | * -------- ------ |
253 | * 0 Software (ignored) | 253 | * 0 Software (ignored) |
254 | * 1 Software (ignored) | 254 | * 1 Software (ignored) |
255 | * 2 Combined hardware interrupt (hw0) | 255 | * 2 Combined hardware interrupt (hw0) |
256 | * 3 Hardware (ignored) | 256 | * 3 Hardware (ignored) |
257 | * 4 Hardware (ignored) | 257 | * 4 Hardware (ignored) |
258 | * 5 Hardware (ignored) | 258 | * 5 Hardware (ignored) |
259 | * 6 Hardware (ignored) | 259 | * 6 Hardware (ignored) |
260 | * 7 R4k timer (what we use) | 260 | * 7 R4k timer (what we use) |
261 | * | 261 | * |
262 | * We handle the IRQ according to _our_ priority which is: | 262 | * We handle the IRQ according to _our_ priority which is: |
263 | * | 263 | * |
264 | * Highest ---- R4k Timer | 264 | * Highest ---- R4k Timer |
265 | * Lowest ---- Combined hardware interrupt | 265 | * Lowest ---- Combined hardware interrupt |
266 | * | 266 | * |
267 | * then we just return, if multiple IRQs are pending then we will just take | 267 | * then we just return, if multiple IRQs are pending then we will just take |
268 | * another exception, big deal. | 268 | * another exception, big deal. |
@@ -396,7 +396,7 @@ static int __initdata msc_nr_eicirqs = ARRAY_SIZE(msc_eicirqmap); | |||
396 | 396 | ||
397 | static struct gic_intr_map gic_intr_map[GIC_NUM_INTRS] = { | 397 | static struct gic_intr_map gic_intr_map[GIC_NUM_INTRS] = { |
398 | { X, X, X, X, 0 }, | 398 | { X, X, X, X, 0 }, |
399 | { X, X, X, X, 0 }, | 399 | { X, X, X, X, 0 }, |
400 | { X, X, X, X, 0 }, | 400 | { X, X, X, X, 0 }, |
401 | { 0, GIC_CPU_INT0, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, | 401 | { 0, GIC_CPU_INT0, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, |
402 | { 0, GIC_CPU_INT1, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, | 402 | { 0, GIC_CPU_INT1, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, |
@@ -410,7 +410,7 @@ static struct gic_intr_map gic_intr_map[GIC_NUM_INTRS] = { | |||
410 | { 0, GIC_CPU_INT3, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, | 410 | { 0, GIC_CPU_INT3, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, |
411 | { 0, GIC_CPU_NMI, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, | 411 | { 0, GIC_CPU_NMI, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, |
412 | { 0, GIC_CPU_NMI, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, | 412 | { 0, GIC_CPU_NMI, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, |
413 | { X, X, X, X, 0 }, | 413 | { X, X, X, X, 0 }, |
414 | /* The remainder of this table is initialised by fill_ipi_map */ | 414 | /* The remainder of this table is initialised by fill_ipi_map */ |
415 | }; | 415 | }; |
416 | #undef X | 416 | #undef X |
@@ -634,7 +634,7 @@ void malta_be_init(void) | |||
634 | 634 | ||
635 | static char *tr[8] = { | 635 | static char *tr[8] = { |
636 | "mem", "gcr", "gic", "mmio", | 636 | "mem", "gcr", "gic", "mmio", |
637 | "0x04", "0x05", "0x06", "0x07" | 637 | "0x04", "0x05", "0x06", "0x07" |
638 | }; | 638 | }; |
639 | 639 | ||
640 | static char *mcmd[32] = { | 640 | static char *mcmd[32] = { |
@@ -673,10 +673,10 @@ static char *mcmd[32] = { | |||
673 | }; | 673 | }; |
674 | 674 | ||
675 | static char *core[8] = { | 675 | static char *core[8] = { |
676 | "Invalid/OK", "Invalid/Data", | 676 | "Invalid/OK", "Invalid/Data", |
677 | "Shared/OK", "Shared/Data", | 677 | "Shared/OK", "Shared/Data", |
678 | "Modified/OK", "Modified/Data", | 678 | "Modified/OK", "Modified/Data", |
679 | "Exclusive/OK", "Exclusive/Data" | 679 | "Exclusive/OK", "Exclusive/Data" |
680 | }; | 680 | }; |
681 | 681 | ||
682 | static char *causes[32] = { | 682 | static char *causes[32] = { |
diff --git a/arch/mips/mti-malta/malta-memory.c b/arch/mips/mti-malta/malta-memory.c index a96d281f9221..f3d43aa023a9 100644 --- a/arch/mips/mti-malta/malta-memory.c +++ b/arch/mips/mti-malta/malta-memory.c | |||
@@ -47,7 +47,7 @@ static char *mtypes[3] = { | |||
47 | }; | 47 | }; |
48 | #endif | 48 | #endif |
49 | 49 | ||
50 | /* determined physical memory size, not overridden by command line args */ | 50 | /* determined physical memory size, not overridden by command line args */ |
51 | unsigned long physical_memsize = 0L; | 51 | unsigned long physical_memsize = 0L; |
52 | 52 | ||
53 | static struct prom_pmemblock * __init prom_getmdesc(void) | 53 | static struct prom_pmemblock * __init prom_getmdesc(void) |
@@ -158,7 +158,7 @@ void __init prom_meminit(void) | |||
158 | size = p->size; | 158 | size = p->size; |
159 | 159 | ||
160 | add_memory_region(base, size, type); | 160 | add_memory_region(base, size, type); |
161 | p++; | 161 | p++; |
162 | } | 162 | } |
163 | } | 163 | } |
164 | 164 | ||
diff --git a/arch/mips/mti-malta/malta-pci.c b/arch/mips/mti-malta/malta-pci.c index 2147cb34e705..37134ddfeaa5 100644 --- a/arch/mips/mti-malta/malta-pci.c +++ b/arch/mips/mti-malta/malta-pci.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 1999, 2000, 2004, 2005 MIPS Technologies, Inc. | 2 | * Copyright (C) 1999, 2000, 2004, 2005 MIPS Technologies, Inc. |
3 | * All rights reserved. | 3 | * All rights reserved. |
4 | * Authors: Carsten Langgaard <carstenl@mips.com> | 4 | * Authors: Carsten Langgaard <carstenl@mips.com> |
5 | * Maciej W. Rozycki <macro@mips.com> | 5 | * Maciej W. Rozycki <macro@mips.com> |
@@ -127,7 +127,7 @@ void __init mips_pcibios_init(void) | |||
127 | map = map1; | 127 | map = map1; |
128 | } | 128 | } |
129 | mask = ~(start ^ end); | 129 | mask = ~(start ^ end); |
130 | /* We don't support remapping with a discontiguous mask. */ | 130 | /* We don't support remapping with a discontiguous mask. */ |
131 | BUG_ON((start & GT_PCI_HD_MSK) != (map & GT_PCI_HD_MSK) && | 131 | BUG_ON((start & GT_PCI_HD_MSK) != (map & GT_PCI_HD_MSK) && |
132 | mask != ~((mask & -mask) - 1)); | 132 | mask != ~((mask & -mask) - 1)); |
133 | gt64120_mem_resource.start = start; | 133 | gt64120_mem_resource.start = start; |
@@ -144,7 +144,7 @@ void __init mips_pcibios_init(void) | |||
144 | map = GT_READ(GT_PCI0IOREMAP_OFS); | 144 | map = GT_READ(GT_PCI0IOREMAP_OFS); |
145 | end = (end & GT_PCI_HD_MSK) | (start & ~GT_PCI_HD_MSK); | 145 | end = (end & GT_PCI_HD_MSK) | (start & ~GT_PCI_HD_MSK); |
146 | mask = ~(start ^ end); | 146 | mask = ~(start ^ end); |
147 | /* We don't support remapping with a discontiguous mask. */ | 147 | /* We don't support remapping with a discontiguous mask. */ |
148 | BUG_ON((start & GT_PCI_HD_MSK) != (map & GT_PCI_HD_MSK) && | 148 | BUG_ON((start & GT_PCI_HD_MSK) != (map & GT_PCI_HD_MSK) && |
149 | mask != ~((mask & -mask) - 1)); | 149 | mask != ~((mask & -mask) - 1)); |
150 | gt64120_io_resource.start = map & mask; | 150 | gt64120_io_resource.start = map & mask; |
diff --git a/arch/mips/mti-malta/malta-platform.c b/arch/mips/mti-malta/malta-platform.c index 74732177851c..132f8663825e 100644 --- a/arch/mips/mti-malta/malta-platform.c +++ b/arch/mips/mti-malta/malta-platform.c | |||
@@ -93,7 +93,7 @@ static struct mtd_partition malta_mtd_partitions[] = { | |||
93 | .mask_flags = MTD_WRITEABLE | 93 | .mask_flags = MTD_WRITEABLE |
94 | }, { | 94 | }, { |
95 | .name = "User FS", | 95 | .name = "User FS", |
96 | .offset = 0x100000, | 96 | .offset = 0x100000, |
97 | .size = 0x2e0000 | 97 | .size = 0x2e0000 |
98 | }, { | 98 | }, { |
99 | .name = "Board Config", | 99 | .name = "Board Config", |
diff --git a/arch/mips/mti-malta/malta-setup.c b/arch/mips/mti-malta/malta-setup.c index 2e28f653f66d..200f64df2c9b 100644 --- a/arch/mips/mti-malta/malta-setup.c +++ b/arch/mips/mti-malta/malta-setup.c | |||
@@ -78,9 +78,9 @@ const char *get_system_type(void) | |||
78 | } | 78 | } |
79 | 79 | ||
80 | #if defined(CONFIG_MIPS_MT_SMTC) | 80 | #if defined(CONFIG_MIPS_MT_SMTC) |
81 | const char display_string[] = " SMTC LINUX ON MALTA "; | 81 | const char display_string[] = " SMTC LINUX ON MALTA "; |
82 | #else | 82 | #else |
83 | const char display_string[] = " LINUX ON MALTA "; | 83 | const char display_string[] = " LINUX ON MALTA "; |
84 | #endif /* CONFIG_MIPS_MT_SMTC */ | 84 | #endif /* CONFIG_MIPS_MT_SMTC */ |
85 | 85 | ||
86 | #ifdef CONFIG_BLK_DEV_FD | 86 | #ifdef CONFIG_BLK_DEV_FD |
diff --git a/arch/mips/mti-malta/malta-smtc.c b/arch/mips/mti-malta/malta-smtc.c index 1efc8c394486..becbf47506a5 100644 --- a/arch/mips/mti-malta/malta-smtc.c +++ b/arch/mips/mti-malta/malta-smtc.c | |||
@@ -126,7 +126,7 @@ int plat_set_irq_affinity(struct irq_data *d, const struct cpumask *affinity, | |||
126 | * to the CPU daughterboard, and on the CoreFPGA2/3 34K models, | 126 | * to the CPU daughterboard, and on the CoreFPGA2/3 34K models, |
127 | * that signal is brought to IP2 of both VPEs. To avoid racing | 127 | * that signal is brought to IP2 of both VPEs. To avoid racing |
128 | * concurrent interrupt service events, IP2 is enabled only on | 128 | * concurrent interrupt service events, IP2 is enabled only on |
129 | * one VPE, by convention VPE0. So long as no bits are ever | 129 | * one VPE, by convention VPE0. So long as no bits are ever |
130 | * cleared in the affinity mask, there will never be any | 130 | * cleared in the affinity mask, there will never be any |
131 | * interrupt forwarding. But as soon as a program or operator | 131 | * interrupt forwarding. But as soon as a program or operator |
132 | * sets affinity for one of the related IRQs, we need to make | 132 | * sets affinity for one of the related IRQs, we need to make |
diff --git a/arch/mips/mti-malta/malta-time.c b/arch/mips/mti-malta/malta-time.c index 115f5bc06003..8607b0dd29f6 100644 --- a/arch/mips/mti-malta/malta-time.c +++ b/arch/mips/mti-malta/malta-time.c | |||
@@ -95,7 +95,7 @@ static unsigned int __init estimate_cpu_frequency(void) | |||
95 | (prid != (PRID_COMP_MIPS | PRID_IMP_25KF))) | 95 | (prid != (PRID_COMP_MIPS | PRID_IMP_25KF))) |
96 | count *= 2; | 96 | count *= 2; |
97 | 97 | ||
98 | count += 5000; /* round */ | 98 | count += 5000; /* round */ |
99 | count -= count%10000; | 99 | count -= count%10000; |
100 | 100 | ||
101 | return count; | 101 | return count; |
@@ -146,15 +146,15 @@ void __init plat_time_init(void) | |||
146 | { | 146 | { |
147 | unsigned int est_freq; | 147 | unsigned int est_freq; |
148 | 148 | ||
149 | /* Set Data mode - binary. */ | 149 | /* Set Data mode - binary. */ |
150 | CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL); | 150 | CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL); |
151 | 151 | ||
152 | est_freq = estimate_cpu_frequency(); | 152 | est_freq = estimate_cpu_frequency(); |
153 | 153 | ||
154 | printk("CPU frequency %d.%02d MHz\n", est_freq/1000000, | 154 | printk("CPU frequency %d.%02d MHz\n", est_freq/1000000, |
155 | (est_freq%1000000)*100/1000000); | 155 | (est_freq%1000000)*100/1000000); |
156 | 156 | ||
157 | cpu_khz = est_freq / 1000; | 157 | cpu_khz = est_freq / 1000; |
158 | 158 | ||
159 | mips_scroll_message(); | 159 | mips_scroll_message(); |
160 | #ifdef CONFIG_I8253 /* Only Malta has a PIT */ | 160 | #ifdef CONFIG_I8253 /* Only Malta has a PIT */ |