diff options
author | David Daney <david.daney@cavium.com> | 2013-06-10 15:33:48 -0400 |
---|---|---|
committer | Gleb Natapov <gleb@redhat.com> | 2013-06-11 04:07:38 -0400 |
commit | 681865d48e867a4fb55ff0516e2aa1cee3e4f343 (patch) | |
tree | 603c3595c521203ecfc4b9b831ed54f217230700 /arch/mips/kvm | |
parent | 2a8fedd0c142d4328ab4667847e05afe17c3295c (diff) |
mips/kvm: Use KVM_REG_MIPS and proper size indicators for *_ONE_REG
The API requires that the GET_ONE_REG and SET_ONE_REG ioctls have this
extra information encoded in the register identifiers.
Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Gleb Natapov <gleb@redhat.com>
Diffstat (limited to 'arch/mips/kvm')
-rw-r--r-- | arch/mips/kvm/kvm_mips.c | 83 |
1 files changed, 54 insertions, 29 deletions
diff --git a/arch/mips/kvm/kvm_mips.c b/arch/mips/kvm/kvm_mips.c index d934b017f479..dd203e59e6fd 100644 --- a/arch/mips/kvm/kvm_mips.c +++ b/arch/mips/kvm/kvm_mips.c | |||
@@ -485,29 +485,35 @@ kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu, | |||
485 | return -ENOIOCTLCMD; | 485 | return -ENOIOCTLCMD; |
486 | } | 486 | } |
487 | 487 | ||
488 | #define KVM_REG_MIPS_CP0_INDEX (0x10000 + 8 * 0 + 0) | 488 | #define MIPS_CP0_32(_R, _S) \ |
489 | #define KVM_REG_MIPS_CP0_ENTRYLO0 (0x10000 + 8 * 2 + 0) | 489 | (KVM_REG_MIPS | KVM_REG_SIZE_U32 | 0x10000 | (8 * (_R) + (_S))) |
490 | #define KVM_REG_MIPS_CP0_ENTRYLO1 (0x10000 + 8 * 3 + 0) | 490 | |
491 | #define KVM_REG_MIPS_CP0_CONTEXT (0x10000 + 8 * 4 + 0) | 491 | #define MIPS_CP0_64(_R, _S) \ |
492 | #define KVM_REG_MIPS_CP0_USERLOCAL (0x10000 + 8 * 4 + 2) | 492 | (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 0x10000 | (8 * (_R) + (_S))) |
493 | #define KVM_REG_MIPS_CP0_PAGEMASK (0x10000 + 8 * 5 + 0) | 493 | |
494 | #define KVM_REG_MIPS_CP0_PAGEGRAIN (0x10000 + 8 * 5 + 1) | 494 | #define KVM_REG_MIPS_CP0_INDEX MIPS_CP0_32(0, 0) |
495 | #define KVM_REG_MIPS_CP0_WIRED (0x10000 + 8 * 6 + 0) | 495 | #define KVM_REG_MIPS_CP0_ENTRYLO0 MIPS_CP0_64(2, 0) |
496 | #define KVM_REG_MIPS_CP0_HWRENA (0x10000 + 8 * 7 + 0) | 496 | #define KVM_REG_MIPS_CP0_ENTRYLO1 MIPS_CP0_64(3, 0) |
497 | #define KVM_REG_MIPS_CP0_BADVADDR (0x10000 + 8 * 8 + 0) | 497 | #define KVM_REG_MIPS_CP0_CONTEXT MIPS_CP0_64(4, 0) |
498 | #define KVM_REG_MIPS_CP0_COUNT (0x10000 + 8 * 9 + 0) | 498 | #define KVM_REG_MIPS_CP0_USERLOCAL MIPS_CP0_64(4, 2) |
499 | #define KVM_REG_MIPS_CP0_ENTRYHI (0x10000 + 8 * 10 + 0) | 499 | #define KVM_REG_MIPS_CP0_PAGEMASK MIPS_CP0_32(5, 0) |
500 | #define KVM_REG_MIPS_CP0_COMPARE (0x10000 + 8 * 11 + 0) | 500 | #define KVM_REG_MIPS_CP0_PAGEGRAIN MIPS_CP0_32(5, 1) |
501 | #define KVM_REG_MIPS_CP0_STATUS (0x10000 + 8 * 12 + 0) | 501 | #define KVM_REG_MIPS_CP0_WIRED MIPS_CP0_32(6, 0) |
502 | #define KVM_REG_MIPS_CP0_CAUSE (0x10000 + 8 * 13 + 0) | 502 | #define KVM_REG_MIPS_CP0_HWRENA MIPS_CP0_32(7, 0) |
503 | #define KVM_REG_MIPS_CP0_EBASE (0x10000 + 8 * 15 + 1) | 503 | #define KVM_REG_MIPS_CP0_BADVADDR MIPS_CP0_64(8, 0) |
504 | #define KVM_REG_MIPS_CP0_CONFIG (0x10000 + 8 * 16 + 0) | 504 | #define KVM_REG_MIPS_CP0_COUNT MIPS_CP0_32(9, 0) |
505 | #define KVM_REG_MIPS_CP0_CONFIG1 (0x10000 + 8 * 16 + 1) | 505 | #define KVM_REG_MIPS_CP0_ENTRYHI MIPS_CP0_64(10, 0) |
506 | #define KVM_REG_MIPS_CP0_CONFIG2 (0x10000 + 8 * 16 + 2) | 506 | #define KVM_REG_MIPS_CP0_COMPARE MIPS_CP0_32(11, 0) |
507 | #define KVM_REG_MIPS_CP0_CONFIG3 (0x10000 + 8 * 16 + 3) | 507 | #define KVM_REG_MIPS_CP0_STATUS MIPS_CP0_32(12, 0) |
508 | #define KVM_REG_MIPS_CP0_CONFIG7 (0x10000 + 8 * 16 + 7) | 508 | #define KVM_REG_MIPS_CP0_CAUSE MIPS_CP0_32(13, 0) |
509 | #define KVM_REG_MIPS_CP0_XCONTEXT (0x10000 + 8 * 20 + 0) | 509 | #define KVM_REG_MIPS_CP0_EBASE MIPS_CP0_64(15, 1) |
510 | #define KVM_REG_MIPS_CP0_ERROREPC (0x10000 + 8 * 30 + 0) | 510 | #define KVM_REG_MIPS_CP0_CONFIG MIPS_CP0_32(16, 0) |
511 | #define KVM_REG_MIPS_CP0_CONFIG1 MIPS_CP0_32(16, 1) | ||
512 | #define KVM_REG_MIPS_CP0_CONFIG2 MIPS_CP0_32(16, 2) | ||
513 | #define KVM_REG_MIPS_CP0_CONFIG3 MIPS_CP0_32(16, 3) | ||
514 | #define KVM_REG_MIPS_CP0_CONFIG7 MIPS_CP0_32(16, 7) | ||
515 | #define KVM_REG_MIPS_CP0_XCONTEXT MIPS_CP0_64(20, 0) | ||
516 | #define KVM_REG_MIPS_CP0_ERROREPC MIPS_CP0_64(30, 0) | ||
511 | 517 | ||
512 | static u64 kvm_mips_get_one_regs[] = { | 518 | static u64 kvm_mips_get_one_regs[] = { |
513 | KVM_REG_MIPS_R0, | 519 | KVM_REG_MIPS_R0, |
@@ -567,8 +573,6 @@ static u64 kvm_mips_get_one_regs[] = { | |||
567 | static int kvm_mips_get_reg(struct kvm_vcpu *vcpu, | 573 | static int kvm_mips_get_reg(struct kvm_vcpu *vcpu, |
568 | const struct kvm_one_reg *reg) | 574 | const struct kvm_one_reg *reg) |
569 | { | 575 | { |
570 | u64 __user *uaddr = (u64 __user *)(long)reg->addr; | ||
571 | |||
572 | struct mips_coproc *cop0 = vcpu->arch.cop0; | 576 | struct mips_coproc *cop0 = vcpu->arch.cop0; |
573 | s64 v; | 577 | s64 v; |
574 | 578 | ||
@@ -631,18 +635,39 @@ static int kvm_mips_get_reg(struct kvm_vcpu *vcpu, | |||
631 | default: | 635 | default: |
632 | return -EINVAL; | 636 | return -EINVAL; |
633 | } | 637 | } |
634 | return put_user(v, uaddr); | 638 | if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) { |
639 | u64 __user *uaddr64 = (u64 __user *)(long)reg->addr; | ||
640 | return put_user(v, uaddr64); | ||
641 | } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) { | ||
642 | u32 __user *uaddr32 = (u32 __user *)(long)reg->addr; | ||
643 | u32 v32 = (u32)v; | ||
644 | return put_user(v32, uaddr32); | ||
645 | } else { | ||
646 | return -EINVAL; | ||
647 | } | ||
635 | } | 648 | } |
636 | 649 | ||
637 | static int kvm_mips_set_reg(struct kvm_vcpu *vcpu, | 650 | static int kvm_mips_set_reg(struct kvm_vcpu *vcpu, |
638 | const struct kvm_one_reg *reg) | 651 | const struct kvm_one_reg *reg) |
639 | { | 652 | { |
640 | u64 __user *uaddr = (u64 __user *)(long)reg->addr; | ||
641 | struct mips_coproc *cop0 = vcpu->arch.cop0; | 653 | struct mips_coproc *cop0 = vcpu->arch.cop0; |
642 | u64 v; | 654 | u64 v; |
643 | 655 | ||
644 | if (get_user(v, uaddr) != 0) | 656 | if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) { |
645 | return -EFAULT; | 657 | u64 __user *uaddr64 = (u64 __user *)(long)reg->addr; |
658 | |||
659 | if (get_user(v, uaddr64) != 0) | ||
660 | return -EFAULT; | ||
661 | } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) { | ||
662 | u32 __user *uaddr32 = (u32 __user *)(long)reg->addr; | ||
663 | s32 v32; | ||
664 | |||
665 | if (get_user(v32, uaddr32) != 0) | ||
666 | return -EFAULT; | ||
667 | v = (s64)v32; | ||
668 | } else { | ||
669 | return -EINVAL; | ||
670 | } | ||
646 | 671 | ||
647 | switch (reg->id) { | 672 | switch (reg->id) { |
648 | case KVM_REG_MIPS_R0: | 673 | case KVM_REG_MIPS_R0: |