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authorSantosh Shilimkar <santosh.shilimkar@ti.com>2013-02-06 07:24:39 -0500
committerSantosh Shilimkar <santosh.shilimkar@ti.com>2013-03-19 03:27:01 -0400
commitda0e02a1e4a6348505cfe0cbb0d3a2717a2b5476 (patch)
tree7967afab81bc62aac20bcd91657aa4962b86d740 /arch/arm
parent077173c0aaac62aef6f55a841f03c7d7001958ab (diff)
ARM: OMAP5: Update SAR RAM base address
Update SAR RAM base address for OMAP5 based devices. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-omap2/omap4-common.c10
-rw-r--r--arch/arm/mach-omap2/omap54xx.h1
2 files changed, 9 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 708bb115a27f..2aeb928efdfd 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -240,15 +240,21 @@ void __iomem *omap4_get_sar_ram_base(void)
240 */ 240 */
241static int __init omap4_sar_ram_init(void) 241static int __init omap4_sar_ram_init(void)
242{ 242{
243 unsigned long sar_base;
244
243 /* 245 /*
244 * To avoid code running on other OMAPs in 246 * To avoid code running on other OMAPs in
245 * multi-omap builds 247 * multi-omap builds
246 */ 248 */
247 if (!cpu_is_omap44xx()) 249 if (cpu_is_omap44xx())
250 sar_base = OMAP44XX_SAR_RAM_BASE;
251 else if (soc_is_omap54xx())
252 sar_base = OMAP54XX_SAR_RAM_BASE;
253 else
248 return -ENOMEM; 254 return -ENOMEM;
249 255
250 /* Static mapping, never released */ 256 /* Static mapping, never released */
251 sar_ram_base = ioremap(OMAP44XX_SAR_RAM_BASE, SZ_16K); 257 sar_ram_base = ioremap(sar_base, SZ_16K);
252 if (WARN_ON(!sar_ram_base)) 258 if (WARN_ON(!sar_ram_base))
253 return -ENOMEM; 259 return -ENOMEM;
254 260
diff --git a/arch/arm/mach-omap2/omap54xx.h b/arch/arm/mach-omap2/omap54xx.h
index a2582bb3cab3..a086ba15868b 100644
--- a/arch/arm/mach-omap2/omap54xx.h
+++ b/arch/arm/mach-omap2/omap54xx.h
@@ -28,5 +28,6 @@
28#define OMAP54XX_PRCM_MPU_BASE 0x48243000 28#define OMAP54XX_PRCM_MPU_BASE 0x48243000
29#define OMAP54XX_SCM_BASE 0x4a002000 29#define OMAP54XX_SCM_BASE 0x4a002000
30#define OMAP54XX_CTRL_BASE 0x4a002800 30#define OMAP54XX_CTRL_BASE 0x4a002800
31#define OMAP54XX_SAR_RAM_BASE 0x4ae26000
31 32
32#endif /* __ASM_SOC_OMAP555554XX_H */ 33#endif /* __ASM_SOC_OMAP555554XX_H */