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authorSantosh Shilimkar <santosh.shilimkar@ti.com>2010-08-02 06:18:18 -0400
committerTony Lindgren <tony@atomide.com>2010-08-02 06:18:18 -0400
commit3f9eaf0984952f69cb2d0c1b0f99b95b74742094 (patch)
tree40ea04df84bf010244f90fc538e5445063328d8a /arch/arm
parent5643aebbc088332e6722750c45bcd83f61af071e (diff)
omap4: Add smc API to read AuxCoreBoot0 register
This patch adds a secure API to read AuxCoreBoot0 register to check the cpu boot status. It also moves the other smc APIs to common omap44xx-smc.S. This APIs should not be marked as __INIT because we need these to be present for CPU hotplug Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-omap2/omap-headsmp.S16
-rw-r--r--arch/arm/mach-omap2/omap44xx-smc.S25
-rw-r--r--arch/arm/plat-omap/include/plat/smp.h1
3 files changed, 26 insertions, 16 deletions
diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S
index ef0e7a00dd6c..6ae937a06cc1 100644
--- a/arch/arm/mach-omap2/omap-headsmp.S
+++ b/arch/arm/mach-omap2/omap-headsmp.S
@@ -47,19 +47,3 @@ hold: ldr r12,=0x103
47 b secondary_startup 47 b secondary_startup
48END(omap_secondary_startup) 48END(omap_secondary_startup)
49 49
50
51ENTRY(omap_modify_auxcoreboot0)
52 stmfd sp!, {r1-r12, lr}
53 ldr r12, =0x104
54 dsb
55 smc #0
56 ldmfd sp!, {r1-r12, pc}
57END(omap_modify_auxcoreboot0)
58
59ENTRY(omap_auxcoreboot_addr)
60 stmfd sp!, {r2-r12, lr}
61 ldr r12, =0x105
62 dsb
63 smc #0
64 ldmfd sp!, {r2-r12, pc}
65END(omap_auxcoreboot_addr)
diff --git a/arch/arm/mach-omap2/omap44xx-smc.S b/arch/arm/mach-omap2/omap44xx-smc.S
index f61c7771ca47..1980dc31a1a2 100644
--- a/arch/arm/mach-omap2/omap44xx-smc.S
+++ b/arch/arm/mach-omap2/omap44xx-smc.S
@@ -30,3 +30,28 @@ ENTRY(omap_smc1)
30 smc #0 30 smc #0
31 ldmfd sp!, {r2-r12, pc} 31 ldmfd sp!, {r2-r12, pc}
32END(omap_smc1) 32END(omap_smc1)
33
34ENTRY(omap_modify_auxcoreboot0)
35 stmfd sp!, {r1-r12, lr}
36 ldr r12, =0x104
37 dsb
38 smc #0
39 ldmfd sp!, {r1-r12, pc}
40END(omap_modify_auxcoreboot0)
41
42ENTRY(omap_auxcoreboot_addr)
43 stmfd sp!, {r2-r12, lr}
44 ldr r12, =0x105
45 dsb
46 smc #0
47 ldmfd sp!, {r2-r12, pc}
48END(omap_auxcoreboot_addr)
49
50ENTRY(omap_read_auxcoreboot0)
51 stmfd sp!, {r2-r12, lr}
52 ldr r12, =0x103
53 dsb
54 smc #0
55 mov r0, r0, lsr #9
56 ldmfd sp!, {r2-r12, pc}
57END(omap_read_auxcoreboot0)
diff --git a/arch/arm/plat-omap/include/plat/smp.h b/arch/arm/plat-omap/include/plat/smp.h
index 8983d54c4fd2..6a3ff65c0303 100644
--- a/arch/arm/plat-omap/include/plat/smp.h
+++ b/arch/arm/plat-omap/include/plat/smp.h
@@ -30,6 +30,7 @@
30extern void omap_secondary_startup(void); 30extern void omap_secondary_startup(void);
31extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask); 31extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
32extern void omap_auxcoreboot_addr(u32 cpu_addr); 32extern void omap_auxcoreboot_addr(u32 cpu_addr);
33extern u32 omap_read_auxcoreboot0(void);
33 34
34/* 35/*
35 * We use Soft IRQ1 as the IPI 36 * We use Soft IRQ1 as the IPI